Exemple #1
0
int s5p_mixer_set_grp_layer_src_pos(enum s5p_mixer_layer layer, u32 src_offs_x,
			u32 src_offs_y, u32 span, u32 width, u32 height)
{
	tvout_dbg("%d, %d, %d, %d, %d, %d\n", layer, span, width, height,
		 src_offs_x, src_offs_y);

	switch (layer) {
	case MIXER_GPR0_LAYER:
		writel(S5P_MXR_GRP_SPAN(span),
			mixer_base + S5P_MXR_GRAPHIC0_SPAN);
		writel(S5P_MXR_GRP_WIDTH(width) | S5P_MXR_GRP_HEIGHT(height),
		       mixer_base + S5P_MXR_GRAPHIC0_WH);
		writel(S5P_MXR_GRP_STARTX(src_offs_x) |
			S5P_MXR_GRP_STARTY(src_offs_y),
		       mixer_base + S5P_MXR_GRAPHIC0_SXY);
		break;

	case MIXER_GPR1_LAYER:
		writel(S5P_MXR_GRP_SPAN(span),
			mixer_base + S5P_MXR_GRAPHIC1_SPAN);
		writel(S5P_MXR_GRP_WIDTH(width) | S5P_MXR_GRP_HEIGHT(height),
		       mixer_base + S5P_MXR_GRAPHIC1_WH);
		writel(S5P_MXR_GRP_STARTX(src_offs_x) |
			S5P_MXR_GRP_STARTY(src_offs_y),
		       mixer_base + S5P_MXR_GRAPHIC1_SXY);
		break;

	default:
		tvout_err(" invalid layer parameter = %d\n", layer);
		return -1;
	}

	return 0;
}
Exemple #2
0
int s5p_mixer_set_alpha(enum s5p_mixer_layer layer, u32 alpha)
{
	u32 temp_reg;

	tvout_dbg("%d, %d\n", layer, alpha);

	switch (layer) {
	case MIXER_VIDEO_LAYER:
		temp_reg = readl(mixer_base + S5P_MXR_VIDEO_CFG)
			   & (~S5P_MXR_VIDEO_CFG_ALPHA_MASK) ;
		temp_reg |= S5P_MXR_VIDEO_CFG_ALPHA_VALUE(alpha);
		writel(temp_reg, mixer_base + S5P_MXR_VIDEO_CFG);
		break;

	case MIXER_GPR0_LAYER:
		temp_reg = readl(mixer_base + S5P_MXR_GRAPHIC0_CFG)
			   & (~S5P_MXR_VIDEO_CFG_ALPHA_MASK) ;
		temp_reg |= S5P_MXR_GRP_ALPHA_VALUE(alpha);
		writel(temp_reg, mixer_base + S5P_MXR_GRAPHIC0_CFG);
		break;

	case MIXER_GPR1_LAYER:
		temp_reg = readl(mixer_base + S5P_MXR_GRAPHIC1_CFG)
			   & (~S5P_MXR_VIDEO_CFG_ALPHA_MASK) ;
		temp_reg |= S5P_MXR_GRP_ALPHA_VALUE(alpha);
		writel(temp_reg, mixer_base + S5P_MXR_GRAPHIC1_CFG);
		break;

	default:
		tvout_err("invalid layer parameter = %d\n", layer);
		return -1;
	}

	return 0;
}
Exemple #3
0
int s5p_mixer_set_grp_layer_dst_pos(enum s5p_mixer_layer layer,
					u32 dst_offs_x, u32 dst_offs_y)
{
	tvout_dbg("%d, %d, %d\n", layer, dst_offs_x, dst_offs_y);

	switch (layer) {
	case MIXER_GPR0_LAYER:
		writel(S5P_MXR_GRP_DESTX(dst_offs_x) |
			S5P_MXR_GRP_DESTY(dst_offs_y),
			mixer_base + S5P_MXR_GRAPHIC0_DXY);
		break;

	case MIXER_GPR1_LAYER:
		writel(S5P_MXR_GRP_DESTX(dst_offs_x) |
			S5P_MXR_GRP_DESTY(dst_offs_y),
			mixer_base + S5P_MXR_GRAPHIC1_DXY);
		break;

	default:
		tvout_err("invalid layer parameter = %d\n", layer);
		return -1;
	}

	return 0;
}
Exemple #4
0
int s5p_tvout_map_resource_mem(
		struct platform_device *pdev, char *name,
		void __iomem **base, struct resource **res)
{
	size_t		size;
	void __iomem	*tmp_base;
	struct resource	*tmp_res;

	tmp_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);

	if (!tmp_res)
		goto not_found;

	size = resource_size(tmp_res);

	tmp_res = request_mem_region(tmp_res->start, size, tmp_res->name);

	if (!tmp_res) {
		tvout_err("%s: fail to get memory region\n", __func__);
		goto err_on_request_mem_region;
	}

	tmp_base = ioremap(tmp_res->start, size);

	if (!tmp_base) {
		tvout_err("%s: fail to ioremap address region\n", __func__);
		goto err_on_ioremap;
	}

	*res = tmp_res;
	*base = tmp_base;
	return 0;

err_on_ioremap:
	release_resource(tmp_res);
	kfree(tmp_res);

err_on_request_mem_region:
	return -ENXIO;

not_found:
	tvout_err("%s: fail to get IORESOURCE_MEM for %s\n", __func__, name);
	return -ENODEV;
}
Exemple #5
0
int s5p_sdo_set_video_scale_cfg(enum s5p_sdo_level composite_level,
				enum s5p_sdo_vsync_ratio composite_ratio)
{
	u32 temp_reg = 0;

	tvout_dbg("%d, %d\n", composite_level, composite_ratio);

	switch (composite_level) {
	case SDO_LEVEL_0IRE:
		temp_reg |= S5P_SDO_COMPOSITE_LEVEL_SEL_0IRE;
		break;

	case SDO_LEVEL_75IRE:
		temp_reg |= S5P_SDO_COMPOSITE_LEVEL_SEL_75IRE;
		break;

	default:
		tvout_err("invalid composite_level parameter(%d)\n", \
							composite_ratio);
		return -1;
	}

	switch (composite_ratio) {
	case SDO_VTOS_RATIO_10_4:
		temp_reg |= S5P_SDO_COMPOSITE_VTOS_RATIO_10_4;
		break;

	case SDO_VTOS_RATIO_7_3:
		temp_reg |= S5P_SDO_COMPOSITE_VTOS_RATIO_7_3;
		break;

	default:
		tvout_err("invalid composite_ratio parameter(%d)\n", \
						composite_ratio);
		return -1;
	}

	writel(temp_reg, sdo_base + S5P_SDO_SCALE);

	return 0;
}
Exemple #6
0
int s5p_mixer_set_layer_blend(enum s5p_mixer_layer layer, bool enable)
{
	u32 temp_reg;

	tvout_dbg("%d, %d\n", layer, enable);

	switch (layer) {
	case MIXER_VIDEO_LAYER:
		temp_reg = readl(mixer_base + S5P_MXR_VIDEO_CFG)
			   & (~S5P_MXR_VIDEO_CFG_BLEND_EN) ;

		if (enable)
			temp_reg |= S5P_MXR_VIDEO_CFG_BLEND_EN;
		else
			temp_reg |= S5P_MXR_VIDEO_CFG_BLEND_DIS;

		writel(temp_reg, mixer_base + S5P_MXR_VIDEO_CFG);
		break;

	case MIXER_GPR0_LAYER:
		temp_reg = readl(mixer_base + S5P_MXR_GRAPHIC0_CFG)
			   & (~S5P_MXR_WIN_BLEND_ENABLE) ;

		if (enable)
			temp_reg |= S5P_MXR_WIN_BLEND_ENABLE;
		else
			temp_reg |= S5P_MXR_WIN_BLEND_DISABLE;

		writel(temp_reg, mixer_base + S5P_MXR_GRAPHIC0_CFG);
		break;

	case MIXER_GPR1_LAYER:
		temp_reg = readl(mixer_base + S5P_MXR_GRAPHIC1_CFG)
			   & (~S5P_MXR_WIN_BLEND_ENABLE) ;

		if (enable)
			temp_reg |= S5P_MXR_WIN_BLEND_ENABLE;
		else
			temp_reg |= S5P_MXR_WIN_BLEND_DISABLE;

		writel(temp_reg, mixer_base + S5P_MXR_GRAPHIC1_CFG);
		break;

	default:
		tvout_err("invalid layer parameter = %d\n", layer);

		return -1;
	}

	return 0;
}
Exemple #7
0
void s5p_mixer_init_csc_coef_default(enum s5p_mixer_csc_type csc_type)
{
	tvout_dbg("%d\n", csc_type);

	switch (csc_type) {
	case MIXER_CSC_601_LR:
		writel((0 << 30) | (153 << 20) | (300 << 10) | (58 << 0),
			mixer_base + S5P_MXR_CM_COEFF_Y);
		writel((936 << 20) | (851 << 10) | (262 << 0),
			mixer_base + S5P_MXR_CM_COEFF_CB);
		writel((262 << 20) | (805 << 10) | (982 << 0),
			mixer_base + S5P_MXR_CM_COEFF_CR);
		break;

	case MIXER_CSC_601_FR:
		writel((1 << 30) | (132 << 20) | (258 << 10) | (50 << 0),
			mixer_base + S5P_MXR_CM_COEFF_Y);
		writel((948 << 20) | (875 << 10) | (225 << 0),
			mixer_base + S5P_MXR_CM_COEFF_CB);
		writel((225 << 20) | (836 << 10) | (988 << 0),
			mixer_base + S5P_MXR_CM_COEFF_CR);
		break;

	case MIXER_CSC_709_LR:
		writel((0 << 30) | (109 << 20) | (366 << 10) | (36 << 0),
			mixer_base + S5P_MXR_CM_COEFF_Y);
		writel((964 << 20) | (822 << 10) | (216 << 0),
			mixer_base + S5P_MXR_CM_COEFF_CB);
		writel((262 << 20) | (787 << 10) | (1000 << 0),
			mixer_base + S5P_MXR_CM_COEFF_CR);
		break;

	case MIXER_CSC_709_FR:
		writel((1 << 30) | (94 << 20) | (314 << 10) | (32 << 0),
			mixer_base + S5P_MXR_CM_COEFF_Y);
		writel((972 << 20) | (851 << 10) | (225 << 0),
			mixer_base + S5P_MXR_CM_COEFF_CB);
		writel((225 << 20) | (820 << 10) | (1004 << 0),
			mixer_base + S5P_MXR_CM_COEFF_CR);
		break;

	default:
		tvout_err("invalid csc_type parameter = %d\n", csc_type);
		break;
	}
}
Exemple #8
0
int s5p_mixer_set_show(enum s5p_mixer_layer layer, bool show)
{
	u32 mxr_config;

	tvout_dbg("%d, %d\n", layer, show);

	switch (layer) {
	case MIXER_VIDEO_LAYER:
		mxr_config = (show) ?
				(readl(mixer_base + S5P_MXR_CFG) |
					S5P_MXR_CFG_VIDEO_ENABLE) :
				(readl(mixer_base + S5P_MXR_CFG) &
					~S5P_MXR_CFG_VIDEO_ENABLE);
		break;

	case MIXER_GPR0_LAYER:
		mxr_config = (show) ?
				(readl(mixer_base + S5P_MXR_CFG) |
					S5P_MXR_CFG_GRAPHIC0_ENABLE) :
				(readl(mixer_base + S5P_MXR_CFG) &
					~S5P_MXR_CFG_GRAPHIC0_ENABLE);
		break;

	case MIXER_GPR1_LAYER:
		mxr_config = (show) ?
				(readl(mixer_base + S5P_MXR_CFG) |
					S5P_MXR_CFG_GRAPHIC1_ENABLE) :
				(readl(mixer_base + S5P_MXR_CFG) &
					~S5P_MXR_CFG_GRAPHIC1_ENABLE);
		break;

	default:
		tvout_err("invalid layer parameter = %d\n", layer);
		return -1;
	}

	writel(mxr_config, mixer_base + S5P_MXR_CFG);

	return 0;
}
Exemple #9
0
int s5p_sdo_set_vbi(bool wss_cvbs,
		    enum s5p_sdo_closed_caption_type caption_cvbs)
{
	u32 temp_reg = 0;

	tvout_dbg("%d, %d\n", wss_cvbs, caption_cvbs);

	if (wss_cvbs)
		temp_reg = S5P_SDO_CVBS_WSS_INS;
	else
		temp_reg = S5P_SDO_CVBS_NO_WSS;

	switch (caption_cvbs) {
	case SDO_NO_INS:
		temp_reg |= S5P_SDO_CVBS_NO_CLOSED_CAPTION;
		break;

	case SDO_INS_1:
		temp_reg |= S5P_SDO_CVBS_21H_CLOSED_CAPTION;
		break;

	case SDO_INS_2:
		temp_reg |= S5P_SDO_CVBS_21H_284H_CLOSED_CAPTION;
		break;

	case SDO_INS_OTHERS:
		temp_reg |= S5P_SDO_CVBS_USE_OTHERS;
		break;

	default:
		tvout_err("invalid caption_cvbs parameter(%d)\n",
			caption_cvbs);
		return -1;
	}


	writel(temp_reg, sdo_base + S5P_SDO_VBI);

	return 0;
}
static int __devinit s5p_tvout_clk_get(struct platform_device *pdev,
				       struct s5p_tvout_status *ctrl)
{
	struct clk *ext_xtal_clk, *mout_vpll_src, *fout_vpll, *mout_vpll;

	TV_CLK_GET_WITH_ERR_CHECK(ctrl->i2c_phy_clk, pdev, "i2c-hdmiphy");

	TV_CLK_GET_WITH_ERR_CHECK(ctrl->sclk_dac, pdev, "sclk_dac");
	TV_CLK_GET_WITH_ERR_CHECK(ctrl->sclk_hdmi, pdev, "sclk_hdmi");

	TV_CLK_GET_WITH_ERR_CHECK(ctrl->sclk_pixel, pdev, "sclk_pixel");
	TV_CLK_GET_WITH_ERR_CHECK(ctrl->sclk_hdmiphy, pdev, "sclk_hdmiphy");

	TV_CLK_GET_WITH_ERR_CHECK(ext_xtal_clk, pdev, "ext_xtal");
	TV_CLK_GET_WITH_ERR_CHECK(mout_vpll_src, pdev, "vpll_src");
	TV_CLK_GET_WITH_ERR_CHECK(fout_vpll, pdev, "fout_vpll");
	TV_CLK_GET_WITH_ERR_CHECK(mout_vpll, pdev, "sclk_vpll");

#ifdef CONFIG_VPLL_USE_FOR_TVENC
	if (clk_set_rate(fout_vpll, 54000000)) {
		tvout_err("%s rate change failed: %lu\n", fout_vpll->name,
			  54000000);
		return -1;
	}

	if (clk_set_parent(mout_vpll_src, ext_xtal_clk)) {
		tvout_err("unable to set parent %s of clock %s.\n",
			  ext_xtal_clk->name, mout_vpll_src->name);
		return -1;
	}

	if (clk_set_parent(mout_vpll, fout_vpll)) {
		tvout_err("unable to set parent %s of clock %s.\n",
			  fout_vpll->name, mout_vpll->name);
		return -1;
	}

	/* sclk_dac's parent is fixed as mout_vpll */
	if (clk_set_parent(ctrl->sclk_dac, mout_vpll)) {
		tvout_err("unable to set parent %s of clock %s.\n",
			  mout_vpll->name, ctrl->sclk_dac->name);
		return -1;
	}

	/* It'll be moved in the future */
	if (clk_enable(mout_vpll_src) < 0)
		return -1;

	if (clk_enable(fout_vpll) < 0)
		return -1;

	if (clk_enable(mout_vpll) < 0)
		return -1;

	clk_put(ext_xtal_clk);
	clk_put(mout_vpll_src);
	clk_put(fout_vpll);
	clk_put(mout_vpll);
#endif

	return 0;
}
Exemple #11
0
int s5p_mixer_init_display_mode(enum s5p_tvout_disp_mode mode,
				enum s5p_tvout_o_mode output_mode)
{
	u32 temp_reg = readl(mixer_base + S5P_MXR_CFG);

	tvout_dbg("%d, %d\n", mode, output_mode);

	switch (mode) {
	case TVOUT_NTSC_M:
	case TVOUT_NTSC_443:
		temp_reg &= ~S5P_MXR_CFG_HD;
		temp_reg &= ~S5P_MXR_CFG_PAL;
		temp_reg &= S5P_MXR_CFG_INTERLACE;
		break;

	case TVOUT_PAL_BDGHI:
	case TVOUT_PAL_M:
	case TVOUT_PAL_N:
	case TVOUT_PAL_NC:
	case TVOUT_PAL_60:
		temp_reg &= ~S5P_MXR_CFG_HD;
		temp_reg |= S5P_MXR_CFG_PAL;
		temp_reg &= S5P_MXR_CFG_INTERLACE;
		break;

	case TVOUT_480P_60_16_9:
	case TVOUT_480P_60_4_3:
	case TVOUT_480P_59:
		temp_reg &= ~S5P_MXR_CFG_HD;
		temp_reg &= ~S5P_MXR_CFG_PAL;
		temp_reg |= S5P_MXR_CFG_PROGRASSIVE;
		temp_reg |= MIXER_RGB601_16_235<<9;
		break;

	case TVOUT_576P_50_16_9:
	case TVOUT_576P_50_4_3:
		temp_reg &= ~S5P_MXR_CFG_HD;
		temp_reg |= S5P_MXR_CFG_PAL;
		temp_reg |= S5P_MXR_CFG_PROGRASSIVE;
		temp_reg |= MIXER_RGB601_16_235<<9;
		break;

	case TVOUT_720P_50:
	case TVOUT_720P_59:
	case TVOUT_720P_60:
		temp_reg |= S5P_MXR_CFG_HD;
		temp_reg &= ~S5P_MXR_CFG_HD_1080I;
		temp_reg |= S5P_MXR_CFG_PROGRASSIVE;
		temp_reg |= MIXER_RGB709_16_235<<9;
		break;

	case TVOUT_1080I_50:
	case TVOUT_1080I_59:
	case TVOUT_1080I_60:
		temp_reg |= S5P_MXR_CFG_HD;
		temp_reg |= S5P_MXR_CFG_HD_1080I;
		temp_reg &= S5P_MXR_CFG_INTERLACE;
		temp_reg |= MIXER_RGB709_16_235<<9;
		break;

	case TVOUT_1080P_50:
	case TVOUT_1080P_59:
	case TVOUT_1080P_60:
	case TVOUT_1080P_30:
		temp_reg |= S5P_MXR_CFG_HD;
		temp_reg |= S5P_MXR_CFG_HD_1080P;
		temp_reg |= S5P_MXR_CFG_PROGRASSIVE;
		temp_reg |= MIXER_RGB709_16_235<<9;
		break;

	default:
		tvout_err("invalid mode parameter = %d\n", mode);
		return -1;
	}

	switch (output_mode) {
	case TVOUT_COMPOSITE:
		temp_reg &= S5P_MXR_CFG_TV_OUT;
		temp_reg &= ~(0x1<<8);
		temp_reg |= MIXER_YUV444<<8;
		break;

	case TVOUT_HDMI_RGB:
	case TVOUT_DVI:
		temp_reg |= S5P_MXR_CFG_HDMI_OUT;
		temp_reg &= ~(0x1<<8);
		temp_reg |= MIXER_RGB888<<8;
		break;

	case TVOUT_HDMI:
		temp_reg |= S5P_MXR_CFG_HDMI_OUT;
		temp_reg &= ~(0x1<<8);
		temp_reg |= MIXER_YUV444<<8;
		break;

	default:
		tvout_err("invalid mode parameter = %d\n", mode);
		return -1;
	}

	writel(temp_reg, mixer_base + S5P_MXR_CFG);

	return 0;
}
Exemple #12
0
int s5p_mixer_init_display_mode(enum s5p_tvout_disp_mode mode,
				enum s5p_tvout_o_mode output_mode,
				enum s5p_mixer_rgb rgb_type)
{
	u32 temp_reg = readl(mixer_base + S5P_MXR_CFG);

	tvout_dbg("%d, %d\n", mode, output_mode);

	switch (mode) {
	case TVOUT_NTSC_M:
	case TVOUT_NTSC_443:
		temp_reg &= ~S5P_MXR_CFG_HD;
		temp_reg &= ~S5P_MXR_CFG_PAL;
		temp_reg &= S5P_MXR_CFG_INTERLACE;
		break;

	case TVOUT_PAL_BDGHI:
	case TVOUT_PAL_M:
	case TVOUT_PAL_N:
	case TVOUT_PAL_NC:
	case TVOUT_PAL_60:
		temp_reg &= ~S5P_MXR_CFG_HD;
		temp_reg |= S5P_MXR_CFG_PAL;
		temp_reg &= S5P_MXR_CFG_INTERLACE;
		break;

	case TVOUT_480P_60_16_9:
	case TVOUT_480P_60_4_3:
	case TVOUT_480P_59:
		temp_reg &= ~S5P_MXR_CFG_HD;
		temp_reg &= ~S5P_MXR_CFG_PAL;
		temp_reg |= S5P_MXR_CFG_PROGRASSIVE;
		break;

	case TVOUT_576P_50_16_9:
	case TVOUT_576P_50_4_3:
		temp_reg &= ~S5P_MXR_CFG_HD;
		temp_reg |= S5P_MXR_CFG_PAL;
		temp_reg |= S5P_MXR_CFG_PROGRASSIVE;
		break;

	case TVOUT_720P_50:
	case TVOUT_720P_59:
	case TVOUT_720P_60:
		temp_reg |= S5P_MXR_CFG_HD;
		temp_reg &= ~S5P_MXR_CFG_HD_1080I;
		temp_reg |= S5P_MXR_CFG_PROGRASSIVE;
		break;

#ifdef CONFIG_HDMI_14A_3D
	case TVOUT_720P_60_SBS_HALF:
	case TVOUT_720P_59_SBS_HALF:
	case TVOUT_720P_50_TB:
		temp_reg |= S5P_MXR_CFG_HD;
		temp_reg &= ~S5P_MXR_CFG_HD_1080I;
		temp_reg |= S5P_MXR_CFG_PROGRASSIVE;
		break;
#endif

	case TVOUT_1080I_50:
	case TVOUT_1080I_59:
	case TVOUT_1080I_60:
		temp_reg |= S5P_MXR_CFG_HD;
		temp_reg |= S5P_MXR_CFG_HD_1080I;
		temp_reg &= S5P_MXR_CFG_INTERLACE;
		break;

	case TVOUT_1080P_50:
	case TVOUT_1080P_59:
	case TVOUT_1080P_60:
	case TVOUT_1080P_30:
		temp_reg |= S5P_MXR_CFG_HD;
		temp_reg |= S5P_MXR_CFG_HD_1080P;
		temp_reg |= S5P_MXR_CFG_PROGRASSIVE;
		break;

#ifdef CONFIG_HDMI_14A_3D
	case TVOUT_1080P_24_TB:
	case TVOUT_1080P_23_TB:
		temp_reg |= S5P_MXR_CFG_HD;
		temp_reg |= S5P_MXR_CFG_HD_1080P;
		temp_reg |= S5P_MXR_CFG_PROGRASSIVE;
		break;
#endif
	default:
		tvout_err("invalid mode parameter = %d\n", mode);
		return -1;
	}

	switch (output_mode) {
	case TVOUT_COMPOSITE:
		temp_reg &= S5P_MXR_CFG_TV_OUT;
		temp_reg &= ~(0x1<<8);
		temp_reg |= MIXER_YUV444<<8;
		break;

	case TVOUT_HDMI_RGB:
	case TVOUT_DVI:
		temp_reg |= S5P_MXR_CFG_HDMI_OUT;
		temp_reg &= ~(0x1<<8);
		temp_reg |= MIXER_RGB888<<8;
		break;

	case TVOUT_HDMI:
		temp_reg |= S5P_MXR_CFG_HDMI_OUT;
		temp_reg &= ~(0x1<<8);
		temp_reg |= MIXER_YUV444<<8;
		break;

	default:
		tvout_err("invalid mode parameter = %d\n", mode);
		return -1;
	}

	if (0 <= rgb_type  && rgb_type <= 3)
		temp_reg |= rgb_type<<9;
	else
		printk(KERN_INFO "Wrong rgb type!!\n");

	tvout_dbg(KERN_INFO "Color range RGB Type : %x\n", rgb_type);
	writel(temp_reg, mixer_base + S5P_MXR_CFG);

	return 0;
}
Exemple #13
0
int s5p_sdo_set_display_mode(enum s5p_tvout_disp_mode disp_mode,
			     enum s5p_sdo_order order)
{
	u32 temp_reg = 0;

	tvout_dbg("%d, %d\n", disp_mode, order);

	switch (disp_mode) {
	case TVOUT_NTSC_M:
		temp_reg |= S5P_SDO_NTSC_M;
		s5p_sdo_set_video_scale_cfg(
			SDO_LEVEL_75IRE,
			SDO_VTOS_RATIO_10_4);

		s5p_sdo_set_antialias_filter_coeff_default(
			SDO_LEVEL_75IRE,
			SDO_VTOS_RATIO_10_4);
		break;

	case TVOUT_PAL_BDGHI:
		temp_reg |= S5P_SDO_PAL_BGHID;
		s5p_sdo_set_video_scale_cfg(
			SDO_LEVEL_0IRE,
			SDO_VTOS_RATIO_7_3);

		s5p_sdo_set_antialias_filter_coeff_default(
			SDO_LEVEL_0IRE,
			SDO_VTOS_RATIO_7_3);
		break;

	case TVOUT_PAL_M:
		temp_reg |= S5P_SDO_PAL_M;
		s5p_sdo_set_video_scale_cfg(
			SDO_LEVEL_0IRE,
			SDO_VTOS_RATIO_7_3);

		s5p_sdo_set_antialias_filter_coeff_default(
			SDO_LEVEL_0IRE,
			SDO_VTOS_RATIO_7_3);
		break;

	case TVOUT_PAL_N:
		temp_reg |= S5P_SDO_PAL_N;
		s5p_sdo_set_video_scale_cfg(
			SDO_LEVEL_0IRE,
			SDO_VTOS_RATIO_7_3);

		s5p_sdo_set_antialias_filter_coeff_default(
			SDO_LEVEL_75IRE,
			SDO_VTOS_RATIO_10_4);
		break;

	case TVOUT_PAL_NC:
		temp_reg |= S5P_SDO_PAL_NC;
		s5p_sdo_set_video_scale_cfg(
			SDO_LEVEL_0IRE,
			SDO_VTOS_RATIO_7_3);

		s5p_sdo_set_antialias_filter_coeff_default(
			SDO_LEVEL_0IRE,
			SDO_VTOS_RATIO_7_3);
		break;

	case TVOUT_PAL_60:
		temp_reg |= S5P_SDO_PAL_60;
		s5p_sdo_set_video_scale_cfg(
			SDO_LEVEL_0IRE,
			SDO_VTOS_RATIO_7_3);
		s5p_sdo_set_antialias_filter_coeff_default(
			SDO_LEVEL_0IRE,
			SDO_VTOS_RATIO_7_3);
		break;

	case TVOUT_NTSC_443:
		temp_reg |= S5P_SDO_NTSC_443;
		s5p_sdo_set_video_scale_cfg(
			SDO_LEVEL_75IRE,
			SDO_VTOS_RATIO_10_4);
		s5p_sdo_set_antialias_filter_coeff_default(
			SDO_LEVEL_75IRE,
			SDO_VTOS_RATIO_10_4);
		break;

	default:
		tvout_err("invalid disp_mode parameter(%d)\n", disp_mode);
		return -1;
	}

	temp_reg |= S5P_SDO_COMPOSITE | S5P_SDO_INTERLACED;

	switch (order) {

	case SDO_O_ORDER_COMPOSITE_CVBS_Y_C:
		temp_reg |= S5P_SDO_DAC2_CVBS | S5P_SDO_DAC1_Y |
				S5P_SDO_DAC0_C;
		break;

	case SDO_O_ORDER_COMPOSITE_CVBS_C_Y:
		temp_reg |= S5P_SDO_DAC2_CVBS | S5P_SDO_DAC1_C |
				S5P_SDO_DAC0_Y;
		break;

	case SDO_O_ORDER_COMPOSITE_Y_C_CVBS:
		temp_reg |= S5P_SDO_DAC2_Y | S5P_SDO_DAC1_C |
				S5P_SDO_DAC0_CVBS;
		break;

	case SDO_O_ORDER_COMPOSITE_Y_CVBS_C:
		temp_reg |= S5P_SDO_DAC2_Y | S5P_SDO_DAC1_CVBS |
				S5P_SDO_DAC0_C;
		break;

	case SDO_O_ORDER_COMPOSITE_C_CVBS_Y:
		temp_reg |= S5P_SDO_DAC2_C | S5P_SDO_DAC1_CVBS |
				S5P_SDO_DAC0_Y;
		break;

	case SDO_O_ORDER_COMPOSITE_C_Y_CVBS:
		temp_reg |= S5P_SDO_DAC2_C | S5P_SDO_DAC1_Y |
				S5P_SDO_DAC0_CVBS;
		break;

	default:
		tvout_err("invalid order parameter(%d)\n", order);
		return -1;
	}

	writel(temp_reg, sdo_base + S5P_SDO_CONFIG);

	return 0;
}
Exemple #14
0
int s5p_sdo_set_cgmsa625_data(struct s5p_sdo_625_data cgmsa625)
{
	u32 temp_reg = 0;

	tvout_dbg("%d, %d, %d, %d, %d, %d, %d, %d, %d\n",
		cgmsa625.surround_sound, cgmsa625.copyright,
		cgmsa625.copy_protection, cgmsa625.text_subtitles,
		cgmsa625.open_subtitles, cgmsa625.camera_film,
		cgmsa625.color_encoding, cgmsa625.helper_signal,
		cgmsa625.display_ratio);

	if (cgmsa625.surround_sound)
		temp_reg = S5P_SDO_CGMS625_SURROUND_SOUND_ENABLE;
	else
		temp_reg = S5P_SDO_CGMS625_SURROUND_SOUND_DISABLE;

	if (cgmsa625.copyright)
		temp_reg |= S5P_SDO_CGMS625_COPYRIGHT;
	else
		temp_reg |= S5P_SDO_CGMS625_NO_COPYRIGHT;

	if (cgmsa625.copy_protection)
		temp_reg |= S5P_SDO_CGMS625_COPY_RESTRICTED;
	else
		temp_reg |= S5P_SDO_CGMS625_COPY_NOT_RESTRICTED;

	if (cgmsa625.text_subtitles)
		temp_reg |= S5P_SDO_CGMS625_TELETEXT_SUBTITLES;
	else
		temp_reg |= S5P_SDO_CGMS625_TELETEXT_NO_SUBTITLES;

	switch (cgmsa625.open_subtitles) {
	case SDO_625_NO_OPEN_SUBTITLES:
		temp_reg |= S5P_SDO_CGMS625_NO_OPEN_SUBTITLES;
		break;

	case SDO_625_INACT_OPEN_SUBTITLES:
		temp_reg |= S5P_SDO_CGMS625_INACT_OPEN_SUBTITLES;
		break;

	case SDO_625_OUTACT_OPEN_SUBTITLES:
		temp_reg |= S5P_SDO_CGMS625_OUTACT_OPEN_SUBTITLES;
		break;

	default:
		tvout_err("invalid open_subtitles parameter(%d)\n",
			cgmsa625.open_subtitles);
		return -1;
	}

	switch (cgmsa625.camera_film) {
	case SDO_625_CAMERA:
		temp_reg |= S5P_SDO_CGMS625_CAMERA;
		break;

	case SDO_625_FILM:
		temp_reg |= S5P_SDO_CGMS625_FILM;
		break;

	default:
		tvout_err("invalid camera_film parameter(%d)\n",
			cgmsa625.camera_film);
		return -1;
	}

	switch (cgmsa625.color_encoding) {
	case SDO_625_NORMAL_PAL:
		temp_reg |= S5P_SDO_CGMS625_NORMAL_PAL;
		break;

	case SDO_625_MOTION_ADAPTIVE_COLORPLUS:
		temp_reg |= S5P_SDO_CGMS625_MOTION_ADAPTIVE_COLORPLUS;
		break;

	default:
		tvout_err("invalid color_encoding parameter(%d)\n",
			cgmsa625.color_encoding);
		return -1;
	}

	if (cgmsa625.helper_signal)
		temp_reg |= S5P_SDO_CGMS625_HELPER_SIG;
	else
		temp_reg |= S5P_SDO_CGMS625_HELPER_NO_SIG;

	switch (cgmsa625.display_ratio) {
	case SDO_625_4_3_FULL_576:
		temp_reg |= S5P_SDO_CGMS625_4_3_FULL_576;
		break;

	case SDO_625_14_9_LETTERBOX_CENTER_504:
		temp_reg |= S5P_SDO_CGMS625_14_9_LETTERBOX_CENTER_504;
		break;

	case SDO_625_14_9_LETTERBOX_TOP_504:
		temp_reg |= S5P_SDO_CGMS625_14_9_LETTERBOX_TOP_504;
		break;

	case SDO_625_16_9_LETTERBOX_CENTER_430:
		temp_reg |= S5P_SDO_CGMS625_16_9_LETTERBOX_CENTER_430;
		break;

	case SDO_625_16_9_LETTERBOX_TOP_430:
		temp_reg |= S5P_SDO_CGMS625_16_9_LETTERBOX_TOP_430;
		break;

	case SDO_625_16_9_LETTERBOX_CENTER:
		temp_reg |= S5P_SDO_CGMS625_16_9_LETTERBOX_CENTER;
		break;

	case SDO_625_14_9_FULL_CENTER_576:
		temp_reg |= S5P_SDO_CGMS625_14_9_FULL_CENTER_576;
		break;

	case SDO_625_16_9_ANAMORPIC_576:
		temp_reg |= S5P_SDO_CGMS625_16_9_ANAMORPIC_576;
		break;

	default:
		tvout_err("invalid display_ratio parameter(%d)\n",
			cgmsa625.display_ratio);
		return -1;
	}

	writel(temp_reg, sdo_base + S5P_SDO_CGMS625);

	return 0;
}
Exemple #15
0
int s5p_sdo_set_cgmsa525_data(struct s5p_sdo_525_data cgmsa525)
{
	u32 temp_reg = 0;

	tvout_dbg("%d, %d, %d, %d\n",
		cgmsa525.copy_permit, cgmsa525.mv_psp,
		cgmsa525.copy_info, cgmsa525.display_ratio);

	switch (cgmsa525.copy_permit) {
	case SDO_525_COPY_PERMIT:
		temp_reg = S5P_SDO_WORD2_CGMS525_COPY_PERMIT;
		break;

	case SDO_525_ONECOPY_PERMIT:
		temp_reg = S5P_SDO_WORD2_CGMS525_ONECOPY_PERMIT;
		break;

	case SDO_525_NOCOPY_PERMIT:
		temp_reg = S5P_SDO_WORD2_CGMS525_NOCOPY_PERMIT;
		break;

	default:
		tvout_err("invalid copy_permit parameter(%d)\n",
			cgmsa525.copy_permit);
		return -1;
	}

	switch (cgmsa525.mv_psp) {
	case SDO_525_MV_PSP_OFF:
		temp_reg |= S5P_SDO_WORD2_CGMS525_MV_PSP_OFF;
		break;

	case SDO_525_MV_PSP_ON_2LINE_BURST:
		temp_reg |= S5P_SDO_WORD2_CGMS525_MV_PSP_ON_2LINE_BURST;
		break;

	case SDO_525_MV_PSP_ON_BURST_OFF:
		temp_reg |= S5P_SDO_WORD2_CGMS525_MV_PSP_ON_BURST_OFF;
		break;

	case SDO_525_MV_PSP_ON_4LINE_BURST:
		temp_reg |= S5P_SDO_WORD2_CGMS525_MV_PSP_ON_4LINE_BURST;
		break;

	default:
		tvout_err("invalid mv_psp parameter(%d)\n", cgmsa525.mv_psp);
		return -1;
	}

	switch (cgmsa525.copy_info) {
	case SDO_525_COPY_INFO:
		temp_reg |= S5P_SDO_WORD1_CGMS525_COPY_INFO;
		break;

	case SDO_525_DEFAULT:
		temp_reg |= S5P_SDO_WORD1_CGMS525_DEFAULT;
		break;

	default:
		tvout_err("invalid copy_info parameter(%d)\n",
				cgmsa525.copy_info);
		return -1;
	}

	if (cgmsa525.analog_on)
		temp_reg |= S5P_SDO_WORD2_CGMS525_ANALOG_ON;
	else
		temp_reg |= S5P_SDO_WORD2_CGMS525_ANALOG_OFF;

	switch (cgmsa525.display_ratio) {
	case SDO_525_COPY_PERMIT:
		temp_reg |= S5P_SDO_WORD0_CGMS525_4_3_NORMAL;
		break;

	case SDO_525_ONECOPY_PERMIT:
		temp_reg |= S5P_SDO_WORD0_CGMS525_16_9_ANAMORPIC;
		break;

	case SDO_525_NOCOPY_PERMIT:
		temp_reg |= S5P_SDO_WORD0_CGMS525_4_3_LETTERBOX;
		break;

	default:
		tvout_err("invalid display_ratio parameter(%d)\n",
			cgmsa525.display_ratio);
		return -1;
	}

	writel(temp_reg | S5P_SDO_CRC_CGMS525(
		s5p_sdo_calc_wss_cgms_crc(temp_reg)),
		sdo_base + S5P_SDO_CGMS525);

	return 0;
}
Exemple #16
0
static int s5p_sdo_set_antialias_filter_coeff_default( \
		enum s5p_sdo_level composite_level, \
		enum s5p_sdo_vsync_ratio composite_ratio)
{
	tvout_dbg("%d, %d\n", composite_level, composite_ratio);

	switch (composite_level) {
	case SDO_LEVEL_0IRE:
		switch (composite_ratio) {
		case SDO_VTOS_RATIO_10_4:
			writel(0x00000000, sdo_base + S5P_SDO_Y3);
			writel(0x00000000, sdo_base + S5P_SDO_Y4);
			writel(0x00000000, sdo_base + S5P_SDO_Y5);
			writel(0x00000000, sdo_base + S5P_SDO_Y6);
			writel(0x00000000, sdo_base + S5P_SDO_Y7);
			writel(0x00000000, sdo_base + S5P_SDO_Y8);
			writel(0x00000000, sdo_base + S5P_SDO_Y9);
			writel(0x00000000, sdo_base + S5P_SDO_Y10);
			writel(0x0000029a, sdo_base + S5P_SDO_Y11);
			writel(0x00000000, sdo_base + S5P_SDO_CB0);
			writel(0x00000000, sdo_base + S5P_SDO_CB1);
			writel(0x00000000, sdo_base + S5P_SDO_CB2);
			writel(0x00000000, sdo_base + S5P_SDO_CB3);
			writel(0x00000000, sdo_base + S5P_SDO_CB4);
			writel(0x00000001, sdo_base + S5P_SDO_CB5);
			writel(0x00000007, sdo_base + S5P_SDO_CB6);
			writel(0x00000015, sdo_base + S5P_SDO_CB7);
			writel(0x0000002b, sdo_base + S5P_SDO_CB8);
			writel(0x00000045, sdo_base + S5P_SDO_CB9);
			writel(0x00000059, sdo_base + S5P_SDO_CB10);
			writel(0x00000061, sdo_base + S5P_SDO_CB11);
			writel(0x00000000, sdo_base + S5P_SDO_CR1);
			writel(0x00000000, sdo_base + S5P_SDO_CR2);
			writel(0x00000000, sdo_base + S5P_SDO_CR3);
			writel(0x00000000, sdo_base + S5P_SDO_CR4);
			writel(0x00000002, sdo_base + S5P_SDO_CR5);
			writel(0x0000000a, sdo_base + S5P_SDO_CR6);
			writel(0x0000001e, sdo_base + S5P_SDO_CR7);
			writel(0x0000003d, sdo_base + S5P_SDO_CR8);
			writel(0x00000061, sdo_base + S5P_SDO_CR9);
			writel(0x0000007a, sdo_base + S5P_SDO_CR10);
			writel(0x0000008f, sdo_base + S5P_SDO_CR11);
			break;

		case SDO_VTOS_RATIO_7_3:
			writel(0x00000000, sdo_base + S5P_SDO_Y0);
			writel(0x00000000, sdo_base + S5P_SDO_Y1);
			writel(0x00000000, sdo_base + S5P_SDO_Y2);
			writel(0x00000000, sdo_base + S5P_SDO_Y3);
			writel(0x00000000, sdo_base + S5P_SDO_Y4);
			writel(0x00000000, sdo_base + S5P_SDO_Y5);
			writel(0x00000000, sdo_base + S5P_SDO_Y6);
			writel(0x00000000, sdo_base + S5P_SDO_Y7);
			writel(0x00000000, sdo_base + S5P_SDO_Y8);
			writel(0x00000000, sdo_base + S5P_SDO_Y9);
			writel(0x00000000, sdo_base + S5P_SDO_Y10);
			writel(0x00000281, sdo_base + S5P_SDO_Y11);
			writel(0x00000000, sdo_base + S5P_SDO_CB0);
			writel(0x00000000, sdo_base + S5P_SDO_CB1);
			writel(0x00000000, sdo_base + S5P_SDO_CB2);
			writel(0x00000000, sdo_base + S5P_SDO_CB3);
			writel(0x00000000, sdo_base + S5P_SDO_CB4);
			writel(0x00000001, sdo_base + S5P_SDO_CB5);
			writel(0x00000007, sdo_base + S5P_SDO_CB6);
			writel(0x00000015, sdo_base + S5P_SDO_CB7);
			writel(0x0000002a, sdo_base + S5P_SDO_CB8);
			writel(0x00000044, sdo_base + S5P_SDO_CB9);
			writel(0x00000057, sdo_base + S5P_SDO_CB10);
			writel(0x0000005f, sdo_base + S5P_SDO_CB11);
			writel(0x00000000, sdo_base + S5P_SDO_CR1);
			writel(0x00000000, sdo_base + S5P_SDO_CR2);
			writel(0x00000000, sdo_base + S5P_SDO_CR3);
			writel(0x00000000, sdo_base + S5P_SDO_CR4);
			writel(0x00000002, sdo_base + S5P_SDO_CR5);
			writel(0x0000000a, sdo_base + S5P_SDO_CR6);
			writel(0x0000001d, sdo_base + S5P_SDO_CR7);
			writel(0x0000003c, sdo_base + S5P_SDO_CR8);
			writel(0x0000005f, sdo_base + S5P_SDO_CR9);
			writel(0x0000007b, sdo_base + S5P_SDO_CR10);
			writel(0x00000086, sdo_base + S5P_SDO_CR11);
			break;

		default:
			tvout_err("invalid composite_ratio parameter(%d)\n", \
						 composite_ratio);
			return -1;
		}

		break;

	case SDO_LEVEL_75IRE:
		switch (composite_ratio) {
		case SDO_VTOS_RATIO_10_4:
			writel(0x00000000, sdo_base + S5P_SDO_Y0);
			writel(0x00000000, sdo_base + S5P_SDO_Y1);
			writel(0x00000000, sdo_base + S5P_SDO_Y2);
			writel(0x00000000, sdo_base + S5P_SDO_Y3);
			writel(0x00000000, sdo_base + S5P_SDO_Y4);
			writel(0x00000000, sdo_base + S5P_SDO_Y5);
			writel(0x00000000, sdo_base + S5P_SDO_Y6);
			writel(0x00000000, sdo_base + S5P_SDO_Y7);
			writel(0x00000000, sdo_base + S5P_SDO_Y8);
			writel(0x00000000, sdo_base + S5P_SDO_Y9);
			writel(0x00000000, sdo_base + S5P_SDO_Y10);
			writel(0x0000025d, sdo_base + S5P_SDO_Y11);
			writel(0x00000000, sdo_base + S5P_SDO_CB0);
			writel(0x00000000, sdo_base + S5P_SDO_CB1);
			writel(0x00000000, sdo_base + S5P_SDO_CB2);
			writel(0x00000000, sdo_base + S5P_SDO_CB3);
			writel(0x00000000, sdo_base + S5P_SDO_CB4);
			writel(0x00000001, sdo_base + S5P_SDO_CB5);
			writel(0x00000007, sdo_base + S5P_SDO_CB6);
			writel(0x00000014, sdo_base + S5P_SDO_CB7);
			writel(0x00000028, sdo_base + S5P_SDO_CB8);
			writel(0x0000003f, sdo_base + S5P_SDO_CB9);
			writel(0x00000052, sdo_base + S5P_SDO_CB10);
			writel(0x0000005a, sdo_base + S5P_SDO_CB11);
			writel(0x00000000, sdo_base + S5P_SDO_CR1);
			writel(0x00000000, sdo_base + S5P_SDO_CR2);
			writel(0x00000000, sdo_base + S5P_SDO_CR3);
			writel(0x00000000, sdo_base + S5P_SDO_CR4);
			writel(0x00000001, sdo_base + S5P_SDO_CR5);
			writel(0x00000009, sdo_base + S5P_SDO_CR6);
			writel(0x0000001c, sdo_base + S5P_SDO_CR7);
			writel(0x00000039, sdo_base + S5P_SDO_CR8);
			writel(0x0000005a, sdo_base + S5P_SDO_CR9);
			writel(0x00000074, sdo_base + S5P_SDO_CR10);
			writel(0x0000007e, sdo_base + S5P_SDO_CR11);
			break;

		case SDO_VTOS_RATIO_7_3:
			writel(0x00000000, sdo_base + S5P_SDO_Y0);
			writel(0x00000000, sdo_base + S5P_SDO_Y1);
			writel(0x00000000, sdo_base + S5P_SDO_Y2);
			writel(0x00000000, sdo_base + S5P_SDO_Y3);
			writel(0x00000000, sdo_base + S5P_SDO_Y4);
			writel(0x00000000, sdo_base + S5P_SDO_Y5);
			writel(0x00000000, sdo_base + S5P_SDO_Y6);
			writel(0x00000000, sdo_base + S5P_SDO_Y7);
			writel(0x00000000, sdo_base + S5P_SDO_Y8);
			writel(0x00000000, sdo_base + S5P_SDO_Y9);
			writel(0x00000000, sdo_base + S5P_SDO_Y10);
			writel(0x00000251, sdo_base + S5P_SDO_Y11);
			writel(0x00000000, sdo_base + S5P_SDO_CB0);
			writel(0x00000000, sdo_base + S5P_SDO_CB1);
			writel(0x00000000, sdo_base + S5P_SDO_CB2);
			writel(0x00000000, sdo_base + S5P_SDO_CB3);
			writel(0x00000000, sdo_base + S5P_SDO_CB4);
			writel(0x00000001, sdo_base + S5P_SDO_CB5);
			writel(0x00000006, sdo_base + S5P_SDO_CB6);
			writel(0x00000013, sdo_base + S5P_SDO_CB7);
			writel(0x00000028, sdo_base + S5P_SDO_CB8);
			writel(0x0000003f, sdo_base + S5P_SDO_CB9);
			writel(0x00000051, sdo_base + S5P_SDO_CB10);
			writel(0x00000056, sdo_base + S5P_SDO_CB11);
			writel(0x00000000, sdo_base + S5P_SDO_CR1);
			writel(0x00000000, sdo_base + S5P_SDO_CR2);
			writel(0x00000000, sdo_base + S5P_SDO_CR3);
			writel(0x00000000, sdo_base + S5P_SDO_CR4);
			writel(0x00000002, sdo_base + S5P_SDO_CR5);
			writel(0x00000005, sdo_base + S5P_SDO_CR6);
			writel(0x00000018, sdo_base + S5P_SDO_CR7);
			writel(0x00000037, sdo_base + S5P_SDO_CR8);
			writel(0x0000005A, sdo_base + S5P_SDO_CR9);
			writel(0x00000076, sdo_base + S5P_SDO_CR10);
			writel(0x0000007e, sdo_base + S5P_SDO_CR11);
			break;

		default:
			tvout_err("invalid composite_ratio parameter(%d)\n", \
							composite_ratio);
			return -1;
		}

		break;

	default:
		tvout_err("invalid composite_level parameter(%d)\n", \
							composite_level);
		return -1;
	}

	return 0;
}