static int twl4030_set_host(struct otg_transceiver *x, struct usb_bus *host) { struct twl4030_usb *twl; if (!x) return -ENODEV; twl = xceiv_to_twl(x); if (!host) { omap_writew(0, OTG_IRQ_EN); twl4030_phy_suspend(twl, 1); twl->otg.host = NULL; return -ENODEV; } twl->otg.host = host; twl4030_phy_resume(twl); twl4030_usb_set_bits(twl, TWL4030_OTG_CTRL, TWL4030_OTG_CTRL_DMPULLDOWN | TWL4030_OTG_CTRL_DPPULLDOWN); twl4030_usb_set_bits(twl, FUNC_CTRL, FUNC_CTRL_SUSPENDM); twl4030_usb_set_bits(twl, TWL4030_OTG_CTRL, TWL4030_OTG_CTRL_DRVVBUS); return 0; }
static int twl4030_set_host(struct otg_transceiver *xceiv, struct usb_bus *host) { struct twl4030_usb *twl = xceiv_to_twl(xceiv); if (!xceiv) return -ENODEV; if (!host) { OTG_IRQ_EN_REG = 0; twl4030_phy_suspend(1); twl->otg.host = NULL; return -ENODEV; } twl->otg.host = host; twl4030_phy_resume(); twl4030_usb_set_bits(twl, OTG_CTRL, OTG_CTRL_DMPULLDOWN | OTG_CTRL_DPPULLDOWN); twl4030_usb_set_bits(twl, USB_INT_EN_RISE, USB_INT_IDGND); twl4030_usb_set_bits(twl, USB_INT_EN_FALL, USB_INT_IDGND); twl4030_usb_set_bits(twl, FUNC_CTRL, FUNC_CTRL_SUSPENDM); twl4030_usb_set_bits(twl, OTG_CTRL, OTG_CTRL_DRVVBUS); return 0; }
static int twl4030_set_peripheral(struct otg_transceiver *xceiv, struct usb_gadget *gadget) { struct twl4030_usb *twl = xceiv_to_twl(xceiv); if (!xceiv) return -ENODEV; if (!gadget) { OTG_IRQ_EN_REG = 0; twl4030_phy_suspend(1); twl->otg.gadget = NULL; return -ENODEV; } twl->otg.gadget = gadget; twl4030_phy_resume(); OTG_CTRL_REG = (OTG_CTRL_REG & OTG_CTRL_MASK & ~(OTG_XCEIV_OUTPUTS|OTG_CTRL_BITS)) | OTG_ID; twl->otg.state = OTG_STATE_B_IDLE; twl4030_usb_set_bits(twl, USB_INT_EN_RISE, USB_INT_SESSVALID | USB_INT_VBUSVALID); twl4030_usb_set_bits(twl, USB_INT_EN_FALL, USB_INT_SESSVALID | USB_INT_VBUSVALID); return 0; }
int twl4030_set_usb_pullup(bool pullup) { TRACE_ENTRY; if (pullup) { twl4030_usb_clear_bits(OTG_CTRL, DPPULLDOWN); twl4030_usb_set_bits(FUNC_CTRL, TERMSELECT); } else { twl4030_usb_clear_bits(FUNC_CTRL, TERMSELECT); twl4030_usb_set_bits(OTG_CTRL, DPPULLDOWN); } return 0; }
static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode) { unsigned char reg; twl->usb_mode = mode; switch (mode) { case T2_USB_MODE_ULPI: twl4030_usb_clear_bits(twl, ULPI_IFC_CTRL, ULPI_IFC_CTRL_CARKITMODE); twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB); twl4030_usb_clear_bits(twl, ULPI_FUNC_CTRL, ULPI_FUNC_CTRL_XCVRSEL_MASK | ULPI_FUNC_CTRL_OPMODE_MASK); //&*&*&*QY_20110706, fix low-speed otg reg = twl4030_usb_read(twl, FUNC_CTRL); printk("[OTG]OTG FUNC_CTRL=0x%x \n",reg); //&*&*&*QY_20110706 break; case -1: /* FIXME: power on defaults */ break; default: dev_err(twl->dev, "unsupported T2 transceiver mode %d\n", mode); break; }; }
static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode) { twl->usb_mode = mode; switch (mode) { case T2_USB_MODE_ULPI: twl4030_usb_clear_bits(twl, IFC_CTRL, IFC_CTRL_CARKITMODE); twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB); twl4030_usb_clear_bits(twl, FUNC_CTRL, FUNC_CTRL_XCVRSELECT_MASK | FUNC_CTRL_OPMODE_MASK); break; case -1: /* FIXME: power on defaults */ break; default: dev_err(twl->dev, "unsupported T2 transceiver mode %d\n", mode); break; }; }
static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode) { twl->usb_mode = mode; switch (mode) { case T2_USB_MODE_ULPI: twl4030_usb_clear_bits(twl, IFC_CTRL, IFC_CTRL_CARKITMODE); twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB); twl4030_usb_clear_bits(twl, FUNC_CTRL, FUNC_CTRL_XCVRSELECT_MASK | FUNC_CTRL_OPMODE_MASK); break; /* case T2_USB_MODE_CEA2011_3PIN: twl4030_cea2011_3_pin_FS_setup(twl); break; */ default: /* FIXME: power on defaults */ break; }; }
int twl4030_usb_reset(void) { TRACE_ENTRY; #if 0 twl4030_usb_clear_bits(OTG_CTRL, DMPULLDOWN | DPPULLDOWN); twl4030_usb_clear_bits(USB_INT_EN_RISE, ~0); twl4030_usb_clear_bits(USB_INT_EN_FALL, ~0); twl4030_usb_clear_bits(MCPC_IO_CTRL, ~TXDTYP); twl4030_usb_set_bits(MCPC_IO_CTRL, TXDTYP); twl4030_usb_clear_bits(OTHER_FUNC_CTRL, (BDIS_ACON_EN | FIVEWIRE_MODE)); twl4030_usb_clear_bits(OTHER_IFC_CTRL, ~0); twl4030_usb_clear_bits(OTHER_INT_EN_RISE, ~0); twl4030_usb_clear_bits(OTHER_INT_EN_FALL, ~0); twl4030_usb_clear_bits(OTHER_IFC_CTRL2, ~0); twl4030_usb_clear_bits(REG_CTRL_EN, ULPI_I2C_CONFLICT_INTEN); twl4030_usb_clear_bits(OTHER_FUNC_CTRL2, VBAT_TIMER_EN); #endif /* Enable writing to power configuration registers */ i2c_write_reg(TWL_I2C_BUS, TWL_PM_RECEIVER_ADDR, PROTECT_KEY, 0xC0); i2c_write_reg(TWL_I2C_BUS, TWL_PM_RECEIVER_ADDR, PROTECT_KEY, 0x0C); /* put VUSB3V1 LDO in active state */ i2c_write_reg(TWL_I2C_BUS, TWL_PM_RECEIVER_ADDR, VUSB_DEDICATED2, 0); /* input to VUSB3V1 LDO is from VBAT, not VBUS */ i2c_write_reg(TWL_I2C_BUS, TWL_PM_RECEIVER_ADDR, VUSB_DEDICATED1, 0x14); /* turn on 3.1V regulator */ i2c_write_reg(TWL_I2C_BUS, TWL_PM_RECEIVER_ADDR, VUSB3V1_DEV_GRP, 0x20); i2c_write_reg(TWL_I2C_BUS, TWL_PM_RECEIVER_ADDR, VUSB3V1_TYPE, 0); /* turn on 1.5V regulator */ i2c_write_reg(TWL_I2C_BUS, TWL_PM_RECEIVER_ADDR, VUSB1V5_DEV_GRP, 0x20); i2c_write_reg(TWL_I2C_BUS, TWL_PM_RECEIVER_ADDR, VUSB1V5_TYPE, 0); /* turn on 1.8V regulator */ i2c_write_reg(TWL_I2C_BUS, TWL_PM_RECEIVER_ADDR, VUSB1V8_DEV_GRP, 0x20); i2c_write_reg(TWL_I2C_BUS, TWL_PM_RECEIVER_ADDR, VUSB1V8_TYPE, 0); /* disable access to power configuration registers */ i2c_write_reg(TWL_I2C_BUS, TWL_PM_RECEIVER_ADDR, PROTECT_KEY, 0); /* turn on the phy */ uint8_t pwr = twl4030_usb_read(PHY_PWR_CTRL); pwr &= ~PHYPWD; twl4030_usb_write(PHY_PWR_CTRL, pwr); twl4030_usb_write(PHY_CLK_CTRL, twl4030_usb_read(PHY_CLK_CTRL) | (CLOCKGATING_EN | CLK32K_EN)); /* set DPLL i2c access mode */ twl4030_i2c_access(true); /* set ulpi mode */ twl4030_usb_clear_bits(IFC_CTRL, CARKITMODE); twl4030_usb_set_bits(POWER_CTRL, OTG_ENAB); twl4030_usb_write(FUNC_CTRL, XCVRSELECT_HS); // set high speed mode // twl4030_usb_write(FUNC_CTRL, XCVRSELECT_FS); // set full speed mode twl4030_i2c_access(false); return 0; }