static void setup_pin(struct egpio_info *ei, struct htc_egpio_pinInfo *pi)
{
int pin = pi->gpio & GPIO_BASE_MASK;
if (pi->gpio < 0 || pin > 16*MAX_EGPIO_REGS) {
printk(KERN_ERR "EGPIO invalid pin %d\n", pi->gpio);
return;
}
switch (pi->type) {
case HTC_EGPIO_TYPE_INPUT:
if (pi->input_irq < 0)
break;
pin = pi->input_irq & GPIO_BASE_MASK;
if (ei->ackRegister != u16pos(pin)) {
printk(KERN_ERR "EGPIO irq conflict %d vs %d\n"
, ei->ackRegister, u16pos(pin));
return;
}
break;
case HTC_EGPIO_TYPE_OUTPUT:
if (ei->maxRegs < u16pos(pin))
ei->maxRegs = u16pos(pin);
if (pi->output_initial)
ei->cached_values[u16pos(pin)] |= u16bit(pin);
break;
default:
printk(KERN_ERR "EGPIO unknown type %d\n", pi->type);
}
}
/* Check an input pin to see if it is active. */
static int egpio_get(struct device *dev, unsigned gpio)
{
unsigned bit = gpio & GPIO_BASE_MASK;
struct egpio_info *ei = dev_get_drvdata(dev);
u16 readval = readw(&ei->addrBase[u16pos(bit) << ei->bus_shift]);
return readval & u16bit(bit);
}
void
htcapache_egpio_clear(int bit)
{
int pos = u16pos(bit);
unsigned long flag;
spin_lock_irqsave(&outLock, flag);
cached_out_egpio[pos] &= ~u16bit(bit);
printk("egpio clear: reg %d = 0x%04x\n", pos, cached_out_egpio[pos]);
egpio[pos] = cached_out_egpio[pos];
spin_unlock_irqrestore(&outLock, flag);
}
static void egpio_set(struct device *dev, unsigned gpio, int val)
{
unsigned bit = gpio & GPIO_BASE_MASK;
struct egpio_info *ei = dev_get_drvdata(dev);
int pos = u16pos(bit);
unsigned long flag;
spin_lock_irqsave(&ei->lock, flag);
if (val) {
ei->cached_values[pos] |= u16bit(bit);
printk("egpio set: reg %d = 0x%04x\n"
, pos, ei->cached_values[pos]);
} else {
ei->cached_values[pos] &= ~u16bit(bit);
printk("egpio clear: reg %d = 0x%04x\n"
, pos, ei->cached_values[pos]);
}
writew(ei->cached_values[pos], &ei->addrBase[pos << ei->bus_shift]);
spin_unlock_irqrestore(&ei->lock, flag);
}
