static uint8_t u8g_dev_ssd1325_nhd27oled_2x_gr_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1325_2bit_nhd_27_12864ucy3_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
uint8_t i;
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
uint8_t *p = pb->buf;
u8g_uint_t cnt;
cnt = pb->width;
cnt >>= 2;
for( i = 0; i < pb->p.page_height; i++ )
{
u8g_dev_ssd1325_gr_prepare_row(u8g, dev, i); /* this will also enable chip select */
u8g_WriteSequence4LTo16GrDevice(u8g, dev, cnt, p);
u8g_SetChipSelect(u8g, dev, 0);
p+=cnt;
}
}
break;
case U8G_DEV_MSG_CONTRAST:
u8g_SetChipSelect(u8g, dev, 1);
u8g_SetAddress(u8g, dev, 0); /* instruction mode */
u8g_WriteByte(u8g, dev, 0x081);
u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 1);
u8g_SetChipSelect(u8g, dev, 0);
return 1;
case U8G_DEV_MSG_SLEEP_ON:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_on);
return 1;
case U8G_DEV_MSG_SLEEP_OFF:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_off);
return 1;
}
return u8g_dev_pb16h2_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_uc1610_dogxl160_bw_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_init_seq);
break;
case U8G_DEV_MSG_STOP:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_stop_seq);
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
int i;
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_data_start);
u8g_WriteByte(u8g, dev, 0x060 | (pb->p.page*2) ); /* select current page 1/2 (UC1610) */
u8g_SetAddress(u8g, dev, 1); /* data mode */
for( i = 0; i < WIDTH; i++ )
{
u8g_WriteByte(u8g, dev, u8g_dev_1to2( ((uint8_t *)(pb->buf))[i] ) );
}
u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_data_start);
u8g_WriteByte(u8g, dev, 0x060 | (pb->p.page*2+1) ); /* select current page 2/2 (UC1610) */
u8g_SetAddress(u8g, dev, 1); /* data mode */
for( i = 0; i < WIDTH; i++ )
{
u8g_WriteByte(u8g, dev, u8g_dev_1to2( ((uint8_t *)(pb->buf))[i] >> 4 ) );
}
u8g_SetChipSelect(u8g, dev, 0);
}
break;
case U8G_DEV_MSG_CONTRAST:
u8g_SetChipSelect(u8g, dev, 1);
u8g_SetAddress(u8g, dev, 0); /* instruction mode */
u8g_WriteByte(u8g, dev, 0x081);
u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 1);
u8g_SetChipSelect(u8g, dev, 0);
return 1;
}
return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_st7565_lm6059_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_lm6059_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_lm6059_data_start);
u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page)); /* select current page (ST7565R) */
u8g_SetAddress(u8g, dev, 1); /* data mode */
u8g_WriteSequence(u8g, dev, pb->width, pb->buf);
u8g_SetChipSelect(u8g, dev, 0);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_lm6059_data_start);
u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page+1)); /* select current page (ST7565R) */
u8g_SetAddress(u8g, dev, 1); /* data mode */
u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width);
u8g_SetChipSelect(u8g, dev, 0);
}
break;
case U8G_DEV_MSG_CONTRAST:
u8g_SetChipSelect(u8g, dev, 1);
u8g_SetAddress(u8g, dev, 0); /* instruction mode */
u8g_WriteByte(u8g, dev, 0x081);
u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
u8g_SetChipSelect(u8g, dev, 0);
return 1;
case U8G_DEV_MSG_SLEEP_ON:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_lm6059_sleep_on);
return 1;
case U8G_DEV_MSG_SLEEP_OFF:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_lm6059_sleep_off);
return 1;
}
return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_uc1610_dogxl160_2x_gr_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_init_seq);
break;
case U8G_DEV_MSG_STOP:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_stop_seq);
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_data_start);
u8g_WriteByte(u8g, dev, 0x060 | (pb->p.page*2) ); /* select current page (UC1610) */
u8g_SetAddress(u8g, dev, 1); /* data mode */
if ( u8g_WriteSequence(u8g, dev, WIDTH, pb->buf) == 0 )
return 0;
u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_data_start);
u8g_WriteByte(u8g, dev, 0x060 | (pb->p.page*2+1) ); /* select current page (UC1610) */
u8g_SetAddress(u8g, dev, 1); /* data mode */
if ( u8g_WriteSequence(u8g, dev, WIDTH, pb->buf+WIDTH) == 0 )
return 0;
u8g_SetChipSelect(u8g, dev, 0);
}
break;
case U8G_DEV_MSG_CONTRAST:
u8g_SetChipSelect(u8g, dev, 1);
u8g_SetAddress(u8g, dev, 0); /* instruction mode */
u8g_WriteByte(u8g, dev, 0x081);
u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 1);
u8g_SetChipSelect(u8g, dev, 0);
return 1;
}
return u8g_dev_pb16v2_base_fn(u8g, dev, msg, arg);
}
static void u8g_dev_ssd1325_1bit_prepare_page(u8g_t *u8g, u8g_dev_t *dev)
{
uint8_t page = ((u8g_pb_t *)(dev->dev_mem))->p.page;
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1325_1bit_nhd_27_12864ucy3_prepare_page_seq);
page <<= 3;
u8g_WriteByte(u8g, dev, page); /* start at the selected page */
page += 7;
u8g_WriteByte(u8g, dev, page); /* end within the selected page */
u8g_SetAddress(u8g, dev, 1); /* data mode */
}
uint8_t u8g_dev_ld7032_60x32_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ld7032_60x32_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ld7032_60x32_data_start);
u8g_WriteByte(u8g, dev, pb->p.page_y0); /* y start */
u8g_SetAddress(u8g, dev, 0); /* instruction mode */
u8g_WriteByte(u8g, dev, 0x008);
u8g_SetAddress(u8g, dev, 1); /* data mode */
if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
return 0;
u8g_SetChipSelect(u8g, dev, 0);
}
break;
case U8G_DEV_MSG_CONTRAST:
u8g_SetChipSelect(u8g, dev, 1);
u8g_SetAddress(u8g, dev, 0); /* instruction mode */
u8g_WriteByte(u8g, dev, 0x081);
u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
u8g_SetChipSelect(u8g, dev, 0);
return 1;
case U8G_DEV_MSG_SLEEP_ON:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ld7032_60x32_sleep_on);
return 1;
case U8G_DEV_MSG_SLEEP_OFF:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ld7032_60x32_sleep_off);
return 1;
}
return u8g_dev_pb8h1_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_ssd1309_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1309_128x64_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1309_128x64_data_start);
u8g_WriteByte(u8g, dev, 0x0b0 | pb->p.page); /* select current page (SSD1306) */
u8g_SetAddress(u8g, dev, 1); /* data mode */
if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
return 0;
u8g_SetChipSelect(u8g, dev, 0);
}
break;
case U8G_DEV_MSG_CONTRAST:
u8g_SetChipSelect(u8g, dev, 1);
u8g_SetAddress(u8g, dev, 0); /* instruction mode */
u8g_WriteByte(u8g, dev, 0x081);
u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
u8g_SetChipSelect(u8g, dev, 0);
return 1;
case U8G_DEV_MSG_SLEEP_ON:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_on);
return 1;
case U8G_DEV_MSG_SLEEP_OFF:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_off);
return 1;
}
return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_pcf8812_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_pcf8812_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_SetAddress(u8g, dev, 0); /* command mode */
u8g_SetChipSelect(u8g, dev, 1);
u8g_WriteByte(u8g, dev, 0x020 ); /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
u8g_WriteByte(u8g, dev, 0x080 ); /* set X address */
u8g_WriteByte(u8g, dev, 0x040 | pb->p.page); /* set Y address */
u8g_SetAddress(u8g, dev, 1); /* data mode */
if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
return 0;
/* mirrored output, not tested*/
/*
{
uint8_t i = pb->width;
while( i > 0 )
{
i--;
u8g_WriteByte(u8g, dev, ((unsigned char *)pb->buf)[i] );
}
}
*/
u8g_SetChipSelect(u8g, dev, 0);
}
break;
case U8G_DEV_MSG_CONTRAST:
/* the contrast adjustment does not work, needs to be analysed */
u8g_SetAddress(u8g, dev, 0); /* instruction mode */
u8g_SetChipSelect(u8g, dev, 1);
u8g_WriteByte(u8g, dev, 0x021); /* command mode, extended function set */
u8g_WriteByte(u8g, dev, 0x080 | ( (*(uint8_t *)arg) >> 1 ) );
u8g_SetChipSelect(u8g, dev, 0);
return 1;
}
return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_st7920_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7920_128x64_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
uint8_t y, i;
uint8_t *ptr;
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_SetAddress(u8g, dev, 0); /* cmd mode */
u8g_SetChipSelect(u8g, dev, 1);
y = pb->p.page_y0;
ptr = pb->buf;
for( i = 0; i < 8; i ++ )
{
u8g_SetAddress(u8g, dev, 0); /* cmd mode */
u8g_WriteByte(u8g, dev, 0x03e ); /* enable extended mode */
if ( y < 32 )
{
u8g_WriteByte(u8g, dev, 0x080 | y ); /* y pos */
u8g_WriteByte(u8g, dev, 0x080 ); /* set x pos to 0*/
}
else
{
u8g_WriteByte(u8g, dev, 0x080 | (y-32) ); /* y pos */
u8g_WriteByte(u8g, dev, 0x080 | 8); /* set x pos to 64*/
}
//u8g_WriteByte(u8g, dev, 0x080 | y ); /* y pos */
//u8g_WriteByte(u8g, dev, 0x080 ); /* set x pos to 0*/
u8g_SetAddress(u8g, dev, 1); /* data mode */
u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
ptr += WIDTH/8;
y++;
}
u8g_SetChipSelect(u8g, dev, 0);
}
break;
}
return u8g_dev_pb8h1_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_ssd1306_128x32_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1306_128x32_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1306_128x32_data_start);
u8g_WriteByte(u8g, dev, 0x0b0 | (pb->p.page*2)); /* select current page (SSD1306) */
u8g_SetAddress(u8g, dev, 1); /* data mode */
u8g_WriteSequence(u8g, dev, pb->width, (uint8_t*)pb->buf);
u8g_SetChipSelect(u8g, dev, 0);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1306_128x32_data_start);
u8g_WriteByte(u8g, dev, 0x0b0 | (pb->p.page*2+1)); /* select current page (SSD1306) */
u8g_SetAddress(u8g, dev, 1); /* data mode */
u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width);
u8g_SetChipSelect(u8g, dev, 0);
}
break;
case U8G_DEV_MSG_SLEEP_ON:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_on);
return 1;
case U8G_DEV_MSG_SLEEP_OFF:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_off);
return 1;
}
return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_st7565_lm6059_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_lm6059_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_lm6059_data_start);
u8g_WriteByte(u8g, dev, 0x0b0 | pb->p.page); /* select current page (ST7565R) */
u8g_SetAddress(u8g, dev, 1); /* data mode */
if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
return 0;
u8g_SetChipSelect(u8g, dev, 0);
}
break;
}
return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_lc7981_160x80_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_NONE);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_lc7981_160x80_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
uint8_t y, i;
uint16_t disp_ram_adr;
uint8_t *ptr;
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_SetAddress(u8g, dev, 1); /* cmd mode */
u8g_SetChipSelect(u8g, dev, 1);
y = pb->p.page_y0;
ptr = (uint8_t *)(pb->buf); //Spark, modified from ptr = pb->buf
disp_ram_adr = WIDTH/8;
disp_ram_adr *= y;
for( i = 0; i < 8; i ++ )
{
u8g_SetAddress(u8g, dev, 1); /* cmd mode */
u8g_WriteByte(u8g, dev, 0x00a ); /* display ram (cursor) address low byte */
u8g_SetAddress(u8g, dev, 0); /* data mode */
u8g_WriteByte(u8g, dev, disp_ram_adr & 0x0ff );
u8g_SetAddress(u8g, dev, 1); /* cmd mode */
u8g_WriteByte(u8g, dev, 0x00b ); /* display ram (cursor) address hight byte */
u8g_SetAddress(u8g, dev, 0); /* data mode */
u8g_WriteByte(u8g, dev, disp_ram_adr >> 8 );
u8g_SetAddress(u8g, dev, 1); /* cmd mode */
u8g_WriteByte(u8g, dev, 0x00c ); /* write data */
u8g_SetAddress(u8g, dev, 0); /* data mode */
u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
ptr += WIDTH/8;
disp_ram_adr += WIDTH/8;
}
u8g_SetChipSelect(u8g, dev, 0);
}
break;
}
return u8g_dev_pb8h1f_base_fn(u8g, dev, msg, arg);
}
static void u8g_dev_ssd1327_2bit_2x_prepare_page(u8g_t *u8g, u8g_dev_t *dev, uint8_t is_odd)
{
uint8_t page = ((u8g_pb_t *)(dev->dev_mem))->p.page;
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1327_2bit_96x96_prepare_page_seq);
page <<= 1;
page += is_odd;
page <<= 2;
u8g_WriteByte(u8g, dev, page); /* start at the selected page */
page += 3;
u8g_WriteByte(u8g, dev, page); /* end within the selected page */
u8g_SetAddress(u8g, dev, 1); /* data mode */
}
static void u8g_dev_ssd1322_1bit_prepare_row(u8g_t *u8g, u8g_dev_t *dev, uint8_t delta_row)
{
uint8_t row = ((u8g_pb_t *)(dev->dev_mem))->p.page;
row *= ((u8g_pb_t *)(dev->dev_mem))->p.page_height;
row += delta_row;
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1322_1bit_nhd_312_prepare_page_seq);
u8g_WriteByte(u8g, dev, row); /* start at the selected row */
u8g_WriteByte(u8g, dev, row+1); /* end within the selected row */
u8g_SetAddress(u8g, dev, 0); /* instruction mode mode */
u8g_WriteByte(u8g, dev, 0x05c); /* write to ram */
u8g_SetAddress(u8g, dev, 1); /* data mode */
}
/*******************************************************************************
* jlx240160g-676 4x peed driver. More ram.
******************************************************************************/
uint8_t u8g_dev_st75256_jlx240160g676_4x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
uint16_t i;
switch (msg) {
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev, NULL);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st75256_init_seq);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st75256_data_start1);
u8g_WriteByte(u8g, dev, 1); // Set start page
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st75256_data_start2);
for (i = 0; i < (WIDTH * HEIGHT/PAGE_HEIGHT); i++) {
u8g_WriteByte(u8g, dev, 0x00); //Заполняем дисплей белым
}
break;
case U8G_DEV_MSG_PAGE_NEXT: {
uint8_t y, i;
uint8_t *ptr;
u8g_pb_t *pb = (u8g_pb_t *) (dev->dev_mem);
u8g_SetChipSelect(u8g, dev, 1);
y = pb->p.page_y0;
ptr = pb->buf;
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st75256_data_start1);
u8g_WriteByte(u8g, dev, 1 + y); // Set start page
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st75256_data_start2);
for (i = 0; i < 4; i++) {
u8g_WriteSequence(u8g, dev, WIDTH, ptr);
ptr += WIDTH;
y++;
}
u8g_SetChipSelect(u8g, dev, 0);
}
break;
case U8G_DEV_MSG_CONTRAST:
u8g_SetChipSelect(u8g, dev, 1);
u8g_SetAddress(u8g, dev, 0); /* instruction mode */
u8g_WriteByte(u8g, dev, 0x81);
u8g_SetAddress(u8g, dev, 1); /* data mode */
u8g_WriteByte(u8g, dev, (*(uint8_t *) arg % 64));
u8g_WriteByte(u8g, dev, 3 + (*(uint8_t *) arg / 64));
u8g_SetChipSelect(u8g, dev, 0);
return 1;
case U8G_DEV_MSG_SLEEP_ON:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st75256_sleep_on);
return 1;
case U8G_DEV_MSG_SLEEP_OFF:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_st75256_sleep_off);
return 1;
}
return u8g_dev_pb32v1_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_t6963_240x128_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_t6963_240x128_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
uint8_t y, i;
uint16_t disp_ram_adr;
uint8_t *ptr;
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_SetAddress(u8g, dev, 0); /* data mode */
u8g_SetChipSelect(u8g, dev, 1);
y = pb->p.page_y0;
ptr = pb->buf;
disp_ram_adr = WIDTH/8;
disp_ram_adr *= y;
for( i = 0; i < PAGE_HEIGHT; i ++ )
{
u8g_SetAddress(u8g, dev, 0); /* data mode */
u8g_WriteByte(u8g, dev, disp_ram_adr&255 ); /* address low byte */
u8g_WriteByte(u8g, dev, disp_ram_adr>>8 ); /* address hight byte */
u8g_SetAddress(u8g, dev, 1); /* cmd mode */
u8g_WriteByte(u8g, dev, 0x024 ); /* set adr ptr */
u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
ptr += WIDTH/8;
disp_ram_adr += WIDTH/8;
}
u8g_SetAddress(u8g, dev, 0); /* data mode */
u8g_SetChipSelect(u8g, dev, 0);
}
break;
}
return u8g_dev_pb16h1_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_sbn1661_122x32_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_NONE);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_sbn1661_122x32_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_SetAddress(u8g, dev, 0); /* command mode */
u8g_SetChipSelect(u8g, dev, 1);
u8g_WriteByte(u8g, dev, 0x0b8 | pb->p.page); /* select current page (SBN1661/SED1520) */
u8g_WriteByte(u8g, dev, 0x000 ); /* set X address */
u8g_SetAddress(u8g, dev, 1); /* data mode */
u8g_WriteSequence(u8g, dev, WIDTH/2, pb->buf);
u8g_SetAddress(u8g, dev, 0); /* command mode */
u8g_SetChipSelect(u8g, dev, 2);
u8g_WriteByte(u8g, dev, 0x0b8 | pb->p.page); /* select current page (SBN1661/SED1520) */
u8g_WriteByte(u8g, dev, 0x000 ); /* set X address */
u8g_SetAddress(u8g, dev, 1); /* data mode */
u8g_WriteSequence(u8g, dev, WIDTH/2, WIDTH/2+(uint8_t *)pb->buf);
u8g_SetChipSelect(u8g, dev, 0);
}
break;
case U8G_DEV_MSG_CONTRAST:
break;
}
return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_ks0108_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ks0108_128x64_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_SetAddress(u8g, dev, 0); /* command mode */
u8g_SetChipSelect(u8g, dev, 2);
u8g_WriteByte(u8g, dev, 0x0b8 | pb->p.page); /* select current page (KS0108b) */
u8g_WriteByte(u8g, dev, 0x040 ); /* set address 0 */
u8g_SetAddress(u8g, dev, 1); /* data mode */
u8g_WriteSequence(u8g, dev, 64, pb->buf);
u8g_SetChipSelect(u8g, dev, 0);
u8g_SetAddress(u8g, dev, 0); /* command mode */
u8g_SetChipSelect(u8g, dev, 1);
u8g_WriteByte(u8g, dev, 0x0b8 | pb->p.page); /* select current page (KS0108b) */
u8g_WriteByte(u8g, dev, 0x040 ); /* set address 0 */
u8g_SetAddress(u8g, dev, 1); /* data mode */
u8g_WriteSequence(u8g, dev, 64, 64+(uint8_t *)pb->buf);
u8g_SetChipSelect(u8g, dev, 0);
}
break;
}
return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_tls8204_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_tls8204_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_SetAddress(u8g, dev, 0); /* command mode */
u8g_SetChipSelect(u8g, dev, 1);
u8g_WriteByte(u8g, dev, 0x020 ); /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
u8g_WriteByte(u8g, dev, 0x080 ); /* set X address */
u8g_WriteByte(u8g, dev, 0x040 | pb->p.page); /* set Y address */
u8g_SetAddress(u8g, dev, 1); /* data mode */
if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
return 0;
u8g_SetChipSelect(u8g, dev, 0);
}
break;
case U8G_DEV_MSG_CONTRAST:
/* the contrast adjustment does not work, needs to be analysed */
u8g_SetAddress(u8g, dev, 0); /* instruction mode */
u8g_SetChipSelect(u8g, dev, 1);
u8g_WriteByte(u8g, dev, 0x021); /* command mode, extended function set */
u8g_WriteByte(u8g, dev, 0x080 | ( (*(uint8_t *)arg) >> 1 ) );
u8g_WriteByte(u8g, dev, 0x020); /* command mode, extended function set */
u8g_SetChipSelect(u8g, dev, 0);
return 1;
}
return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_ssd1351_128x128_18bpp_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_50NS);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1351_128x128_18bpp_init_seq);
break;
case U8G_DEV_MSG_SLEEP_ON:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_on);
return 1;
case U8G_DEV_MSG_SLEEP_OFF:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_off);
return 1;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_FIRST:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1351_128x128_column_seq);
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
uint8_t i, j, k;
uint8_t page_height;
uint8_t *ptr = pb->buf;
u8g_SetChipSelect(u8g, dev, 1);
page_height = pb->p.page_y1;
page_height -= pb->p.page_y0;
page_height++;
for( j = 0; j < page_height; j++ ) { /* for each line in the page... */
for (i = 0; i < pb->width; i+= RGB332_STREAM_BYTES ) { /* for each stream in the line... */
/* Convert the pixel data from 24bpp to 18bpp. This discards the
* lower two bits of source data for each color channel, so any
* 18-bpp source data must be left-shifted to accommodate.
*/
uint8_t *dest = u8g_ssd1351_stream_bytes;
for ( k = 0; k < RGB332_STREAM_BYTES*3; k++ ) { /* for each pixel in the stream... */
*dest++ = *ptr++ >> 2;
}
/* Write the stream out to the display: */
u8g_WriteSequence(
u8g, dev, RGB332_STREAM_BYTES*3, u8g_ssd1351_stream_bytes
);
}
}
u8g_SetChipSelect(u8g, dev, 0);
break; /* continue to base fn */
}
case U8G_DEV_MSG_GET_MODE:
return U8G_MODE_18BPP;
}
return u8g_dev_pbxh24_base_fn(u8g, dev, msg, arg);
}