static void imapx200_serial_start_tx(struct uart_port *port)
{
struct imapx200_uart_port *ourport = to_ourport(port);
if (!tx_enabled(port))
{
if (port->flags & UPF_CONS_FLOW)
imapx200_serial_rx_disable(port);
uart_enable_irq(port, UART_TX_INT);
uart_enable_irq(port, UART_THRE_INT);
tx_enabled(port) = 1;
}
}
static int fh_uart_putc(struct rt_serial_device *serial, char c)
{
struct fh_uart *uart = serial->parent.user_data;
unsigned int ret;
ret = uart_get_status(uart->uart_port);
if(serial->parent.open_flag & RT_DEVICE_FLAG_INT_TX) {
//RT_DEVICE_FLAG_INT_TX
if(c == '\n') {
fh_uart_putc(serial,'\r');
}
if(ret & UART_USR_TFNF) {
uart_putc(uart->uart_port, c);
return 1;
}
//open tx isr here..
uart_enable_irq(uart->uart_port,UART_IER_ETBEI);
return -1;
}
//poll mode
else {
while(!(uart_get_status(uart->uart_port) & UART_USR_TFNF))
;
uart_putc(uart->uart_port, c);
return 1;
}
}
static int imapx200_serial_startup(struct uart_port *port)
{
struct imapx200_uart_port *ourport = to_ourport(port);
int ret;
unsigned long flags;
dbg("imapx200_serial_startup: port=%p (%08lx,%p)\n",
port->mapbase, port->membase);
// local_irq_save(flags);
rx_enabled(port) = 1;
// tx_enabled(port) = 1;
uart_enable_irq(port, UART_RX_INT);
uart_enable_irq(port, UART_ERR_INT);
// uart_enable_irq(port, UART_THRE_INT);
ret = request_irq(UART_IRQ(port), imapx200_serial_interrupt, IRQF_DISABLED,
imapx200_serial_portname(port), ourport);
if (ret != 0)
{
printk(KERN_ERR "cannot get irq %d\n", UART_IRQ(port));
goto err;
}
ourport->tx_claimed = 1;
ourport->rx_claimed = 1;
dbg("imapx200_serial_startup ok\n");
/* the port reset code should have done the correct
* register setup for the port controls */
// local_irq_restore(flags);
return ret;
err:
imapx200_serial_shutdown(port);
return ret;
}
static int s3c_serial_startup(struct uart_port *port)
{
struct s3c_uart_port *ourport = to_ourport(port);
unsigned long flags;
int ret;
dbg("s3c_serial_startup: port=%p (%08lx,%p)\n",
port->mapbase, port->membase);
local_irq_save(flags);
rx_enabled(port) = 1;
tx_enabled(port) = 1;
#ifdef UART_HAS_INTMSK
uart_enable_irq(port, UART_TX_INT | UART_RX_INT);
ret = request_irq(UART_IRQ(port), s3c_serial_interrupt, 0,
s3c_serial_portname(port), ourport);
if (ret != 0) {
printk(KERN_ERR "cannot get irq %d\n", UART_IRQ(port));
return ret;
}
#else
ret = request_irq(RX_IRQ(port),
s3c_serial_rx_chars, 0,
s3c_serial_portname(port), ourport);
if (ret != 0) {
printk(KERN_ERR "cannot get irq %d\n", RX_IRQ(port));
return ret;
}
ret = request_irq(TX_IRQ(port),
s3c_serial_tx_chars, 0,
s3c_serial_portname(port), ourport);
if (ret) {
printk(KERN_ERR "cannot get irq %d\n", TX_IRQ(port));
s3c_serial_shutdown(port);
local_irq_restore(flags);
return ret;
}
#endif
ourport->rx_claimed = 1;
ourport->tx_claimed = 1;
dbg("s3c_serial_startup ok\n");
/* the port reset code should have done the correct
* register setup for the port controls */
local_irq_restore(flags);
return ret;
}
static void s3c_serial_start_tx(struct uart_port *port)
{
if (!tx_enabled(port)) {
if (port->flags & UPF_CONS_FLOW)
s3c_serial_rx_disable(port);
#ifdef UART_HAS_INTMSK
uart_enable_irq(port, UART_TX_INT);
#else
enable_irq(TX_IRQ(port));
#endif
tx_enabled(port) = 1;
}
}
static rt_err_t fh_uart_control(struct rt_serial_device *serial,
int cmd, void *arg)
{
struct fh_uart* uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct fh_uart *)serial->parent.user_data;
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:
/* disable rx irq */
rt_hw_interrupt_mask(uart->irq);
uart_disable_irq(uart->uart_port,UART_IER_ERBFI);
break;
case RT_DEVICE_CTRL_SET_INT:
/* enable rx irq */
rt_hw_interrupt_umask(uart->irq);
uart_enable_irq(uart->uart_port,UART_IER_ERBFI);
break;
}
return RT_EOK;
}
/**
* UART device in RT-Thread
*/
static rt_err_t fh_uart_configure(struct rt_serial_device *serial,
struct serial_configure *cfg)
{
int div;
enum data_bits data_mode;
enum stop_bits stop_mode;
enum parity parity_mode;
struct fh_uart *uart;
RT_ASSERT(serial != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
uart = (struct fh_uart *)serial->parent.user_data;
switch (cfg->data_bits)
{
case DATA_BITS_8:
data_mode = UART_DATA_BIT8;
break;
case DATA_BITS_7:
data_mode = UART_DATA_BIT7;
break;
case DATA_BITS_6:
data_mode = UART_DATA_BIT6;
break;
case DATA_BITS_5:
data_mode = UART_DATA_BIT5;
break;
default:
data_mode = UART_DATA_BIT8;
break;
}
switch (cfg->stop_bits)
{
case STOP_BITS_2:
stop_mode = UART_STOP_BIT2;
break;
case STOP_BITS_1:
default:
stop_mode = UART_STOP_BIT1;
break;
}
switch (cfg->parity)
{
case PARITY_ODD:
parity_mode = UART_PARITY_ODD;
break;
case PARITY_EVEN:
parity_mode = UART_PARITY_EVEN;
break;
case PARITY_NONE:
default:
parity_mode = UART_PARITY_NONE;
break;
}
uart_disable_irq(uart->uart_port, UART_IER_ERBFI);
uart_configure(uart->uart_port, data_mode,
stop_mode, parity_mode,
cfg->baud_rate, UART_CLOCK_FREQ);
uart_enable_irq(uart->uart_port, UART_IER_ERBFI);
return RT_EOK;
}
