void vBSP430uptimeResume_ni (void) { ulBSP430uptimeConversionFrequency_Hz_ni_ = ulBSP430timerFrequency_Hz_ni(BSP430_UPTIME_TIMER_PERIPH_HANDLE); #if (configBSP430_UPTIME_DELAY - 0) delayAlarm_.flags |= DELAY_ALARM_TIMER_ACTIVE; (void)delayAlarmSetRegistered_ni_(1); #endif /* configBSP430_UPTIME_DELAY */ xBSP430uptimeTIMER_->hpl->ctl |= MC_2; }
void main () { volatile sBSP430hplPORTIE * b0hpl; hBSP430halTIMER b0timer_hal; int b0pin = iBSP430portBitPosition(BSP430_PLATFORM_BUTTON0_PORT_BIT); struct sBSP430timerPulseCapture pulsecap_state; hBSP430timerPulseCapture pulsecap; unsigned long freq_Hz; int rc; vBSP430platformInitialize_ni(); (void)iBSP430consoleInitialize(); cprintf("\npulsecap " __DATE__ " " __TIME__ "\n"); cprintf("There's supposed to be a button at %s.%u\n", xBSP430portName(BSP430_PLATFORM_BUTTON0_PORT_PERIPH_HANDLE), b0pin); b0hpl = xBSP430hplLookupPORTIE(BSP430_PLATFORM_BUTTON0_PORT_PERIPH_HANDLE); if (NULL == b0hpl) { cprintf("Guess it's not there. Never mind.\n"); return; } cprintf("Found it at %p. Now looking for timer HAL.\n", b0hpl); b0timer_hal = hBSP430timerLookup(BUTTON0_TIMER_PERIPH_HANDLE); if (NULL == b0timer_hal) { cprintf("That's not there, though. Going away now.\n"); return; } vBSP430timerResetCounter_ni(b0timer_hal); b0timer_hal->hpl->ctl = TASSEL__SMCLK | MC__CONTINOUS | TBCLR | TBIE; vBSP430timerInferHints_ni(b0timer_hal); freq_Hz = ulBSP430timerFrequency_Hz_ni(BUTTON0_TIMER_PERIPH_HANDLE); cprintf("Cool, we're good to go with a %lu Hz timer at %p, now %lu.\n", freq_Hz, b0timer_hal, ulBSP430timerCounter_ni(b0timer_hal, NULL)); /* Configure the port for its primary peripheral function */ b0hpl->dir &= ~BSP430_PLATFORM_BUTTON0_PORT_BIT; BSP430_PORT_HPL_SET_REN(b0hpl, BSP430_PLATFORM_BUTTON0_PORT_BIT, BSP430_PORT_REN_PULL_UP); BSP430_PORT_HPL_SET_SEL(b0hpl, BSP430_PLATFORM_BUTTON0_PORT_BIT, 1); pulsecap = hBSP430timerPulseCaptureInitialize(&pulsecap_state, BUTTON0_TIMER_PERIPH_HANDLE, BUTTON0_TIMER_CCIDX, BUTTON0_TIMER_CCIS, BSP430_TIMER_PULSECAP_START_CALLBACK | BSP430_TIMER_PULSECAP_END_CALLBACK, pulsecap_callback_ni); if (NULL == pulsecap) { cprintf("Sorry, pulsecap initialization failed\n"); return; } cprintf("%s.%u%c cctl %04x; pulsecap %p flags %04x\n", xBSP430timerName(BUTTON0_TIMER_PERIPH_HANDLE), BUTTON0_TIMER_CCIDX, 'A' + (BUTTON0_TIMER_CCIS / CCIS0), b0timer_hal->hpl->cctl[BUTTON0_TIMER_CCIDX], pulsecap, pulsecap->flags_ni); /* Need to enable interrupts so timer overflow events are properly * acknowledged */ BSP430_CORE_ENABLE_INTERRUPT(); rc = iBSP430timerPulseCaptureEnable(pulsecap); cprintf("Enable got %d\n", rc); rc = iBSP430timerPulseCaptureActivate(pulsecap); cprintf("Activate got %d\n", rc); while (1) { unsigned int flags; unsigned long pulseWidth_tt; unsigned int overflows; unsigned int activehighs; BSP430_CORE_DISABLE_INTERRUPT(); do { flags = pulsecap_state.flags_ni; pulseWidth_tt = pulseWidth_tt_v; overflows = overflows_v; activehighs = activehighs_v; } while (0); BSP430_CORE_ENABLE_INTERRUPT(); cprintf("Timer %lu flags %04x ; %u over %u activehigh\n", ulBSP430timerCounter(b0timer_hal, NULL), flags, overflows, activehighs); if (0 != pulseWidth_tt) { cprintf("\tNew width: %lu ticks = %lu us\n", pulseWidth_tt, (unsigned long)((1000ULL * pulseWidth_tt) / (freq_Hz / 1000UL))); pulseWidth_tt = 0; } BSP430_CORE_DELAY_CYCLES(BSP430_CLOCK_NOMINAL_MCLK_HZ); } }
void main () { volatile sBSP430hplTIMER * const hpl = xBSP430hplLookupTIMER(BSP430_PERIPH_TA0); unsigned long ta0_Hz; unsigned int delta_ta0; const struct sLPMconfig * lcp = lpm_configs; const struct sLPMconfig * const elcp = lpm_configs + sizeof(lpm_configs)/sizeof(*lpm_configs); vBSP430platformInitialize_ni(); (void)iBSP430consoleInitialize(); TA0CTL = TASSEL_1 | MC_2 | TACLR; ta0_Hz = ulBSP430timerFrequency_Hz_ni(BSP430_PERIPH_TA0); #if 0 /* This sequence eliminates the wakeup delay on the MSP430F5438A. * The ramifications of doing this are to be found in the Power * Management Module and Supply Voltage Supervisor chapter of the * 5xx/6xx Family User's Guide, in the section "SVS and SVM * Performance Modes and Wakeup Times". * * Also check MCU errata related to the PMM. THere are several that * appear relevant when changing the module from its power-up * state. */ PMMCTL0_H = PMMPW_H; #if 1 /* This variant works */ SVSMLCTL &= ~(SVSLE | SVMLE); #else /* This appears to have no effect, though it should work. */ SVSMLCTL |= SVSLFP; #endif PMMCTL0_H = !PMMPW_H; #endif BSP430_CORE_ENABLE_INTERRUPT(); cputs("\n\nTimer LPM wake delay test\n"); delta_ta0 = ta0_Hz / 4; cprintf("TA0 is at %lu Hz; sleep time %u ticks\n", ta0_Hz, delta_ta0); cprintf("Standard mode SR is %04x\n", __read_status_register()); cprintf("SR bits: SCG0 %04x ; SCG1 %04x\n", SCG0, SCG1); cprintf("LPM exit from ISRs clears: %04x\n", BSP430_CORE_LPM_EXIT_MASK); cputs("LPMx CCR0 CAP0 Delta0 CCR1 CAP1 Delta1 SR"); while (lcp < elcp) { unsigned int tar; cprintf("%s: ", lcp->tag); BSP430_CORE_DISABLE_INTERRUPT(); ta0r = 0; hpl->cctl[0] = CCIE; tar = uiBSP430timerAsyncCounterRead_ni(hpl); hpl->ccr[0] = tar + delta_ta0; BSP430_CORE_LPM_ENTER_NI(lcp->lpm_bits); cprintf("%5u %5u %5u ", hpl->ccr[0], ta0r, ta0r-hpl->ccr[0]); BSP430_CORE_DISABLE_INTERRUPT(); ta0r = 0; hpl->cctl[1] = CCIE; tar = uiBSP430timerAsyncCounterRead_ni(hpl); hpl->ccr[1] = tar + delta_ta0; BSP430_CORE_LPM_ENTER_NI(lcp->lpm_bits); cprintf("%5u %5u %5u ", hpl->ccr[1], ta0r, ta0r-hpl->ccr[1]); cprintf("%04x\n", __read_status_register()); ++lcp; } cprintf("Done\n"); }