static uint32_t *common_handler(int irq, uint32_t *regs) { board_led_on(LED_INIRQ); /* Current regs non-zero indicates that we are processing an interrupt; * current_regs is also used to manage interrupt level context switches. * * Nested interrupts are not supported. */ DEBUGASSERT(current_regs == NULL); current_regs = regs; /* Deliver the IRQ */ irq_dispatch(irq, regs); #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then * current_regs will have a different value than it did on entry. If an * interrupt level context switch has occurred, then restore the floating * point state and the establish the correct address environment before * returning from the interrupt. */ if (regs != current_regs) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ up_restorefpu((uint32_t*)current_regs); #endif #ifdef CONFIG_ARCH_ADDRENV /* Make sure that the address environment for the previously * running task is closed down gracefully (data caches dump, * MMU flushed) and set up the address environment for the new * thread at the head of the ready-to-run list. */ (void)group_addrenv(NULL); #endif } #endif /* If a context switch occurred while processing the interrupt then * current_regs may have change value. If we return any value different * from the input regs, then the lower level will know that a context * switch occurred during interrupt processing. */ regs = (uint32_t*)current_regs; /* Set current_regs to NULL to indicate that we are no longer in an * interrupt handler. */ current_regs = NULL; return regs; }
void up_decodeirq(uint32_t* regs) { #ifdef CONFIG_SUPPRESS_INTERRUPTS lowsyslog(LOG_ERR, "Unexpected IRQ\n"); current_regs = regs; PANIC(); #else uint32_t regval; int irq; /* Current regs non-zero indicates that we are processing an interrupt; * current_regs is also used to manage interrupt level context switches. * * Nested interrupts are not supported. */ DEBUGASSERT(current_regs == NULL); current_regs = regs; /* Loop while there are pending interrupts to be processed */ do { /* Decode the interrupt. First, fetch the NIVECSR register. */ regval = getreg32(IMX_AITC_NIVECSR); /* The MS 16 bits of the NIVECSR register contains vector index for the * highest pending normal interrupt. */ irq = regval >> AITC_NIVECSR_NIVECTOR_SHIFT; /* If irq < 64, then this is the IRQ. If there is no pending interrupt, * then irq will be >= 64 (it will be 0xffff for illegal source). */ if (irq < NR_IRQS) { /* Mask and acknowledge the interrupt */ up_maskack_irq(irq); /* Deliver the IRQ */ irq_dispatch(irq, regs); #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then * current_regs will have a different value than it did on entry. * If an interrupt level context switch has occurred, then restore * the floating point state and the establish the correct address * environment before returning from the interrupt. */ if (regs != current_regs) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ up_restorefpu((uint32_t*)current_regs); #endif #ifdef CONFIG_ARCH_ADDRENV /* Make sure that the address environment for the previously * running task is closed down gracefully (data caches dump, * MMU flushed) and set up the address environment for the new * thread at the head of the ready-to-run list. */ (void)group_addrenv(NULL); #endif } #endif /* Unmask the last interrupt (global interrupts are still * disabled). */ up_enable_irq(irq); } } while (irq < NR_IRQS); /* Set current_regs to NULL to indicate that we are no longer in * an interrupt handler. */ current_regs = NULL; #endif }
void up_decodeirq(uint32_t* regs) { #ifdef CONFIG_SUPPRESS_INTERRUPTS lowsyslog("Unexpected IRQ\n"); current_regs = regs; PANIC(); #else /* Decode the interrupt. First, fetch the interrupt id register. */ uint16_t irqentry = getreg16(DM320_INTC_IRQENTRY0); /* The irqentry value is an offset into a table. Zero means no interrupt. */ if (irqentry != 0) { /* If non-zero, then we can map the table offset into an IRQ number */ int irq = (irqentry >> 2) - 1; /* Verify that the resulting IRQ number is valid */ if ((unsigned)irq < NR_IRQS) { /* Mask and acknowledge the interrupt */ up_maskack_irq(irq); /* Current regs non-zero indicates that we are processing an interrupt; * current_regs is also used to manage interrupt level context switches. * * Nested interrupts are not supported. */ DEBUGASSERT(current_regs == NULL); current_regs = regs; /* Deliver the IRQ */ irq_dispatch(irq, regs); #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then * current_regs will have a different value than it did on entry. * If an interrupt level context switch has occurred, then restore * the floating point state and the establish the correct address * environment before returning from the interrupt. */ if (regs != current_regs) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ up_restorefpu((uint32_t*)current_regs); #endif #ifdef CONFIG_ARCH_ADDRENV /* Make sure that the address environment for the previously * running task is closed down gracefully (data caches dump, * MMU flushed) and set up the address environment for the new * thread at the head of the ready-to-run list. */ (void)group_addrenv(NULL); #endif } #endif /* Set current_regs to NULL to indicate that we are no longer in * an interrupt handler. */ current_regs = NULL; /* Unmask the last interrupt (global interrupts are still * disabled). */ up_enable_irq(irq); } }
uint32_t *up_doirq(int irq, uint32_t* regs) { board_autoled_on(LED_INIRQ); #ifdef CONFIG_SUPPRESS_INTERRUPTS PANIC(); #else if ((unsigned)irq < NR_IRQS) { /* Current regs non-zero indicates that we are processing * an interrupt; g_current_regs is also used to manage * interrupt level context switches. * * Nested interrupts are not supported. */ DEBUGASSERT(g_current_regs == NULL); g_current_regs = regs; /* Deliver the IRQ */ irq_dispatch(irq, regs); #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then * g_current_regs will have a different value than it did on entry. If an * interrupt level context switch has occurred, then restore the floating * point state and the establish the correct address environment before * returning from the interrupt. */ if (regs != g_current_regs) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ up_restorefpu((uint32_t*)g_current_regs); #endif #ifdef CONFIG_ARCH_ADDRENV /* Make sure that the address environment for the previously * running task is closed down gracefully (data caches dump, * MMU flushed) and set up the address environment for the new * thread at the head of the ready-to-run list. */ (void)group_addrenv(NULL); #endif } #endif /* Get the current value of regs... it may have changed because * of a context switch performed during interrupt processing. */ regs = g_current_regs; /* Set g_current_regs to NULL to indicate that we are no longer in an * interrupt handler. */ g_current_regs = NULL; } board_autoled_off(LED_INIRQ); #endif return regs; }
int lm32_swint(int irq, FAR void *context) { uint32_t *regs = (uint32_t *)context; DEBUGASSERT(g_current_regs == NULL); g_current_regs = regs; /* Software interrupt 0 is invoked with REG_A0 (REG_X10) = system call * command and REG_A1-6 = variable number of * arguments depending on the system call. */ #ifdef CONFIG_DEBUG_SYSCALL_INFO svcinfo("Entry: regs: %p cmd: %d\n", regs, regs[REG_A0]); up_registerdump(regs); #endif /* Handle the SWInt according to the command in $a0 */ switch (regs[REG_A0]) { /* A0=SYS_restore_context: This a restore context command: * * void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function; * * At this point, the following values are saved in context: * * A0 = SYS_restore_context * A1 = restoreregs * * In this case, we simply need to set g_current_regs to restore register * area referenced in the saved R1. context == g_current_regs is the normal * exception return. By setting g_current_regs = context[R1], we force * the return to the saved context referenced in $a1. */ case SYS_restore_context: { DEBUGASSERT(regs[REG_A1] != 0); g_current_regs = (uint32_t *)regs[REG_A1]; } break; /* A0=SYS_switch_context: This a switch context command: * * void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs); * * At this point, the following values are saved in context: * * A0 = SYS_switch_context * A1 = saveregs * A2 = restoreregs * * In this case, we save the context registers to the save register * area reference by the saved contents of R5 and then set * g_current_regs to to the save register area referenced by the saved * contents of R6. */ case SYS_switch_context: { DEBUGASSERT(regs[REG_A1] != 0 && regs[REG_A2] != 0); lm32_copystate((uint32_t *)regs[REG_A1], regs); g_current_regs = (uint32_t *)regs[REG_A2]; } break; /* A0=SYS_syscall_return: This a switch context command: * * void up_sycall_return(void); * * At this point, the following values are saved in context: * * A0 = SYS_syscall_return * * We need to restore the saved return address and return in * unprivileged thread mode. */ #ifdef CONFIG_BUILD_KERNEL case SYS_syscall_return: { struct tcb_s *rtcb = sched_self(); int index = (int)rtcb->xcp.nsyscalls - 1; /* Make sure that there is a saved syscall return address. */ DEBUGASSERT(index >= 0); /* Setup to return to the saved syscall return address in * the original mode. */ g_current_regs[REG_EPC] = rtcb->xcp.syscall[index].sysreturn; #error "Missing logic -- need to restore the original mode" rtcb->xcp.nsyscalls = index; } break; #endif /* This is not an architecture-specify system call. If NuttX is built * as a standalone kernel with a system call interface, then all of the * additional system calls must be handled as in the default case. */ default: { #ifdef CONFIG_BUILD_KERNEL FAR struct tcb_s *rtcb = sched_self(); int index = rtcb->xcp.nsyscalls; /* Verify that the SYS call number is within range */ DEBUGASSERT(g_current_regs[REG_A0] < SYS_maxsyscall); /* Make sure that we got here that there is a no saved syscall * return address. We cannot yet handle nested system calls. */ DEBUGASSERT(index < CONFIG_SYS_NNEST); /* Setup to return to dispatch_syscall in privileged mode. */ rtcb->xcpsyscall[index].sysreturn = regs[REG_EPC]; #error "Missing logic -- Need to save mode" rtcb->xcp.nsyscalls = index + 1; regs[REG_EPC] = (uint32_t)dispatch_syscall; #error "Missing logic -- Need to set privileged mode" /* Offset R0 to account for the reserved values */ g_current_regs[REG_A0] -= CONFIG_SYS_RESERVED; #else svcerr("ERROR: Bad SYS call: %d\n", regs[REG_A0]); #endif } break; } /* Report what happened. That might difficult in the case of a context switch */ #ifdef CONFIG_DEBUG_SYSCALL_INFO if (regs != g_current_regs) { svcinfo("SWInt Return: Context switch!\n"); up_registerdump((const uint32_t *)g_current_regs); } else { svcinfo("SWInt Return: %d\n", regs[REG_A0]); } #endif #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then * g_current_regs will have a different value than it did on entry. If an * interrupt level context switch has occurred, then restore the floating * point state and the establish the correct address environment before * returning from the interrupt. */ if (regs != g_current_regs) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ up_restorefpu((uint32_t *)g_current_regs); #endif #ifdef CONFIG_ARCH_ADDRENV /* Make sure that the address environment for the previously * running task is closed down gracefully (data caches dump, * MMU flushed) and set up the address environment for the new * thread at the head of the ready-to-run list. */ (void)group_addrenv(NULL); #endif } #endif return OK; }
void up_decodeirq(uint32_t *regs) { #ifdef CONFIG_SUPPRESS_INTERRUPTS lowsyslog("Unexpected IRQ\n"); current_regs = regs; PANIC(); #else int index; int irq; /* Read the IRQ vector status register. Bits 3-10 provide the IRQ number * of the interrupt (the TABLE_ADDR was initialized to zero, so the * following masking should be unnecessary) */ index = getreg32(LPC31_INTC_VECTOR0) & INTC_VECTOR_INDEX_MASK; if (index != 0) { /* Shift the index so that the range of IRQ numbers are in bits 0-7 (values * 1-127) and back off the IRQ number by 1 so that the numbering is zero-based */ irq = (index >> INTC_VECTOR_INDEX_SHIFT) -1; /* Verify that the resulting IRQ number is valid */ if ((unsigned)irq < NR_IRQS) { /* Mask and acknowledge the interrupt */ up_maskack_irq(irq); /* Current regs non-zero indicates that we are processing an interrupt; * current_regs is also used to manage interrupt level context switches. * * Nested interrupts are not supported. */ DEBUGASSERT(current_regs == NULL); current_regs = regs; /* Deliver the IRQ */ irq_dispatch(irq, regs); #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then * current_regs will have a different value than it did on entry. * If an interrupt level context switch has occurred, then restore * the floating point state and the establish the correct address * environment before returning from the interrupt. */ if (regs != current_regs) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ up_restorefpu((uint32_t*)current_regs); #endif #ifdef CONFIG_ARCH_ADDRENV /* Make sure that the address environment for the previously * running task is closed down gracefully (data caches dump, * MMU flushed) and set up the address environment for the new * thread at the head of the ready-to-run list. */ (void)group_addrenv(NULL); #endif } #endif /* Set current_regs to NULL to indicate that we are no longer in an * interrupt handler. */ current_regs = NULL; /* Unmask the last interrupt (global interrupts are still * disabled). */ up_enable_irq(irq); } }
uint32_t *arm_doirq(int irq, uint32_t *regs) { board_led_on(LED_INIRQ); #ifdef CONFIG_SUPPRESS_INTERRUPTS PANIC(); #else /* Nested interrupts are not supported */ DEBUGASSERT(current_regs == NULL); /* Current regs non-zero indicates that we are processing an interrupt; * current_regs is also used to manage interrupt level context switches. */ current_regs = regs; /* Mask and acknowledge the interrupt */ up_maskack_irq(irq); /* Deliver the IRQ */ irq_dispatch(irq, regs); #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then * current_regs will have a different value than it did on entry. If an * interrupt level context switch has occurred, then restore the floating * point state and the establish the correct address environment before * returning from the interrupt. */ if (regs != current_regs) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ up_restorefpu((uint32_t*)current_regs); #endif #ifdef CONFIG_ARCH_ADDRENV /* Make sure that the address environment for the previously * running task is closed down gracefully (data caches dump, * MMU flushed) and set up the address environment for the new * thread at the head of the ready-to-run list. */ (void)group_addrenv(NULL); #endif } #endif /* Set current_regs to NULL to indicate that we are no longer in an * interrupt handler. */ regs = (uint32_t *)current_regs; current_regs = NULL; /* Unmask the last interrupt (global interrupts are still disabled) */ up_enable_irq(irq); #endif board_led_off(LED_INIRQ); return regs; }