/*
* vb2_mem_ops
*/
static void vb2_ion_put(void *buf_priv)
{
struct vb2_ion_buf *buf = buf_priv;
if (atomic_dec_and_test(&buf->ref))
vb2_ion_private_free(&buf->cookie);
}
static int fimc_is_resourcemgr_deinitmem(struct fimc_is_resourcemgr *resourcemgr)
{
int ret = 0;
vb2_ion_private_free(resourcemgr->minfo.fw_cookie);
return ret;
}
static int fimc_is_resourcemgr_allocmem(struct fimc_is_resourcemgr *resourcemgr)
{
int ret = 0;
void *fw_cookie;
size_t fw_size = FIMC_IS_A5_MEM_SIZE;
#ifdef FW_SUSPEND_RESUME
fw_size += FIMC_IS_BACKUP_SIZE;
#endif
#ifdef ENABLE_ODC
fw_size += SIZE_ODC_INTERNAL_BUF * NUM_ODC_INTERNAL_BUF;
#endif
#ifdef ENABLE_VDIS
fw_size += SIZE_DIS_INTERNAL_BUF * NUM_DIS_INTERNAL_BUF;
#endif
#ifdef ENABLE_DNR
fw_size += SIZE_DNR_INTERNAL_BUF * NUM_DNR_INTERNAL_BUF;
#endif
fw_size = PAGE_ALIGN(fw_size);
dbg_core("Allocating memory for FIMC-IS firmware.\n");
fw_cookie = vb2_ion_private_alloc(resourcemgr->mem.alloc_ctx, fw_size, 1, 0);
if (IS_ERR(fw_cookie)) {
err("Allocating bitprocessor buffer failed");
fw_cookie = NULL;
ret = -ENOMEM;
goto p_err;
}
ret = vb2_ion_dma_address(fw_cookie, &resourcemgr->minfo.dvaddr);
if ((ret < 0) || (resourcemgr->minfo.dvaddr & FIMC_IS_FW_BASE_MASK)) {
err("The base memory is not aligned to 64MB.");
vb2_ion_private_free(fw_cookie);
resourcemgr->minfo.dvaddr = 0;
fw_cookie = NULL;
ret = -EIO;
goto p_err;
}
#ifdef PRINT_BUFADDR
info("[RSC] daddr = %pa, size = %08X\n", &resourcemgr->minfo.dvaddr, FIMC_IS_A5_MEM_SIZE);
#endif
resourcemgr->minfo.kvaddr = (ulong)vb2_ion_private_vaddr(fw_cookie);
if (IS_ERR((void *)resourcemgr->minfo.kvaddr)) {
err("Bitprocessor memory remap failed");
vb2_ion_private_free(fw_cookie);
resourcemgr->minfo.kvaddr = 0;
fw_cookie = NULL;
ret = -EIO;
goto p_err;
}
vb2_ion_sync_for_device(fw_cookie, 0, fw_size, DMA_BIDIRECTIONAL);
p_err:
info("[RSC] Device virtual for internal: %08lx\n", resourcemgr->minfo.kvaddr);
resourcemgr->minfo.fw_cookie = fw_cookie;
return ret;
}
