void
vdp1_init(void)
{
/* Check if boundaries are correct */
STATIC_ASSERT((VDP1_CMDT_MEMORY_SIZE +
VDP1_GST_MEMORY_SIZE +
VDP1_TEXURE_MEMORY_SIZE +
VDP1_CLUT_MEMORY_SIZE) == VDP1_VRAM_SIZE);
/* Initialize the processor to sane values */
MEMORY_WRITE(16, VDP1(TVMR), 0x0000);
MEMORY_WRITE(16, VDP1(ENDR), 0x0000);
MEMORY_WRITE(16, VDP1(FBCR), 0x0000);
MEMORY_WRITE(16, VDP1(PTMR), 0x0000);
MEMORY_WRITE(16, VDP1(EWDR), 0x0000);
MEMORY_WRITE(16, VDP1(EWLR), 0x0000);
MEMORY_WRITE(16, VDP1(EWRR), (uint16_t)(((320 / 8) << 9) | (223)));
vdp2_tvmd_vblank_in_wait();
/* Stop processing command tables */
uint32_t cmdt_idx;
for (cmdt_idx = 0; cmdt_idx < VDP1_CMDT_COUNT_MAX; cmdt_idx++) {
struct vdp1_cmdt *cmdt;
cmdt = (struct vdp1_cmdt *)CMD_TABLE(cmdt_idx, 0);
cmdt->cmd_ctrl = 0x8000;
}
vdp1_cmdt_list_init();
MEMORY_WRITE(16, VDP1(PTMR), 0x0002);
}
void
vdp2_tvmd_display_clear(void)
{
_state_vdp2()->regs.tvmd &= 0x7FFF;
/* Change the DISP bit during VBLANK */
vdp2_tvmd_vblank_in_wait();
MEMORY_WRITE(16, VDP2(TVMD), _state_vdp2()->regs.tvmd);
}
abort(void)
{
/* Disable interrupts */
cpu_intc_disable();
/* This does not execute cleanup functions registered with
* 'atexit' or 'on_exit' */
while (true) {
vdp2_tvmd_vblank_in_wait();
vdp2_tvmd_vblank_out_wait();
}
}
void
vdp2_tvmd_display_clear(void)
{
uint16_t tvmd;
tvmd = MEMORY_READ(16, VDP2(TVMD));
tvmd &= 0x7FFF;
/* Change the DISP bit during VBLANK */
vdp2_tvmd_vblank_in_wait();
MEMORY_WRITE(16, VDP2(TVMD), tvmd);
}
int main(void)
{
irq_mux_t *vblank_in;
irq_mux_t *vblank_out;
static uint16_t back_screen_color = { COLOR_RGB_DATA | COLOR_RGB555(0, 0, 0) };
vdp2_init();
vdp1_init();
smpc_init();
smpc_peripheral_init();
scu_dma_cpu_init();
cpu_intc_disable();
vblank_in = vdp2_tvmd_vblank_in_irq_get();
irq_mux_handle_add(vblank_in, vblank_in_handler, NULL);
vblank_out = vdp2_tvmd_vblank_out_irq_get();
irq_mux_handle_add(vblank_out, vblank_out_handler, NULL);
cpu_intc_enable();
init();
vdp2_tvmd_display_set(TVMD_INTERLACE_NONE, TVMD_HORZ_NORMAL_A, TVMD_VERT_240);
vdp2_scrn_back_screen_color_set(VRAM_ADDR_4MBIT(3, 0x1FFFE), back_screen_color);
while (true)
{
vdp2_tvmd_vblank_in_wait();
read_digital_pad();
vdp2_tvmd_vblank_out_wait();
}
return 0;
}
int main(void)
{
uint16_t mask;
int level = DMA_LEVEL_0;
irq_mux_t *vblank_in;
irq_mux_t *vblank_out;
irq_mux_t *hblank_out;
unsigned int joyR = 0, oldjoyR = 0, joyL = 0, oldjoyL = 0, joyA = 0, oldjoyA = 0, joyB = 0, oldjoyB = 0, joyC = 0, oldjoyC = 0;
unsigned int joyLeft = 0, oldjoyLeft = 0, joyRight = 0, oldjoyRight = 0, joyStart = 0, oldjoyStart = 0, joyUp = 0, oldjoyUp = 0, joyDown = 0, oldjoyDown = 0;
static uint16_t back_screen_color = { COLOR_RGB_DATA | COLOR_RGB555(0, 7, 7) };
vdp2_init();
vdp1_init();
smpc_init();
smpc_peripheral_init();
scu_dma_cpu_init();
cons_init(CONS_DRIVER_VDP2);
consbuf = (char *)malloc(1024);
mask = IC_MASK_LEVEL_0_DMA_END | IC_MASK_LEVEL_1_DMA_END | IC_MASK_LEVEL_2_DMA_END | IC_MASK_DMA_ILLEGAL;
cpu_intc_disable();
vblank_in = vdp2_tvmd_vblank_in_irq_get();
irq_mux_handle_add(vblank_in, vblank_in_handler, NULL);
vblank_out = vdp2_tvmd_vblank_out_irq_get();
irq_mux_handle_add(vblank_out, vblank_out_handler, NULL);
hblank_out = vdp2_tvmd_hblank_in_irq_get();
irq_mux_handle_add(hblank_out, hblank_out_handler, NULL);
scu_ic_mask_chg(IC_MASK_ALL, mask);
scu_ic_interrupt_set(IC_INTERRUPT_LEVEL_0_DMA_END, scu_dma_level_0_end);
scu_ic_interrupt_set(IC_INTERRUPT_LEVEL_1_DMA_END, scu_dma_level_1_end);
scu_ic_interrupt_set(IC_INTERRUPT_LEVEL_2_DMA_END, scu_dma_level_2_end);
scu_ic_interrupt_set(IC_INTERRUPT_DMA_ILLEGAL, scu_dma_illegal);
scu_ic_mask_chg(IC_MASK_ALL & ~mask, IC_MASK_NONE);
cpu_intc_enable();
vdp2_tvmd_display_set();
vdp2_scrn_back_screen_color_set(VRAM_ADDR_4MBIT(3, 0x1FFFE), back_screen_color);
while (true)
{
(void)sprintf( consbuf, "[01;2H**** SCU DMA from H-RAM to VDP1 ****[04;2HRelease Start to run, Z to quit[05;2HTo configure press:[07;2HA/B/C: SCU DMA Level 0/1/2[08;2HL/R: Mode Direct/Indirect[09;2HDown/Up/Left/Right: VBO/VBI/HBL/Bit[11;2HLevel %d State %d Mode %s Trig %d[14;2HLast exec time: %08lu HBL",
level, state.st_status, (state.st_level[level].level_mode==DMA_MODE_DIRECT)?"DIR":"IND", state.st_level[level].level_sf, g_dma_counter);
cons_buffer(consbuf);
vdp2_tvmd_vblank_in_wait();
cons_flush();
vdp2_tvmd_vblank_out_wait();
switch (state.st_status)
{
case ST_STATUS_WAIT:
cons_buffer("[13;2HStatus wait ");
break;
case ST_STATUS_ILLEGAL:
state.st_begin = false;
cons_buffer("[13;2HStatus illegal ");
break;
case ST_STATUS_END:
state.st_begin = false;
cons_buffer("[13;2HStatus end ");
state.st_status = ST_STATUS_WAIT;
break;
}
if (!state.st_begin)
{
if (g_digital.connected == 1)
{
joyL = g_digital.pressed.button.l;
joyR = g_digital.pressed.button.r;
joyStart = g_digital.released.button.start;
joyA = g_digital.pressed.button.a;
joyB = g_digital.pressed.button.b;
joyC = g_digital.pressed.button.c;
joyUp = g_digital.pressed.button.up;
joyDown = g_digital.pressed.button.down;
joyRight = g_digital.pressed.button.right;
joyLeft = g_digital.pressed.button.left;
if(joyA & !oldjoyA)
level = DMA_LEVEL_0;
else if (joyB & !oldjoyB)
level = DMA_LEVEL_1;
else if (joyC & !oldjoyC)
level = DMA_LEVEL_2;
else if (joyL & !oldjoyL)
state.st_level[level].level_mode = DMA_MODE_DIRECT;
else if (joyR & !oldjoyR)
state.st_level[level].level_mode = DMA_MODE_INDIRECT;
else if (joyUp & !oldjoyUp)
state.st_level[level].level_sf = DMA_MODE_START_FACTOR_VBLANK_IN;
else if (joyDown & !oldjoyDown)
state.st_level[level].level_sf = DMA_MODE_START_FACTOR_VBLANK_OUT;
else if (joyLeft & !oldjoyLeft)
state.st_level[level].level_sf = DMA_MODE_START_FACTOR_HBLANK_IN;
else if (joyRight & !oldjoyRight)
state.st_level[level].level_sf = DMA_MODE_START_FACTOR_ENABLE;
if (joyStart & !oldjoyStart)
{
cons_buffer("[12;2HStarted ");
scu_dma_level(level);
}
else
{
cons_buffer("[12;2HNot Started ");
}
oldjoyR = joyR;
oldjoyL = joyL;
oldjoyA = joyA;
oldjoyB = joyB;
oldjoyC = joyC;
oldjoyUp = joyUp;
oldjoyDown = joyDown;
oldjoyLeft = joyLeft;
oldjoyRight = joyRight;
oldjoyStart = joyStart;
}
}
// exit
if(g_digital.pressed.button.z) abort();
}
return 0;
}
void
main(void)
{
hardware_init();
uint32_t color_idx;
for (color_idx = 0; color_idx < TEAPOT_POLYGON_CNT; color_idx++) {
uint32_t idx;
idx = color_idx;
uint32_t polygon_idx;
fix16_vector4_t *polygon[4];
for (polygon_idx = 0; polygon_idx < 4; polygon_idx++) {
uint32_t vertex_idx;
vertex_idx = teapot_indices[(4 * idx) + polygon_idx];
fix16_vector4_t *vertex;
vertex = &teapot_vertices[vertex_idx];
polygon[polygon_idx] = vertex;
}
fix16_t avg;
avg = fix16_add(fix16_mul(fix16_add(
fix16_add(polygon[0]->z, polygon[1]->z),
fix16_add(polygon[2]->z, polygon[3]->z)),
F16(1.0f / 4.0f)), F16(0.1f));
uint16_t color;
color = fix16_to_int(fix16_add(
fix16_mul(fix16_abs(avg), F16(255.0f)),
F16(16.0f)));
colors[color_idx] = RGB888_TO_RGB555(color, color, color);
}
ot_init();
matrix_stack_init();
matrix_stack_mode(MATRIX_STACK_MODE_PROJECTION);
fix16_t ratio;
ratio = F16((float)SCREEN_WIDTH / (float)SCREEN_HEIGHT);
matrix_stack_orthographic_project(-fix16_mul(F16(1.0f), ratio),
fix16_mul(F16(1.0f), ratio),
F16(1.0f), F16(-1.0f),
F16(1.0f), F16(1.0f));
matrix_stack_mode(MATRIX_STACK_MODE_MODEL_VIEW);
matrix_stack_translate(F16(0.0f), F16(0.0f), F16(-10.0f));
vdp1_cmdt_list_begin(0); {
struct vdp1_cmdt_local_coord local_coord;
local_coord.lc_coord.x = SCREEN_WIDTH / 2;
local_coord.lc_coord.y = SCREEN_HEIGHT / 2;
vdp1_cmdt_local_coord_set(&local_coord);
vdp1_cmdt_end();
} vdp1_cmdt_list_end(0);
struct vdp1_cmdt_polygon polygon;
memset(&polygon, 0x00, sizeof(polygon));
vdp2_tvmd_vblank_out_wait();
vdp2_tvmd_vblank_in_wait();
fix16_t angle = F16(0.0f);
while (true) {
vdp2_tvmd_vblank_out_wait();
// Update
matrix_stack_mode(MATRIX_STACK_MODE_MODEL_VIEW);
matrix_stack_push(); {
matrix_stack_rotate(angle, 0);
matrix_stack_rotate(angle, 1);
matrix_stack_rotate(angle, 2);
angle = fix16_add(angle, F16(-1.0f));
model_polygon_project(teapot_vertices, teapot_indices,
teapot_normals, TEAPOT_POLYGON_CNT);
} matrix_stack_pop();
vdp1_cmdt_list_begin(1); {
int32_t idx;
for (idx = OT_PRIMITIVE_BUCKETS - 1; idx >= 0; idx--) {
/* Skip empty buckets */
if (ot_bucket_empty(idx)) {
continue;
}
#if POLYGON_SORT == 1
ot_bucket_primitive_sort(idx & (OT_PRIMITIVE_BUCKETS - 1),
OT_PRIMITIVE_BUCKET_SORT_INSERTION);
#endif
#if RENDER == 1
struct ot_primitive *otp;
TAILQ_FOREACH (otp, ot_bucket(idx), otp_entries) {
polygon.cp_color = otp->otp_color;
polygon.cp_mode.transparent_pixel = true;
polygon.cp_mode.end_code = true;
polygon.cp_vertex.a.x = otp->otp_coords[0].x;
polygon.cp_vertex.a.y = otp->otp_coords[0].y;
polygon.cp_vertex.b.x = otp->otp_coords[1].x;
polygon.cp_vertex.b.y = otp->otp_coords[1].y;
polygon.cp_vertex.c.x = otp->otp_coords[2].x;
polygon.cp_vertex.c.y = otp->otp_coords[2].y;
polygon.cp_vertex.d.x = otp->otp_coords[3].x;
polygon.cp_vertex.d.y = otp->otp_coords[3].y;
vdp1_cmdt_polygon_draw(&polygon);
}
#endif
/* Clear OT bucket */
ot_bucket_init(idx);
}
vdp1_cmdt_end();
} vdp1_cmdt_list_end(1);
vdp2_tvmd_vblank_in_wait();
// Draw
vdp1_cmdt_list_commit();
}
