static void duart_output(device_t *device, UINT8 data) { device_t *fdc = device->machine().device("wd1770"); wd17xx_set_side(fdc,BIT(data,3) ? 0 : 1); if (BIT(data,7)==0) { wd17xx_set_drive(fdc,0); } else if (BIT(data,6)==0) { wd17xx_set_drive(fdc,1); } else if (BIT(data,5)==0) { wd17xx_set_drive(fdc,2); } else if (BIT(data,4)==0) { wd17xx_set_drive(fdc,3); } }
static WRITE8_HANDLER ( orion_disk_control_w ) { device_t *fdc = space->machine().device("wd1793"); wd17xx_set_side(fdc,((data & 0x10) >> 4) ^ 1); wd17xx_set_drive(fdc,data & 3); }
static WRITE8_HANDLER( svi318_fdc_drive_motor_w ) { svi318_state *state = space->machine().driver_data<svi318_state>(); device_t *fdc = space->machine().device("wd179x"); switch (data & 3) { case 1: wd17xx_set_drive(fdc,0); state->m_fdc.driveselect = 0; break; case 2: wd17xx_set_drive(fdc,1); state->m_fdc.driveselect = 1; break; } }
void coco_fdc_device::dskreg_w(UINT8 data) { UINT8 drive = 0; UINT8 head = 0; if (LOG_FDC) { logerror("fdc_coco_dskreg_w(): %c%c%c%c%c%c%c%c ($%02x)\n", data & 0x80 ? 'H' : 'h', data & 0x40 ? '3' : '.', data & 0x20 ? 'D' : 'S', data & 0x10 ? 'P' : 'p', data & 0x08 ? 'M' : 'm', data & 0x04 ? '2' : '.', data & 0x02 ? '1' : '.', data & 0x01 ? '0' : '.', data); } /* An email from John Kowalski informed me that if the DS3 is * high, and one of the other drive bits is selected (DS0-DS2), then the * second side of DS0, DS1, or DS2 is selected. If multiple bits are * selected in other situations, then both drives are selected, and any * read signals get yucky. */ if (data & 0x04) drive = 2; else if (data & 0x02) drive = 1; else if (data & 0x01) drive = 0; else if (data & 0x40) drive = 3; device_t *floppy[4]; floppy[0] = subdevice(FLOPPY_0); floppy[1] = subdevice(FLOPPY_1); floppy[2] = subdevice(FLOPPY_2); floppy[3] = subdevice(FLOPPY_3); for (int i = 0; i < 4; i++) { floppy_mon_w(floppy[i], i == drive ? CLEAR_LINE : ASSERT_LINE); } head = ((data & 0x40) && (drive != 3)) ? 1 : 0; m_dskreg = data; update_lines(); wd17xx_set_drive(m_wd17xx, drive); wd17xx_set_side(m_wd17xx, head); wd17xx_dden_w(m_wd17xx, !BIT(m_dskreg, 5)); }
void comx_fd_device::comx_io_w(offs_t offset, UINT8 data) { if (offset == 2) { if (m_q) { /* bit description 0 A0 1 A1 2 DRIVE0 3 DRIVE1 4 F9 DISB 5 SIDE SELECT */ // latch data to F3 m_addr = data & 0x03; if (BIT(data, 2)) { wd17xx_set_drive(m_fdc, 0); } else if (BIT(data, 3)) { wd17xx_set_drive(m_fdc, 1); } m_disb = !BIT(data, 4); update_ef4(); wd17xx_set_side(m_fdc, BIT(data, 5)); } else { // write data to WD1770 wd17xx_w(m_fdc, m_addr, data); } } }
static WRITE8_DEVICE_HANDLER( apricot_sysctrl_w ) { apricot_state *state = device->machine().driver_data<apricot_state>(); state->m_display_on = BIT(data, 3); state->m_video_mode = BIT(data, 4); if (!BIT(data, 5)) wd17xx_set_drive(state->m_wd2793, BIT(data, 6)); /* switch video modes */ state->m_mc6845->set_clock( state->m_video_mode ? XTAL_15MHz / 10 : XTAL_15MHz / 16); state->m_mc6845->set_hpixels_per_column( state->m_video_mode ? 10 : 16); }
void dragon_fdc_device::dskreg_w(UINT8 data) { if (LOG_FDC) { logerror("fdc_dragon_dskreg_w(): %c%c%c%c%c%c%c%c ($%02x)\n", data & 0x80 ? 'X' : 'x', data & 0x40 ? 'X' : 'x', data & 0x20 ? 'N' : 'n', data & 0x10 ? 'P' : 'p', data & 0x08 ? 'S' : 'D', data & 0x04 ? 'M' : 'm', data & 0x02 ? '1' : '0', data & 0x01 ? '1' : '0', data); } if (data & 0x04) wd17xx_set_drive(m_wd17xx, data & 0x03); wd17xx_dden_w(m_wd17xx, BIT(data, 3)); m_dskreg = data; }
static WRITE8_DEVICE_HANDLER( cru_w ) { ti99_fdc_state *card = get_safe_token(device); int drive, drivebit; if ((offset & 0xff00)==CRU_BASE) { int bit = (offset >> 1) & 0x07; switch (bit) { case 0: /* (De)select the card. Indicated by a LED on the board. */ card->selected = data; break; case 1: /* Activate motor */ if (data && !card->strobe_motor) { /* on rising edge, set motor_running for 4.23s */ card->DVENA = TRUE; fdc_handle_hold(device); card->motor_on_timer->adjust(attotime::from_msec(4230)); } card->strobe_motor = data; break; case 2: /* Set disk ready/hold (bit 2) */ // 0: ignore IRQ and DRQ // 1: TMS9900 is stopped until IRQ or DRQ are set // OR the motor stops rotating - rotates for 4.23s after write // to CRU bit 1 // This is not emulated and could cause the TI99 to lock up card->hold = data; fdc_handle_hold(device); break; case 3: /* Load disk heads (HLT pin) (bit 3). Not implemented. */ break; case 4: case 5: case 6: /* Select drive X (bits 4-6) */ drive = bit-4; /* drive # (0-2) */ drivebit = 1<<drive; if (data) { if (!(card->DSEL & drivebit)) /* select drive */ { if (card->DSEL != 0) logerror("ti_fdc: Multiple drives selected, %02x\n", card->DSEL); card->DSEL |= drivebit; wd17xx_set_drive(card->controller, drive); /*wd17xx_set_side(DSKside);*/ } } else card->DSEL &= ~drivebit; break; case 7: /* Select side of disk (bit 7) */ card->SIDSEL = data; wd17xx_set_side(card->controller, data); break; } }