INT32
mtk_wcn_cmb_hw_pwr_off (VOID)
{
    INT32 iRet = 0;
    WMT_INFO_FUNC("CMB-HW, hw_pwr_off start\n");

    /*1. disable irq --> should be done when do wmt-ic swDeinit period*/
    // TODO:[FixMe][GeorgeKuo] clarify this

    /*2. set bgf eint/all/wifi eint to deinit state, namely input low state*/
    iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS);
    WMT_INFO_FUNC("CMB-HW, BGF_EINT IRQ disabled\n");
    iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT);
    WMT_INFO_FUNC("CMB-HW, BGF_EINT IRQ unregistered\n");
    iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT);
    /* 2.1 set ALL_EINT pin to correct state even it is not used currently */
    iRet += wmt_plat_eirq_ctrl(PIN_ALL_EINT, PIN_STA_EINT_DIS);
    WMT_INFO_FUNC("CMB-HW, ALL_EINT IRQ unregistered and disabled\n");
    iRet += wmt_plat_gpio_ctrl(PIN_ALL_EINT, PIN_STA_DEINIT);
    /* 2.2 set WIFI_EINT pin to correct state*/
    //iRet += wmt_plat_eirq_ctrl(PIN_WIFI_EINT, PIN_STA_EINT_DIS);
    //WMT_INFO_FUNC("CMB-HW, WIFI_EINT IRQ unregistered and disabled\n");
    //iRet += wmt_plat_gpio_ctrl(PIN_WIFI_EINT, PIN_STA_DEINIT);
	/* 2.3 deinit gps sync */
    iRet += wmt_plat_gpio_ctrl(PIN_GPS_SYNC, PIN_STA_DEINIT);

    /*3. set audio interface to CMB_STUB_AIF_0, BT PCM OFF, I2S OFF*/
    iRet += wmt_plat_audio_ctrl(CMB_STUB_AIF_0, CMB_STUB_AIF_CTRL_DIS);

    /*4. set control gpio into deinit state, namely input low state*/
    iRet += wmt_plat_gpio_ctrl(PIN_SDIO_GRP, PIN_STA_DEINIT);
    iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_L);
    iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_L);

    /*5. set uart tx/rx into deinit state, namely input low state*/
    iRet += wmt_plat_gpio_ctrl(PIN_UART_GRP, PIN_STA_DEINIT);

    /* 6. Last, LDO output low */
    iRet += wmt_plat_gpio_ctrl(PIN_LDO, PIN_STA_OUT_L);
    
    /*7. deinit gps_lna*/
    iRet += wmt_plat_gpio_ctrl(PIN_GPS_LNA, PIN_STA_DEINIT);
	/* deinit RST/PMU/LDO */
    iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_DEINIT);
    iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_DEINIT);
    iRet += wmt_plat_gpio_ctrl(PIN_LDO, PIN_STA_DEINIT);
    WMT_INFO_FUNC("CMB-HW, hw_pwr_off finish\n");
    return iRet;
}
INT32
mtk_wcn_cmb_hw_pwr_on (VOID)
{
    static UINT32 _pwr_first_time = 1;
    INT32 iRet = 0;

    WMT_INFO_FUNC("CMB-HW, hw_pwr_on start\n");
#if 0 //IRQ should in inact state before power on, so this step is not needed
    /* disable interrupt firstly */
    iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS);
    iRet += wmt_plat_eirq_ctrl(PIN_ALL_EINT, PIN_STA_EINT_DIS);
#endif
    /*set all control and eint gpio to init state, namely input low mode*/
    iRet += wmt_plat_gpio_ctrl(PIN_LDO, PIN_STA_INIT);
    iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_INIT);
    iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_INIT);
    iRet += wmt_plat_gpio_ctrl(PIN_SDIO_GRP, PIN_STA_INIT);
    iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_INIT);
    iRet += wmt_plat_gpio_ctrl(PIN_ALL_EINT, PIN_STA_INIT);
    iRet += wmt_plat_gpio_ctrl(PIN_GPS_SYNC, PIN_STA_INIT);
    iRet += wmt_plat_gpio_ctrl(PIN_GPS_LNA, PIN_STA_INIT);
    // wmt_plat_gpio_ctrl(PIN_WIFI_EINT, PIN_STA_INIT); /* WIFI_EINT is controlled by SDIO host driver */
    // TODO: [FixMe][George]:WIFI_EINT is used in common SDIO

    /*1. pull high LDO to supply power to chip*/
    iRet += wmt_plat_gpio_ctrl(PIN_LDO, PIN_STA_OUT_H);
    osal_msleep(gPwrSeqTime.ldoStableTime);

    /* 2. export RTC clock to chip*/
    if (_pwr_first_time) {
        /* rtc clock should be output all the time, so no need to enable output again*/
        iRet += wmt_plat_gpio_ctrl(PIN_RTC, PIN_STA_INIT);
        osal_msleep(gPwrSeqTime.rtcStableTime);
        WMT_INFO_FUNC("CMB-HW, rtc clock exported\n");
    }

    /*3. set UART Tx/Rx to UART mode*/
    iRet += wmt_plat_gpio_ctrl(PIN_UART_GRP, PIN_STA_INIT);

    /*4. PMU->output low, RST->output low, sleep off stable time*/
    iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_L);
    iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_L);
    osal_msleep(gPwrSeqTime.offStableTime);

    /*5. PMU->output high, sleep rst stable time*/
    iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_H);
    osal_msleep(gPwrSeqTime.rstStableTime);

    /*6. RST->output high, sleep on stable time*/
    iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_H);
    osal_msleep(gPwrSeqTime.onStableTime);

    /*7. set audio interface to CMB_STUB_AIF_1, BT PCM ON, I2S OFF*/
    /* BT PCM bus default mode. Real control is done by audio */
    iRet += wmt_plat_audio_ctrl(CMB_STUB_AIF_1, CMB_STUB_AIF_CTRL_DIS);

    /*8. set EINT< -ommited-> move this to WMT-IC module, where common sdio interface will be identified and do proper operation*/
    // TODO: [FixMe][GeorgeKuo] double check if BGF_INT is implemented ok
    iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_MUX);
    iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_INIT);
    iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS);
    WMT_INFO_FUNC("CMB-HW, BGF_EINT IRQ registered and disabled \n");

    /* 8.1 set ALL_EINT pin to correct state even it is not used currently */
    iRet += wmt_plat_gpio_ctrl(PIN_ALL_EINT, PIN_STA_MUX);
    iRet += wmt_plat_eirq_ctrl(PIN_ALL_EINT, PIN_STA_INIT);
    iRet += wmt_plat_eirq_ctrl(PIN_ALL_EINT, PIN_STA_EINT_DIS);
    WMT_INFO_FUNC("CMB-HW, hw_pwr_on finish (%d)\n", iRet);

    _pwr_first_time = 0;
    return iRet;

}