static int x3_wakeup_key(void) { u64 status; status = __raw_readl(IO_ADDRESS(TEGRA_PMC_BASE) + PMC_WAKE_STATUS); status |= ((u64)readl(IO_ADDRESS(TEGRA_PMC_BASE) + PMC_WAKE2_STATUS)) << 32; printk("x3_wakeup_key : status %lu\n", status); #if defined(CONFIG_MACH_VU10) if (x3_get_hw_rev_pcb_version() == hw_rev_pcb_type_A) { return (status & TEGRA_WAKE_GPIO_PC7) ? KEY_POWER : (status & TEGRA_WAKE_GPIO_PO4) ? KEY_VOLUMEDOWN : KEY_RESERVED; } else { if (status & TEGRA_WAKE_GPIO_PC7) return KEY_POWER; else if (status & TEGRA_WAKE_GPIO_PO4) return KEY_VOLUMEDOWN; else if (status & TEGRA_WAKE_GPIO_PB6) return KEY_HP; else return KEY_RESERVED; } #else return (status & TEGRA_WAKE_GPIO_PC7) ? KEY_POWER : (status & TEGRA_WAKE_GPIO_PO4) ? KEY_VOLUMEDOWN : KEY_RESERVED; #endif }
void __init x3_bpc_mgmt_init(void) { #ifdef CONFIG_SMP #if defined(CONFIG_MACH_VU10) int tegra_bpc_gpio; int int_gpio; if (x3_get_hw_rev_pcb_version() == hw_rev_pcb_type_A) { tegra_bpc_gpio = TEGRA_GPIO_PJ6; } else { tegra_bpc_gpio = TEGRA_GPIO_PX6; } bpc_mgmt_platform_data.gpio_trigger = tegra_bpc_gpio; int_gpio = TEGRA_GPIO_TO_IRQ(tegra_bpc_gpio); tegra_gpio_enable(tegra_bpc_gpio); #else int int_gpio = TEGRA_GPIO_TO_IRQ(TEGRA_BPC_TRIGGER); tegra_gpio_enable(TEGRA_BPC_TRIGGER); #endif cpumask_setall(&(bpc_mgmt_platform_data.affinity_mask)); irq_set_affinity_hint(int_gpio, &(bpc_mgmt_platform_data.affinity_mask)); irq_set_affinity(int_gpio, &(bpc_mgmt_platform_data.affinity_mask)); #endif platform_device_register(&x3_bpc_mgmt_device); return; }
int __init x3_kbc_init(void) { #if defined(CONFIG_MACH_X3) || defined(CONFIG_MACH_VU10) int i; // int ret = 0; pr_info("Registering tegra-kbc-gpio\n"); #if defined(CONFIG_MACH_VU10) if (x3_get_hw_rev_pcb_version() == hw_rev_pcb_type_A) { x3_keys[0].gpio = TEGRA_GPIO_PO7; // VOL UP x3_keys[3].gpio = TEGRA_GPIO_PS1; // HP } #endif for (i = 0; i < ARRAY_SIZE(x3_keys); i++) tegra_gpio_enable(x3_keys[i].gpio); platform_device_register(&x3_keys_device); #else struct tegra_kbc_platform_data *data = &x3_kbc_platform_data; int i; tegra_kbc_device.dev.platform_data = &x3_kbc_platform_data; pr_info("Registering tegra-kbc\n"); BUG_ON((KBC_MAX_ROW + KBC_MAX_COL) > KBC_MAX_GPIO); for (i = 0; i < X3_ROW_COUNT; i++) { data->pin_cfg[i].num = i; data->pin_cfg[i].is_row = true; data->pin_cfg[i].en = true; } for (i = 0; i < X3_COL_COUNT; i++) { data->pin_cfg[i + KBC_MAX_ROW].num = i; data->pin_cfg[i + KBC_MAX_ROW].en = true; } platform_device_register(&tegra_kbc_device); #endif pr_info("Registering successful tegra-kbc\n"); return 0; }
int ssd2825_bridge_enable(void) { int cnt, ret; spi_data *sequence; int total_cnt =0; printk(KERN_INFO "%s ***** x3_bridge_on : %d \n", __func__, x3_bridge_on); mutex_lock(&bridge_init_mutex); if(!x3_bridge_on){ ssd2825_bridge_enable_spi_pins_to_nomal(); #if defined(CONFIG_SPI_SOLOMON_BRIDGE) total_cnt = SEQUENCE_SIZE(solomon_init_sequence_set); sequence = solomon_init_sequence_set; #elif defined(CONFIG_SPI_TOSHIBA_BRIDGE) total_cnt = SEQUENCE_SIZE(toshiba_init_sequence_set_updated);//toshiba_init_sequence_set); sequence = toshiba_init_sequence_set_updated;//toshiba_init_sequence_set; #endif /* Power Sequence */ gpio_set_value(gpio_bridge_en, 1); mdelay(1); // #if defined(CONFIG_MACH_VU10) if (x3_get_hw_rev_pcb_version() > hw_rev_pcb_type_B){ gpio_set_value(gpio_lcd_en, 1); mdelay(2); gpio_set_value(gpio_lcd_en_3v, 1); } else{ gpio_set_value(gpio_lcd_en, 1); } #else gpio_set_value(gpio_lcd_en, 1); #endif // gpio_set_value(gpio_bridge_reset_n, 0); mdelay(5); gpio_set_value(gpio_bridge_reset_n, 1); gpio_set_value(gpio_lcd_reset_n, 0); mdelay(1); gpio_set_value(gpio_lcd_reset_n, 1); mdelay(5); /* */ clk_enable(clk_s3); /* */ /* LCD_RESET_N */ tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_LCD_CS1_N, TEGRA_PUPD_PULL_UP); /* Init Sequence */ for ( cnt = 0 ; cnt < total_cnt ; cnt++ ) { SPI_WRITE(sequence->value) /*printk(" rgb_bridge_enable > bridge spi driver : value %8x \n", sequence->value);*/ if( sequence->delay ) mdelay( sequence->delay ); sequence++; } ret=lm353x_bl_on(); if(ret==2){ printk(KERN_INFO "lm353x_bl_on success *** state: 0 -> 1 \n"); } //mdelay(10); x3_bridge_on = TRUE; }
int __init x3_regulator_init(void) { void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE); u32 pmc_ctrl; /* configure the power management controller to trigger PMU * interrupts when low */ pmc_ctrl = readl(pmc + PMC_CTRL); writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL); #if defined(CONFIG_MFD_TPS80031) /* Disable battery charging if power adapter is connected. */ if (get_power_supply_type() == POWER_SUPPLY_TYPE_MAINS) { bcharger_pdata.num_consumer_supplies = 0; bcharger_pdata.consumer_supplies = NULL; battery_gauge_data.battery_present = 0; } #endif i2c_register_board_info(4, x3_regulators, ARRAY_SIZE(x3_regulators)); #if defined(CONFIG_REGULATOR_AAT2870) i2c_register_board_info(2, x3_aat2870_i2c_board_info, ARRAY_SIZE(x3_aat2870_i2c_board_info)); #endif #if defined(CONFIG_REGULATOR_GPIO_SWITCH) #if defined(MACH_X3_REV_B) || defined(MACH_X3_REV_C) || defined(MACH_X3_REV_D) || defined(MACH_X3_REV_E) || defined(MACH_X3_REV_1_0) x3_gpio_switch_regulator_init(); #else // #if defined(CONFIG_MACH_VU10) gpio_switch_regulator_init(); #else switch(x3_get_hw_rev_pcb_version()) { case hw_rev_pcb_type_A : case hw_rev_pcb_type_B : case hw_rev_pcb_type_C : x3_gpio_switch_regulator_init_rev_C(); break; case hw_rev_pcb_type_D : x3_gpio_switch_regulator_init_rev_D(); break; case hw_rev_pcb_type_E : default : x3_gpio_switch_regulator_init_rev_E(); break; } #endif // #endif #endif pm_power_off = x3_power_off; return 0; }