static int netx_eth_enable(struct net_device *ndev)
{
struct netx_eth_priv *priv = netdev_priv(ndev);
unsigned int mac4321, mac65;
int running, i;
ether_setup(ndev);
ndev->open = netx_eth_open;
ndev->stop = netx_eth_close;
ndev->hard_start_xmit = netx_eth_hard_start_xmit;
ndev->tx_timeout = netx_eth_timeout;
ndev->watchdog_timeo = msecs_to_jiffies(5000);
ndev->get_stats = netx_eth_query_statistics;
ndev->set_multicast_list = netx_eth_set_multicast_list;
priv->msg_enable = NETIF_MSG_LINK;
priv->mii.phy_id_mask = 0x1f;
priv->mii.reg_num_mask = 0x1f;
priv->mii.force_media = 0;
priv->mii.full_duplex = 0;
priv->mii.dev = ndev;
priv->mii.mdio_read = netx_eth_phy_read;
priv->mii.mdio_write = netx_eth_phy_write;
priv->mii.phy_id = INTERNAL_PHY_ADR + priv->id;
running = xc_running(priv->xc);
xc_stop(priv->xc);
/* if the xc engine is already running, assume the bootloader has
* loaded the firmware for us
*/
if (running) {
/* get Node Address from hardware */
mac4321 = readl(priv->xpec_base +
NETX_XPEC_RAM_START_OFS + ETH_MAC_4321);
mac65 = readl(priv->xpec_base +
NETX_XPEC_RAM_START_OFS + ETH_MAC_65);
ndev->dev_addr[0] = mac4321 & 0xff;
ndev->dev_addr[1] = (mac4321 >> 8) & 0xff;
ndev->dev_addr[2] = (mac4321 >> 16) & 0xff;
ndev->dev_addr[3] = (mac4321 >> 24) & 0xff;
ndev->dev_addr[4] = mac65 & 0xff;
ndev->dev_addr[5] = (mac65 >> 8) & 0xff;
} else {
if (xc_request_firmware(priv->xc)) {
static int netx_eth_enable(struct net_device *ndev)
{
struct netx_eth_priv *priv = netdev_priv(ndev);
unsigned int mac4321, mac65;
int running, i;
ether_setup(ndev);
ndev->netdev_ops = &netx_eth_netdev_ops;
ndev->watchdog_timeo = msecs_to_jiffies(5000);
priv->msg_enable = NETIF_MSG_LINK;
priv->mii.phy_id_mask = 0x1f;
priv->mii.reg_num_mask = 0x1f;
priv->mii.force_media = 0;
priv->mii.full_duplex = 0;
priv->mii.dev = ndev;
priv->mii.mdio_read = netx_eth_phy_read;
priv->mii.mdio_write = netx_eth_phy_write;
priv->mii.phy_id = INTERNAL_PHY_ADR + priv->id;
running = xc_running(priv->xc);
xc_stop(priv->xc);
if (running) {
mac4321 = readl(priv->xpec_base +
NETX_XPEC_RAM_START_OFS + ETH_MAC_4321);
mac65 = readl(priv->xpec_base +
NETX_XPEC_RAM_START_OFS + ETH_MAC_65);
ndev->dev_addr[0] = mac4321 & 0xff;
ndev->dev_addr[1] = (mac4321 >> 8) & 0xff;
ndev->dev_addr[2] = (mac4321 >> 16) & 0xff;
ndev->dev_addr[3] = (mac4321 >> 24) & 0xff;
ndev->dev_addr[4] = mac65 & 0xff;
ndev->dev_addr[5] = (mac65 >> 8) & 0xff;
} else {
if (xc_request_firmware(priv->xc)) {
// Shut down hardware
void netxeth_stop(struct eth_drv_sc *sc)
{
PNETX_ETH_PORT_INFO ptPortInfo = sc->driver_private;
cyg_uint32 uiPhyData;
cyg_drv_interrupt_mask(ptPortInfo->ulInterrupt);
xc_stop(ptPortInfo->ulPort);
//Put Phy into Power down mode
PhyMDIO(s_abPhyAddresses[ptPortInfo->ulPort], MDIO_READ, DRV_CB12_CONTROL, &uiPhyData);
uiPhyData |= DRV_CB12_CONTROL_POWER_DOWN;
PhyMDIO(s_abPhyAddresses[ptPortInfo->ulPort], MDIO_WRITE, DRV_CB12_CONTROL, &uiPhyData);
/* Disable all interrupts */
ptPortInfo->pulxPECBase[(REL_Adr_dram_start + REL_Adr_ETHMAC_INTERRUPTS_ENABLE_IND_HI) / sizeof(cyg_uint32)] = 0;
ptPortInfo->pulxPECBase[(REL_Adr_dram_start + REL_Adr_ETHMAC_INTERRUPTS_ENABLE_IND_LO) / sizeof(cyg_uint32)] = 0;
ptPortInfo->pulxPECBase[(REL_Adr_dram_start + REL_Adr_ETHMAC_INTERRUPTS_ENABLE_CON_HI) / sizeof(cyg_uint32)] = 0;
ptPortInfo->pulxPECBase[(REL_Adr_dram_start + REL_Adr_ETHMAC_INTERRUPTS_ENABLE_CON_LO) / sizeof(cyg_uint32)] = 0;
//empty all fifo's from this channel
s_ptFifoArea->ulPFifoReset |= 0xFF << (ptPortInfo->ulPort * 8);
s_ptFifoArea->ulPFifoReset &= ~(0xFF << (ptPortInfo->ulPort * 8));
}
