void Spice::saveFile(string filename, Circuit& netList){
ofstream file;
file.open(filename.c_str()); // Write
if (!file)
throw AstranError("Could not save file: " + filename);
printHeader (file, "* ", "");
map<string, CellNetlst>::iterator cells_it;
for ( cells_it = netList.getCellNetlsts()->begin(); cells_it != netList.getCellNetlsts()->end(); cells_it++ ){
file << ".SUBCKT " << cells_it->first;
for ( vector<int>::iterator inouts_it=cells_it->second.getInouts().begin(); inouts_it != cells_it->second.getInouts().end(); inouts_it++ )
file << " " << cells_it->second.getNetName(*inouts_it);
file << endl;
for(map<string,Inst>::iterator tmp=cells_it->second.getInstances().begin(); tmp!=cells_it->second.getInstances().end(); ++tmp){
file << tmp->first << " ";
for(vector<int>::iterator tmp2=tmp->second.ports.begin(); tmp2!=tmp->second.ports.end(); ++tmp2)
file << cells_it->second.getNetName(*tmp2) << " ";
file << tmp->second.subCircuit << endl;
}
for(int x=0; x<cells_it->second.size(); x++){
file << cells_it->second.getTrans(x).name << " " <<
cells_it->second.getNetName(cells_it->second.getTrans(x).drain) << " " <<
cells_it->second.getNetName(cells_it->second.getTrans(x).gate) << " " <<
cells_it->second.getNetName(cells_it->second.getTrans(x).source) << " ";
if(cells_it->second.getTrans(x).type==PMOS)
file << netList.getVddNet() << " PMOS";
else
file << netList.getGndNet() << " NMOS";
file << " L=" << cells_it->second.getTrans(x).length << "U W=" << cells_it->second.getTrans(x).width << "U"<< endl;
}
file << ".ENDS " << cells_it->first << endl << endl;
}
}
