bool
OrderByExecutor::p_init(AbstractPlanNode* abstract_node,
                        TempTableLimits* limits)
{
    VOLT_TRACE("init OrderBy Executor");

    OrderByPlanNode* node = dynamic_cast<OrderByPlanNode*>(abstract_node);
    assert(node);
    assert(node->getInputTables().size() == 1);

    assert(node->getChildren()[0] != NULL);

    //
    // Our output table should look exactly like out input table
    //
    node->
        setOutputTable(TableFactory::
                       getCopiedTempTable(node->databaseId(),
                                          node->getInputTables()[0]->name(),
                                          node->getInputTables()[0],
                                          limits));

    // pickup an inlined limit, if one exists
    limit_node =
        dynamic_cast<LimitPlanNode*>(node->
                                     getInlinePlanNode(PLAN_NODE_TYPE_LIMIT));

    return true;
}
Exemple #2
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bool
OrderByExecutor::p_init(AbstractPlanNode* abstract_node,
                        TempTableLimits* limits)
{
    VOLT_TRACE("init OrderBy Executor");

    OrderByPlanNode* node = dynamic_cast<OrderByPlanNode*>(abstract_node);
    assert(node);

    if (!node->isInline()) {
        assert(node->getInputTableCount() == 1);

        assert(node->getChildren()[0] != NULL);

        //
        // Our output table should look exactly like our input table
        //
        node->
            setOutputTable(TableFactory::
                       getCopiedTempTable(node->databaseId(),
                                          node->getInputTable()->name(),
                                          node->getInputTable(),
                                          limits));
        // pickup an inlined limit, if one exists
        limit_node =
            dynamic_cast<LimitPlanNode*>(node->
                                     getInlinePlanNode(PLAN_NODE_TYPE_LIMIT));
    } else {
        assert(node->getChildren().empty());
        assert(node->getInlinePlanNode(PLAN_NODE_TYPE_LIMIT) == NULL);
    }

#if defined(VOLT_LOG_LEVEL)
#if VOLT_LOG_LEVEL<=VOLT_LEVEL_TRACE
    const std::vector<AbstractExpression*>& sortExprs = node->getSortExpressions();
    for (int i = 0; i < sortExprs.size(); ++i) {
        VOLT_TRACE("Sort key[%d]:\n%s", i, sortExprs[i]->debug(true).c_str());
    }
#endif
#endif

    return true;
}