void parseDefineConstruct(QCString & largs, MemberDef* mdef ,OutputList& ol)
{
        
//	QCString largs=mdef->getDefinition();
	    int kr=largs.contains("\\?");	  
	
	
	    ol.startBold();
        VerilogDocGen::writeLink(mdef,ol);
	    ol.docify(" ");
		ol.insertMemberAlign();
		ol.startTextBlock();
		if(kr>0)
		{
			largs=mdef->definition();
			largs.stripPrefix("feature");
			while(largs.stripPrefix(" "));
			largs.stripPrefix(mdef->name().data());
			QStringList ql=QStringList::split("\\?",largs,false);
			for(uint i=0;i<ql.count();i++)
			{
			//	ol.startParagraph();
				QCString val=ql[i].data();			
				//ol.codify(val.data());
				VhdlDocGen::formatString(val,ol,mdef);			
			    // ol.lineBreak();
				//	ol.endParagraph();
			}
		}
		else
		VhdlDocGen::formatString(largs,ol,mdef);
		ol.endTextBlock(true);
		ol.endBold();
}
Exemple #2
0
void DirDef::writeFileList(OutputList &ol)
{
  // write file list
  if (m_fileList->count()>0)
  {
    ol.startMemberHeader("files");
    ol.parseText(theTranslator->trFile(TRUE,FALSE));
    ol.endMemberHeader();
    ol.startMemberList();
    QListIterator<FileDef> it(*m_fileList);
    FileDef *fd;
    for (;(fd=it.current());++it)
    {
      if (!fd->hasDocumentation()) continue;
      ol.startMemberDeclaration();
      ol.startMemberItem(fd->getOutputFileBase(),0);
      ol.docify(theTranslator->trFile(FALSE,TRUE)+" ");
      ol.insertMemberAlign();
      if (fd->isLinkable())
      {
        ol.writeObjectLink(fd->getReference(),fd->getOutputFileBase(),0,fd->name());
      }
      else
      {
        ol.startBold();
        ol.docify(fd->name()); 
        ol.endBold();
      }
      if (fd->generateSourceFile())
      {
        ol.pushGeneratorState();
        ol.disableAllBut(OutputGenerator::Html);
        ol.docify(" ");
        ol.startTextLink(fd->includeName(),0);
        ol.docify("[");
        ol.parseText(theTranslator->trCode());
        ol.docify("]");
        ol.endTextLink();
        ol.popGeneratorState();
      }
      ol.endMemberItem();
      if (!fd->briefDescription().isEmpty() && Config_getBool("BRIEF_MEMBER_DESC"))
      {
        ol.startMemberDescription(fd->getOutputFileBase());
        ol.generateDoc(briefFile(),briefLine(),fd,0,fd->briefDescription(),
            FALSE, // indexWords
            FALSE, // isExample
            0,     // exampleName
            TRUE,  // single line
            TRUE   // link from index
           );
        ol.endMemberDescription();
      }
      ol.endMemberDeclaration(0,0);
    }
    ol.endMemberList();
  }
}
Exemple #3
0
static void writePartialFilePath(OutputList &ol,const DirDef *root,const FileDef *fd)
{
  if (fd->getDirDef() && fd->getDirDef()!=root)
  {
    writePartialDirPath(ol,root,fd->getDirDef());
    ol.writeString("&#160;/&#160;");
  }
  if (fd->isLinkable())
  {
    ol.writeObjectLink(fd->getReference(),fd->getOutputFileBase(),0,fd->name());
  }
  else
  {
    ol.startBold();
    ol.docify(fd->name());
    ol.endBold();
  }
}
void Definition::writePathFragment(OutputList &ol) const
{
  makeResident();
  if (m_impl->outerScope && m_impl->outerScope!=Doxygen::globalScope)
  {
    m_impl->outerScope->writePathFragment(ol);
  }
  ol.writeString("      <li class=\"navelem\">");
  if (isLinkable())
  {
    if (definitionType()==Definition::TypeGroup && ((const GroupDef*)this)->groupTitle())
    {
      ol.writeObjectLink(getReference(),getOutputFileBase(),0,((const GroupDef*)this)->groupTitle());
    }
    else if (definitionType()==Definition::TypePage && !((const PageDef*)this)->title().isEmpty())
    {
      ol.writeObjectLink(getReference(),getOutputFileBase(),0,((const PageDef*)this)->title());
    }
    else if (definitionType()==Definition::TypeClass)
    {
      QCString name = m_impl->localName;
      if (name.right(2)=="-p" || name.right(2)=="-g")
      {
        name = name.left(name.length()-2);
      }
      ol.writeObjectLink(getReference(),getOutputFileBase(),0,name);
    }
    else
    {
      ol.writeObjectLink(getReference(),getOutputFileBase(),0,m_impl->localName);
    }
  }
  else
  {
    ol.startBold();
    ol.docify(m_impl->localName);
    ol.endBold();
  }
  ol.writeString("      </li>\n");
}
Exemple #5
0
void DirDef::writeFileList(OutputList &ol)
{
  // write file list
  if (m_fileList->count()>0)
  {
    ol.startMemberHeader();
    ol.parseText(theTranslator->trFile(TRUE,FALSE));
    ol.endMemberHeader();
    ol.startMemberList();
    FileDef *fd=m_fileList->first();
    while (fd)
    {
      ol.startMemberItem(0);
      ol.docify(theTranslator->trFile(FALSE,TRUE)+" ");
      ol.insertMemberAlign();
      if (fd->isLinkable())
      {
        ol.writeObjectLink(fd->getReference(),fd->getOutputFileBase(),0,fd->name());
      }
      else
      {
        ol.startBold();
        ol.docify(fd->name()); 
        ol.endBold();
      }
      if (fd->generateSourceFile())
      {
        ol.pushGeneratorState();
        ol.disableAllBut(OutputGenerator::Html);
        ol.docify(" ");
        ol.startTextLink(fd->includeName(),0);
        ol.docify("[");
        ol.parseText(theTranslator->trCode());
        ol.docify("]");
        ol.endTextLink();
        ol.popGeneratorState();
      }
      if (!Config_getString("GENERATE_TAGFILE").isEmpty()) 
      {
        Doxygen::tagFile << "    <file>" << convertToXML(fd->name()) << "</file>" << endl;
      }
      ol.endMemberItem();
      if (!fd->briefDescription().isEmpty() && Config_getBool("BRIEF_MEMBER_DESC"))
      {
        ol.startParagraph();
        ol.startMemberDescription();
        ol.parseDoc(briefFile(),briefLine(),fd,0,fd->briefDescription(),
            FALSE, // indexWords
            FALSE, // isExample
            0,     // exampleName
            FALSE, // single line
            TRUE   // link from index
           );
        ol.endMemberDescription();
        ol.endParagraph();
      }
      fd=m_fileList->next();
    }
    ol.endMemberList();
  }
}
void ClassSDict::writeDeclaration(OutputList &ol,const ClassDef::CompoundType *filter,
                                  const char *header,bool localNames)
{
  if (count()>0)
  {
    ClassSDict::Iterator sdi(*this);
    ClassDef *cd=0;
    bool found=FALSE;
    for (sdi.toFirst();(cd=sdi.current());++sdi)
    {
      if (cd->name().find('@')==-1 && 
          (filter==0 || *filter==cd->compoundType())
         )
      {
        bool isLink = cd->isLinkable();
        if (isLink || 
             (!Config_getBool("HIDE_UNDOC_CLASSES") && 
              (!cd->isLocal() || Config_getBool("EXTRACT_LOCAL_CLASSES"))
             )
           )
        {
          if (!found)
          {
            ol.startMemberHeader();
            if (header)
            {
              ol.parseText(header);
            }
            else
            {
              ol.parseText(theTranslator->trCompounds());
            }
            ol.endMemberHeader();
            ol.startMemberList();
            found=TRUE;
          }
          if (!Config_getString("GENERATE_TAGFILE").isEmpty()) 
          {
            Doxygen::tagFile << "    <class kind=\"" << cd->compoundTypeString() 
                    << "\">" << convertToXML(cd->name()) << "</class>" << endl;
          }
          ol.startMemberItem(FALSE);
          QCString tmp = cd->compoundTypeString();
          QCString cname;
          if (localNames)
          {
            cname = cd->localName();
          }
          else
          {
            cname = cd->displayName();
          }
          ol.writeString(tmp);
          ol.writeString(" ");
          ol.insertMemberAlign();
          if (isLink) 
          {
            ol.writeObjectLink(cd->getReference(),
                cd->getOutputFileBase(),
                0,
                cname
               );
          }
          else 
          {
            ol.startBold();
            ol.docify(cname);
            ol.endBold();
          }
          ol.endMemberItem();
          if (!cd->briefDescription().isEmpty())
          {
            ol.startMemberDescription();
            ol.parseDoc(cd->briefFile(),cd->briefLine(),cd,0,
                        cd->briefDescription(),FALSE,FALSE);
            if (//(!cd->briefDescription().isEmpty() && Config_getBool("REPEAT_BRIEF")) ||
                //!cd->documentation().isEmpty())
                cd->isLinkableInProject()
               )
            {
              ol.pushGeneratorState();
              ol.disableAllBut(OutputGenerator::Html);
              //ol.endEmphasis();
              ol.docify(" ");
              ol.startTextLink(cd->getOutputFileBase(),"_details");
              ol.parseText(theTranslator->trMore());
              ol.endTextLink();
              //ol.startEmphasis();
              ol.popGeneratorState();
            }
            ol.endMemberDescription();
          }
        }
      }
    }
    if (found) ol.endMemberList();
  }
}
void writeFunctionProto(OutputList& ol,const ArgumentList* al,const MemberDef* mdef)
{
  if (al==0) return;
  ArgumentListIterator ali(*al);
  Argument *arg;
  bool sem=FALSE;
  int len=al->count();
  ol.startBold();
  ol.docify(" ( ");    
  ol.endBold();
  if (len>2)
  {
    //ol.lineBreak();
	ol.docify("\n ");;
  }
  for (;(arg=ali.current());++ali)
  {
    ol.startBold();
    if (sem && len < 3)
    {
      ol.docify(" , ");
    }
   

	QCString nn=arg->name.simplifyWhiteSpace();
    VerilogDocGen::adjustOpName(nn);
   // nn+=" ";
    VhdlDocGen::formatString(nn,ol,mdef);
	QCString qargs=arg->type.simplifyWhiteSpace();
	QCString att=arg->defval.simplifyWhiteSpace();
    if (!att.isEmpty()) 
    { 
      const QCString* str=VerilogDocGen::findKeyWord(att.data());
    //  att+=" ";
      if (str==0)
	VhdlDocGen::formatString(att,ol,mdef);
      else
	startFonts(att,str->data(),ol);         
    }  
ol.docify(":");
    //VhdlDocGen::startFonts("in ","stringliteral",ol);
    const QCString* str=VerilogDocGen::findKeyWord(qargs.data());
   // ol.startEmphasis();
    if (str==0)
      VhdlDocGen::formatString(qargs,ol,mdef);
    else
      startFonts(qargs,str->data(),ol);         
  //   ol.endEmphasis();
     sem=TRUE;    
    ol.endBold();
    if (len > 2)    
    {
      ol.docify("\n");;
		//ol.lineBreak();
    }
  }
  ol.startBold();    
  ol.docify(" )");    
  const char *exp=mdef->excpString();
  if(exp)
  {
    ol.insertMemberAlign();
    ol.docify("[ ");
    ol.docify(exp);
    ol.docify(" ]");
  }
  ol.endBold();  
}
void VerilogDocGen::writeVerilogDeclarations(MemberDef* mdef,OutputList &ol,
                   ClassDef *cd,NamespaceDef *nd,FileDef *fd,GroupDef *gd,
                   bool inGroup) {
 
  static bool bComp=false;
  //LockingPtr<MemberDef> lock(mdef,mdef);
 
  Definition *d=0;
 // ASSERT (cd!=0 || nd!=0 || fd!=0 || gd!=0); // member should belong to something
 //static_cast<VPreProcImp*>(m_opaquep);
 if (cd) d=cd;
  else if (nd)  d=(Definition*)nd;
  else if (fd) d=fd;
  else if (gd) d=(Definition*)gd;
  else d=(Definition*)mdef;
 //if (cd) d=cd;
  // write tag file information of this member
 int memType=mdef->getMemberSpecifiers();

  if (!Config_getString("GENERATE_TAGFILE").isEmpty())
  {
    Doxygen::tagFile << "    <member kind=\"";
    Doxygen::tagFile << VerilogDocGen::convertTypeToString(memType);
     
    Doxygen::tagFile << "\">" << endl;
    Doxygen::tagFile << "      <type>" << convertToXML(mdef->typeString()) << "</type>" << endl;
    Doxygen::tagFile << "      <name>" << convertToXML(mdef->name()) << "</name>" << endl;
    Doxygen::tagFile << "      <anchorfile>" << convertToXML(mdef->getOutputFileBase()+Doxygen::htmlFileExtension) << "</anchorfile>" << endl;
    Doxygen::tagFile << "      <anchor>" << convertToXML(mdef->anchor()) << "</anchor>" << endl;
  
	if(memType==VerilogDocGen::FUNCTION)
		Doxygen::tagFile << "      <arglist>" << convertToXML(VhdlDocGen::convertArgumentListToString(mdef->argumentList(),true)) << "</arglist>" << endl;
    else if(memType==VerilogDocGen::ALWAYS)
		Doxygen::tagFile << "      <arglist>" << convertToXML(VhdlDocGen::convertArgumentListToString(mdef->argumentList(),false)) << "</arglist>" << endl;
	else{
	Doxygen::tagFile << "      <arglist>" << convertToXML(mdef->argsString()) << "</arglist>" << endl;
   Doxygen::tagFile << "      <arglist>" << convertToXML(mdef->typeString()) << "</arglist>" << endl; 
    }
	mdef->writeDocAnchorsToTagFile();
    Doxygen::tagFile << "    </member>" << endl;
 
  }
  

  // write search index info
  if (Doxygen::searchIndex)
  {
    Doxygen::searchIndex->setCurrentDoc(mdef,mdef->anchor(),FALSE);
    Doxygen::searchIndex->addWord(mdef->localName(),TRUE);
    Doxygen::searchIndex->addWord(mdef->qualifiedName(),FALSE);
  }
  
  QCString cname  = d->name();
  QCString cfname = mdef->getOutputFileBase();

 // HtmlHelp *htmlHelp=0;
//  bool hasHtmlHelp = Config_getBool("GENERATE_HTML") && Config_getBool("GENERATE_HTMLHELP");
//  if (hasHtmlHelp) htmlHelp = HtmlHelp::getInstance();

  // search for the last anonymous scope in the member type
//  ClassDef *annoClassDef=mdef->getClassDefOfAnonymousType();

  // start a new member declaration
 // bool isAnonymous =  annoClassDef; // || m_impl->annMemb || m_impl->annEnumType;
  ///printf("startMemberItem for %s\n",name().data());
 
//  if(mdef->getMemberSpecifiers()==VerilogDocGen::FEATURE)
//  ol.startMemberItem(mdef->anchor(),3); //? 1 : m_impl->tArgList ? 3 : 0);
//  else
 ol.startMemberItem(mdef->anchor(), 0);// ? 1 : m_impl->tArgList ? 3 : 0);


  // If there is no detailed description we need to write the anchor here.
  bool detailsVisible = mdef->isDetailedSectionLinkable();
  if (!detailsVisible) // && !m_impl->annMemb)
  {
     QCString doxyName=mdef->name().copy();
    if (!cname.isEmpty()) doxyName.prepend(cname+"::");
    QCString doxyArgs=mdef->argsString();
    ol.startDoxyAnchor(cfname,cname,mdef->anchor(),doxyName,doxyArgs);

    ol.pushGeneratorState();
    ol.disable(OutputGenerator::Man);
    ol.disable(OutputGenerator::Latex);
    ol.docify("\n");
    ol.popGeneratorState();
    
  }
// *** write type
     /*Verilog CHANGE */
 VerilogDocGen::adjustMemberName(mdef); 
  
   QCString ltype(mdef->typeString()); 
   QCString largs(mdef->argsString());
 
   int mm=mdef->getMemberSpecifiers();

   ClassDef *kl=NULL;
   FileDef *fdd=NULL;
   ArgumentList *alp = mdef->argumentList();
   QCString nn;
   if(gd)gd=NULL;
   switch(mm)
   {
       
       case VhdlDocGen::MISCELLANEOUS:
      VhdlDocGen::writeSource(mdef,ol,nn);
      break;
      case VhdlDocGen::UCF_CONST: 
		  mm=mdef->name().findRev('_');
        if(mm>0)		 
		  mdef->setName(mdef->name().left(mm));
		  writeUCFLink(mdef,ol);
        break;
   case VerilogDocGen::INCLUDE: 
     bool ambig;
     largs=mdef->name();
     fdd=findFileDef(Doxygen::inputNameDict,largs.data(),ambig);
     if(fdd){
      QCString fbb=fdd->getFileBase();
      fbb=fdd->getReference();
     fbb= fdd->getOutputFileBase();
     fbb=fdd->getSourceFileBase();
     fbb=fdd->convertNameToFile(largs.data(),true);
     fbb=fdd->getPath();
     fbb+=fdd->getOutputFileBase()+".html";
   
       ol.writeObjectLink(fdd->getReference(),
                     fdd->getOutputFileBase(),
		     0,
		     fdd->name());
	}
	else
	 VhdlDocGen::formatString(largs,ol,mdef);	
	
        break;
	case VerilogDocGen::FEATURE: 
	
       	parseDefineConstruct(largs,mdef,ol);
		
		break;

	case VerilogDocGen::MODULE: 
       	ol.startBold();
        VhdlDocGen::formatString(ltype,ol,mdef);
        ol.endBold();
		ol.insertMemberAlign();
	   //writeLink(mdef,ol);
    case VerilogDocGen::PORT:
 		  writeLink(mdef,ol);
		 ol.insertMemberAlign();
		  if(largs.length()>0)
		    VhdlDocGen::formatString(largs,ol,mdef);
          if(ltype.length()>0)
		    VhdlDocGen::formatString(ltype,ol,mdef);	  
		  break;
    case VerilogDocGen::ALWAYS:
	     writeLink(mdef,ol);  
	     ol.insertMemberAlign();
		 VhdlDocGen::writeProcessProto(ol,alp,mdef);
		break;
   case VerilogDocGen::FUNCTION:
    case VerilogDocGen::TASK:      
         writeLink(mdef,ol);  
	   	  ol.docify(" ");// need for pdf has no effect in html
		 ol.insertMemberAlign();
		 if(ltype.length()>0)
		    VhdlDocGen::formatString(ltype,ol,mdef);
	 	   writeFunctionProto(ol,alp,mdef);
		 break;
   case VerilogDocGen::SIGNAL:
          if(largs.length()>0)
		    VhdlDocGen::formatString(largs,ol,mdef);
           ol.docify(" ");
       	    ol.insertMemberAlign();
        
            writeLink(mdef,ol);  
            ol.docify(" ");
	     if(ltype.length())
		    VhdlDocGen::formatString(ltype,ol,mdef);       
        break;
   case VerilogDocGen::CONFIGURATION:
   case VerilogDocGen::LIBRARY:
         writeLink(mdef,ol);  
         break;
   case VerilogDocGen::INPUT:
   case VerilogDocGen::OUTPUT:
   case VerilogDocGen::INOUT:
   case VerilogDocGen::PARAMETER:   
         writeLink(mdef,ol);   
	     ol.docify(" ");	   	
		 ol.insertMemberAlign();
		 if(ltype.length()>0){
		    VhdlDocGen::formatString(ltype,ol,mdef);
	   	   ol.writeString("  ");
	    }
	  //ol.insertMemberAlign();
	  if(largs.length()>0)
		    VhdlDocGen::formatString(largs,ol,mdef);	 
	 	 break;
     case VerilogDocGen::COMPONENT:
		 //VhdlDocGen::writeLink(mdef,ol);
        if(true)
		{
		nn=mdef->name();
		kl=VhdlDocGen::getClass(nn);
	  //if(kl==NULL){
	    ol.startBold();
	    QCString inst=mdef->name()+"::"+ltype;
          ol.writeObjectLink(mdef->getReference(),
                     mdef->getOutputFileBase(),
		     mdef->anchor(),
		     inst.data());
        ol.docify("  ");
        ol.endBold();
       //}
       	ol.insertMemberAlign();
	
		if(kl) {
			nn=kl->getOutputFileBase();
		
		ol.pushGeneratorState();
        ol.disableAllBut(OutputGenerator::Html);
         ol.docify("   ");
        QCString name=VerilogDocGen::getClassTitle(kl);
	     name=VhdlDocGen::getIndexWord(name.data(),1);
	    // ol.insertMemberAlign();
	 
	     ol.startBold();
		ol.docify(name.data());
		ol.endBold();
		ol.startEmphasis();
		   ol.docify(" ");
      
		   ol.writeObjectLink(kl->getReference(),kl->getOutputFileBase(),0,mdef->name().data());
	    ol.endEmphasis();
        ol.popGeneratorState();
		}
		if(largs.data())
			{
				ol.docify(" ");
			ol.docify(largs.data());
			}

        } 
		break;
  default: break;
   }

   bool htmlOn = ol.isEnabled(OutputGenerator::Html);
  if (htmlOn &&  !ltype.isEmpty())
  {
    ol.disable(OutputGenerator::Html);
  }
  if (!ltype.isEmpty()) ol.docify(" ");
  
  if (htmlOn) 
  {
    ol.enable(OutputGenerator::Html);
  }

  if (!detailsVisible)// && !m_impl->annMemb)
  {
    ol.endDoxyAnchor(cfname,mdef->anchor());
  }

  //printf("endMember %s annoClassDef=%p annEnumType=%p\n",
  //    name().data(),annoClassDef,annEnumType);
  ol.endMemberItem();
//fprintf(stderr,"\n%d %s",mdef->docLine,mdef->name().data());
   if (!mdef->briefDescription().isEmpty() &&   Config_getBool("BRIEF_MEMBER_DESC") /* && !annMemb */)
  {
	  ol.startMemberDescription(mdef->anchor());
    ol.generateDoc(mdef->briefFile(),mdef->briefLine(),mdef->getOuterScope()?mdef->getOuterScope():d,mdef,mdef->briefDescription(),TRUE,FALSE,0,TRUE,FALSE);
    if (detailsVisible) 
    {
      ol.pushGeneratorState();
      ol.disableAllBut(OutputGenerator::Html);
      //ol.endEmphasis();
      ol.docify(" ");
      if (mdef->getGroupDef()!=0 && gd==0) // forward link to the group
      {
        ol.startTextLink(mdef->getOutputFileBase(),mdef->anchor());
      }
      else // local link
      {
        ol.startTextLink(0,mdef->anchor());
      }
      ol.endTextLink();
      //ol.startEmphasis();
      ol.popGeneratorState();
    }
    //ol.newParagraph();

    ol.endMemberDescription();
    // if(VhdlDocGen::isComponent(mdef))
   //    ol.lineBreak();
  }
   mdef->warnIfUndocumented();

  }// end writeVerilogDeclaration