void
Operator::addPort(
const std::string name, const int width,
bool isIn, bool isClk,
bool isRst, bool isCE,
bool isSigned, bool isUnsigned,
bool isFP, int exp_sz,
int fra_sz, bool isRegistered)
throw(std::string)
{
if (signalMap_.find(name) != signalMap_.end()) {
std::ostringstream o;
o << "ERROR in " << __FUNCTION__ << ", port: '" << name<< "' seems to already exist";
throw o.str();
}
/*
std::cerr << "addPort( " << endl << \
"\t name = " << name << endl << \
"\t widht = " << width << endl << \
"\t isIn = " << isIn << endl << \
"\t isClk = " << isClk << endl << \
"\t isRst = " << isRst << endl << \
"\t isSign= " << isSigned << endl << \
"\t isUnsi= " << isUnsigned << endl << \
"\t isFP = " << isFP << endl << \
"\t exp_sz= " << exp_sz << endl << \
"\t fra_sz= " << fra_sz << endl << \
"\t isReg = " << isRegistered << ");"<< endl;
*/
Signal::SignalType inout = Signal::in;
if (isIn==0) { inout = Signal::out; }
Signal *s;
if (isFP==0) {
s = new Signal(name, inout, width) ;
} else {
s = new Signal(name, inout, exp_sz, fra_sz) ;
}
s->setClk(isClk);
s->setRst(isRst);
s->setCE(isCE);
s->setSigned(isSigned);
s->setUnsigned(isUnsigned);
s->setRegistered(isRegistered);
//isConst
//Value
// add signal to component
ioList_.push_back(s);
signalMap_[name] = s ;
numberOfInputs_ ++;
}
void Operator::addInput(const std::string name, const int width, bool isBus) throw(std::string) {
if (signalMap_.find(name) != signalMap_.end()) {
std::ostringstream o;
o << "ERROR in addInput, signal " << name<< " seems to already exist";
throw o.str();
}
Signal *s = new Signal(name, Signal::in, width, isBus) ; // default TTL and cycle OK
s->setClk(0);
s->setRst(0);
s->setCE(0);
s->setSigned(0);
s->setRegistered(0);
ioList_.push_back(s);
signalMap_[name] = s ;
numberOfInputs_ ++;
}