tlm::tlm_sync_enum BridgeClassicToAMBATLM2<BUSWIDTH>::nb_bw_transport(tlm::tlm_generic_payload & trans, tlm::tlm_phase & ph, sc_core::sc_time &delay)
{
// std::cout << sc_core::sc_object::name()<< ph << std::endl;
amba::amba_id * m_id;
amba::amba_exclusive * m_exclusive;
tlm::tlm_sync_enum returnVal=tlm::TLM_ACCEPTED;
std::ostringstream msg;
msg.str("");
if(ph == amba::BEGIN_LAST_RESP || ph == tlm::BEGIN_RESP)
{
//assert(trans.get_command()==tlm::TLM_READ_COMMAND && "Write Command doesn't support the response.");
master_sock.template get_extension<amba::amba_id>(m_id,trans);
if (trans.is_write())
{
// std::cout << "TLM BEHAVIOR: received BEGIN_RESP at time " << sc_core::sc_time_stamp() << std::endl;
assert(ph == tlm::BEGIN_RESP);
assert(wr_packets[m_id->value] != NULL);
//as per packet.cc:74 writeback never needs a response
if (wr_packets[m_id->value]->cmd != MemCmd::Writeback)
{
if (master_sock.template get_extension<amba::amba_exclusive>(m_exclusive,trans))
{
if (m_exclusive->value)
{
wr_packets[m_id->value]->req->setExtraData(0);
}
else
{
wr_packets[m_id->value]->req->setExtraData(1);
}
}
setCurTick(sc_core::sc_time_stamp().value());
wr_packets[m_id->value]->busFirstWordDelay = wr_packets[m_id->value]->busLastWordDelay = 0;
if (bus_stalling)
retryQueue.push(wr_packets[m_id->value]);
else if (!slavePort->sendTimingResp(wr_packets[m_id->value]))
{
bus_stalling=true;
retryQueue.push(wr_packets[m_id->value]);
}
#ifdef DEBUG
else if (_trace_transactions)
std::cout << "In " << sc_core::sc_object::name() << " at time " << sc_time_stamp() << " sending a WS response to GEM5 with address=0x" << hex << trans.get_address() << dec << " size=" << trans.get_data_length() << std::endl;
#endif
}
master_sock.release_transaction(&trans); //now we release
wr_packets[m_id->value] = NULL;
if (needWrIdRetry)
{
setCurTick(sc_core::sc_time_stamp().value());
needWrIdRetry=false;
slavePort->sendRetry();
}
}
else if (ph == amba::BEGIN_LAST_RESP)
{
// std::cout << "TLM BEHAVIOR: received BEGIN_LAST_RESP at time " << sc_core::sc_time_stamp() << std::endl;
assert(rd_packets[m_id->value] != NULL);
uint8_t * data=trans.get_data_ptr();
PacketPtr pkt = rd_packets[m_id->value];
pkt->makeTimingResponse();
uint32_t shadow_size=pkt->getSize();
uint64_t shadow_addr=pkt->getAddr();
// std::cout << sc_core::sc_object::name() << " bridge received read data for address = " << trans.get_address()-pkt->getAddr() << " at time " << sc_time_stamp() << std::endl;
memcpy(pkt->getPtr<uint8_t>(),data,pkt->getSize());
// if (master_sock.template get_extension<amba::amba_exclusive>(m_exclusive,trans))
// {
// if (m_exclusive->value)
// pkt->req->setExtraData(0);
// else
// pkt->req->setExtraData(1);
// }
setCurTick(sc_core::sc_time_stamp().value());
pkt->busFirstWordDelay = pkt->busLastWordDelay = 0;
if (bus_stalling)
retryQueue.push(pkt);
else if (!slavePort->sendTimingResp(pkt))
{
bus_stalling=true;
retryQueue.push(pkt);
}
#ifdef DEBUG
else if (_trace_transactions)
{
std::cout << "In " << sc_core::sc_object::name() << " at time " << sc_time_stamp() << " sending a READ response to GEM5 with address=0x" << hex << shadow_addr << dec << " size=" << shadow_size;
std::cout << hex << " and data= [";
for(unsigned j=0;j<shadow_size; j++)
std::cout << "0x" << uint32_t(data[j]) << ",";
std::cout << "]" << dec << std::endl;
}
#endif
rd_packets[m_id->value]=NULL;
master_sock.release_transaction(&trans);
if (needRdIdRetry)
{
setCurTick(sc_core::sc_time_stamp().value());
needRdIdRetry=false;
slavePort->sendRetry();
}
}
else
{
//received a read data phase
}
//always accept directly (cf EagleNest spec)
// std::cout << "TLM BEHAVIOR: sending TLM_UPDATED & END_RESP at time " << sc_core::sc_time_stamp() << std::endl;
ph=tlm::END_RESP;
return tlm::TLM_UPDATED;
}
else if(ph ==tlm::END_REQ)
{
// std::cout << "TLM BEHAVIOR: received END_REQ and returning TLM_ACCEPTED at time " << sc_core::sc_time_stamp() << std::endl;
if (needRetry)
{
setCurTick(sc_core::sc_time_stamp().value());
trans.release();
needRetry=false;
slavePort->sendRetry();
}
}
else if(ph== amba::END_DATA )
{
// std::cout << "TLM BEHAVIOR: received END_DATA and returning TLM_ACCEPTED at time " << sc_core::sc_time_stamp() << std::endl;
if (need_wenable_event)
{
need_wenable_event=false;
wenable_event.notify();
}
return tlm::TLM_ACCEPTED;
}
else
assert("Unexpected phase returned from AXI slave.");
return returnVal;
}
