PINCTRL_PIN(AB8505_PIN_H14, "GPIO34_H14"), /* hole */ PINCTRL_PIN(AB8505_PIN_J15, "GPIO40_J15"), PINCTRL_PIN(AB8505_PIN_J14, "GPIO41_J14"), /* hole */ PINCTRL_PIN(AB8505_PIN_L4, "GPIO50_L4"), /* hole */ PINCTRL_PIN(AB8505_PIN_D16, "GPIO52_D16"), PINCTRL_PIN(AB8505_PIN_D15, "GPIO53_D15"), }; /* * Maps local GPIO offsets to local pin numbers */ static const struct abx500_pinrange ab8505_pinranges[] = { ABX500_PINRANGE(1, 3, ABX500_ALT_A), ABX500_PINRANGE(10, 2, ABX500_DEFAULT), ABX500_PINRANGE(13, 1, ABX500_DEFAULT), ABX500_PINRANGE(14, 1, ABX500_ALT_A), ABX500_PINRANGE(17, 4, ABX500_ALT_A), ABX500_PINRANGE(34, 1, ABX500_ALT_A), ABX500_PINRANGE(40, 2, ABX500_ALT_A), ABX500_PINRANGE(50, 1, ABX500_DEFAULT), ABX500_PINRANGE(52, 2, ABX500_ALT_A), }; /* * Read the pin group names like this: * sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function * * The groups are arranged as sets per altfunction column, so we can
/* hole */ PINCTRL_PIN(AB9540_PIN_L17, "GPIO40_L17"), PINCTRL_PIN(AB9540_PIN_L16, "GPIO41_L16"), PINCTRL_PIN(AB9540_PIN_W3, "GPIO42_W3"), PINCTRL_PIN(AB9540_PIN_N4, "GPIO50_N4"), PINCTRL_PIN(AB9540_PIN_G12, "GPIO51_G12"), PINCTRL_PIN(AB9540_PIN_E17, "GPIO52_E17"), PINCTRL_PIN(AB9540_PIN_D11, "GPIO53_D11"), PINCTRL_PIN(AB9540_PIN_M18, "GPIO60_M18"), }; /* * Maps local GPIO offsets to local pin numbers */ static const struct abx500_pinrange ab9540_pinranges[] = { ABX500_PINRANGE(1, 4, ABX500_ALT_A), ABX500_PINRANGE(10, 2, ABX500_DEFAULT), ABX500_PINRANGE(13, 1, ABX500_DEFAULT), ABX500_PINRANGE(14, 12, ABX500_ALT_A), ABX500_PINRANGE(27, 6, ABX500_ALT_A), ABX500_PINRANGE(34, 1, ABX500_ALT_A), ABX500_PINRANGE(40, 3, ABX500_ALT_A), ABX500_PINRANGE(50, 1, ABX500_DEFAULT), ABX500_PINRANGE(51, 3, ABX500_ALT_A), ABX500_PINRANGE(54, 1, ABX500_DEFAULT), }; /* * Read the pin group names like this: * sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function *
PINCTRL_PIN(AB8540_PIN_G10, "GPIO47_G10"), PINCTRL_PIN(AB8540_PIN_K12, "GPIO48_K12"), /* hole */ PINCTRL_PIN(AB8540_PIN_N8, "GPIO51_N8"), PINCTRL_PIN(AB8540_PIN_P12, "GPIO52_P12"), PINCTRL_PIN(AB8540_PIN_K8, "GPIO53_K8"), PINCTRL_PIN(AB8540_PIN_J11, "GPIO54_J11"), PINCTRL_PIN(AB8540_PIN_AC2, "GPIO55_AC2"), PINCTRL_PIN(AB8540_PIN_AB2, "GPIO56_AB2"), }; /* * Maps local GPIO offsets to local pin numbers */ static const struct abx500_pinrange ab8540_pinranges[] = { ABX500_PINRANGE(1, 4, ABX500_ALT_A), ABX500_PINRANGE(14, 7, ABX500_ALT_A), ABX500_PINRANGE(27, 6, ABX500_ALT_A), ABX500_PINRANGE(42, 7, ABX500_ALT_A), ABX500_PINRANGE(51, 6, ABX500_ALT_A), }; /* * Read the pin group names like this: * sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function * * The groups are arranged as sets per altfunction column, so we can * mux in one group at a time by selecting the same altfunction for them * all. When functions require pins on different altfunctions, you need * to combine several groups. */