void adc_init()
{
PMC_EnablePeripheral(ID_ADC);
ADC->ADC_CR = ADC_CR_SWRST;
ADC->ADC_MR = ADC_MR_TRANSFER(1) |
ADC_MR_TRACKTIM(1) |
ADC_MR_SETTLING(3) |
ADC_MR_PRESCAL(4) | // adc clock = 64 MHz / ((4+1)*2) = 6.4
ADC_MR_FREERUN |
ADC_MR_STARTUP_SUT512;
ADC->ADC_CHER = (1 << ADC_CH_INPUT_VOLTAGE) |
(1 << ADC_CH_TEMPERATURE) |
(1 << ADC_CH_PHALANGE_CURRENT);
ADC->ADC_IDR = 0xffffffff;
ADC->ADC_ACR = ADC_ACR_TSON; // turn on temperature sensor
ADC->ADC_CR = ADC_CR_START; // start a conversion
while (!(ADC->ADC_ISR & ADC_ISR_DRDY)) { }
ADC->ADC_LCDR;
ADC->ADC_CR = ADC_CR_START; // start another conversion
while (!(ADC->ADC_ISR & ADC_ISR_DRDY)) { }
ADC->ADC_LCDR;
ADC->ADC_IER = ADC_IER_DRDY; // fire ADC interrupt on any conversion complete
for (int i = 0; i < 3; i++)
g_adc_data[i] = 0x42 + i;
NVIC_SetPriority(ADC_IRQn, 11); // really low priority...
NVIC_EnableIRQ(ADC_IRQn);
}
// Initializes de ADC. To be used only once.
static void ADC_Init() {
// Power up ADC
PMC->PMC_PCER0 |= ADC_POWER_BITMASK;
// Reset the controller
ADC->ADC_CR = ADC_CR_SWRST;
// Reset the Control Register
// This sets:
// * Hardware triggers are disabled. Only software triggers.
// * No trigger selected.
// * High resolution selected.
// * No sleep mode, no fast wake up, no free run.
// * The clock divider to 4 (12 MHz).
// * No analog change
// * No sequence
ADC->ADC_MR = ADC_MR_PRESCAL(1) | ADC_MR_STARTUP(8) |
ADC_MR_TRANSFER(1) | ADC_MR_TRACKTIM(0) | ADC_MR_SETTLING(3);
}
ADC_DRIVER_DATA_STRU adc_driver_data;
const ADC_DRIVER_INFO adc_driver =
{
{
DRIVER_INFO_STUB,
(DRV_ISR)ADC_ISR,
(DRV_DCR)ADC_DCR,
(DRV_DSR)ADC_DSR,
ADC_IRQn,
DRV_PRIORITY_KERNEL,
ID_ADC
},
ADC,
&adc_driver_data,
ADC_MR_TRANSFER(1) | ADC_MR_TRACKTIM(7) | ADC_MR_SETTLING(3) | ADC_MR_STARTUP_SUT96//CFG_ADC_MR
};
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
// (30) DACC DRIVER
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
DACC_DRIVER_DATA_STRU dacc_driver_data;
const DACC_DRIVER_INFO dacc_driver =
{
{
DRIVER_INFO_STUB,
(DRV_ISR)DACC_ISR,
(DRV_DCR)DACC_DCR,
(DRV_DSR)DACC_DSR,
DACC_IRQn,
