static void adp5588_irq_unmask(struct irq_data *d) { struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d); unsigned gpio = d->irq - dev->irq_base; dev->irq_mask[ADP5588_BANK(gpio)] |= ADP5588_BIT(gpio); }
static int adp5588_gpio_direction_output(struct gpio_chip *chip, unsigned off, int val) { struct adp5588_kpad *kpad = gpiochip_get_data(chip); unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]); unsigned int bit = ADP5588_BIT(kpad->gpiomap[off]); int ret; mutex_lock(&kpad->gpio_lock); kpad->dir[bank] |= bit; if (val) kpad->dat_out[bank] |= bit; else kpad->dat_out[bank] &= ~bit; ret = adp5588_write(kpad->client, GPIO_DAT_OUT1 + bank, kpad->dat_out[bank]); ret |= adp5588_write(kpad->client, GPIO_DIR1 + bank, kpad->dir[bank]); mutex_unlock(&kpad->gpio_lock); return ret; }
static int adp5588_irq_set_type(struct irq_data *d, unsigned int type) { struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d); uint16_t gpio = d->irq - dev->irq_base; unsigned bank, bit; if ((type & IRQ_TYPE_EDGE_BOTH)) { dev_err(&dev->client->dev, "irq %d: unsupported type %d\n", d->irq, type); return -EINVAL; } bank = ADP5588_BANK(gpio); bit = ADP5588_BIT(gpio); if (type & IRQ_TYPE_LEVEL_HIGH) dev->int_lvl[bank] |= bit; else if (type & IRQ_TYPE_LEVEL_LOW) dev->int_lvl[bank] &= ~bit; else return -EINVAL; adp5588_gpio_direction_input(&dev->gpio_chip, gpio); adp5588_gpio_write(dev->client, GPIO_INT_LVL1 + bank, dev->int_lvl[bank]); return 0; }
static irqreturn_t adp5588_irq_handler(int irq, void *devid) { struct adp5588_gpio *dev = devid; unsigned status, bank, bit, pending; int ret; status = adp5588_gpio_read(dev->client, INT_STAT); if (status & ADP5588_GPI_INT) { ret = adp5588_gpio_read_intstat(dev->client, dev->irq_stat); if (ret < 0) memset(dev->irq_stat, 0, ARRAY_SIZE(dev->irq_stat)); for (bank = 0, bit = 0; bank <= ADP5588_BANK(ADP5588_MAXGPIO); bank++, bit = 0) { pending = dev->irq_stat[bank] & dev->irq_mask[bank]; while (pending) { if (pending & (1 << bit)) { handle_nested_irq(dev->irq_base + (bank << 3) + bit); pending &= ~(1 << bit); } bit++; } } } adp5588_gpio_write(dev->client, INT_STAT, status); /* Status is W1C */ return IRQ_HANDLED; }
static int adp5588_gpio_direction_output(struct gpio_chip *chip, unsigned off, int val) { int ret; unsigned bank, bit; struct adp5588_gpio *dev = container_of(chip, struct adp5588_gpio, gpio_chip); bank = ADP5588_BANK(off); bit = ADP5588_BIT(off); mutex_lock(&dev->lock); dev->dir[bank] |= bit; if (val) dev->dat_out[bank] |= bit; else dev->dat_out[bank] &= ~bit; ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank, dev->dat_out[bank]); ret |= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]); mutex_unlock(&dev->lock); return ret; }
static void adp5588_irq_unmask(unsigned int irq) { struct adp5588_gpio *dev = get_irq_chip_data(irq); unsigned gpio = irq - dev->irq_base; dev->irq_mask[ADP5588_BANK(gpio)] |= ADP5588_BIT(gpio); }
static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off) { struct adp5588_kpad *kpad = container_of(chip, struct adp5588_kpad, gc); unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]); unsigned int bit = ADP5588_BIT(kpad->gpiomap[off]); return !!(adp5588_read(kpad->client, GPIO_DAT_STAT1 + bank) & bit); }
static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off) { struct adp5588_gpio *dev = container_of(chip, struct adp5588_gpio, gpio_chip); return !!(adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + ADP5588_BANK(off)) & ADP5588_BIT(off)); }
static int adp5588_gpio_add(struct adp5588_kpad *kpad) { struct device *dev = &kpad->client->dev; const struct adp5588_kpad_platform_data *pdata = dev_get_platdata(dev); const struct adp5588_gpio_platform_data *gpio_data = pdata->gpio_data; int i, error; if (!gpio_data) return 0; kpad->gc.ngpio = adp5588_build_gpiomap(kpad, pdata); if (kpad->gc.ngpio == 0) { dev_info(dev, "No unused gpios left to export\n"); return 0; } kpad->export_gpio = true; kpad->gc.direction_input = adp5588_gpio_direction_input; kpad->gc.direction_output = adp5588_gpio_direction_output; kpad->gc.get = adp5588_gpio_get_value; kpad->gc.set = adp5588_gpio_set_value; kpad->gc.can_sleep = 1; kpad->gc.base = gpio_data->gpio_start; kpad->gc.label = kpad->client->name; kpad->gc.owner = THIS_MODULE; kpad->gc.names = gpio_data->names; mutex_init(&kpad->gpio_lock); error = gpiochip_add_data(&kpad->gc, kpad); if (error) { dev_err(dev, "gpiochip_add failed, err: %d\n", error); return error; } for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) { kpad->dat_out[i] = adp5588_read(kpad->client, GPIO_DAT_OUT1 + i); kpad->dir[i] = adp5588_read(kpad->client, GPIO_DIR1 + i); } if (gpio_data->setup) { error = gpio_data->setup(kpad->client, kpad->gc.base, kpad->gc.ngpio, gpio_data->context); if (error) dev_warn(dev, "setup failed, %d\n", error); } return 0; }
static void adp5588_irq_bus_sync_unlock(struct irq_data *d) { struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d); int i; for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) if (dev->int_en[i] ^ dev->irq_mask[i]) { dev->int_en[i] = dev->irq_mask[i]; adp5588_gpio_write(dev->client, GPIO_INT_EN1 + i, dev->int_en[i]); } mutex_unlock(&dev->irq_lock); }
static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off) { int ret; unsigned bank; struct adp5588_gpio *dev = gpiochip_get_data(chip); bank = ADP5588_BANK(off); mutex_lock(&dev->lock); dev->dir[bank] &= ~ADP5588_BIT(off); ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]); mutex_unlock(&dev->lock); return ret; }
static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off) { struct adp5588_kpad *kpad = container_of(chip, struct adp5588_kpad, gc); unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]); unsigned int bit = ADP5588_BIT(kpad->gpiomap[off]); int ret; mutex_lock(&kpad->gpio_lock); kpad->dir[bank] &= ~bit; ret = adp5588_write(kpad->client, GPIO_DIR1 + bank, kpad->dir[bank]); mutex_unlock(&kpad->gpio_lock); return ret; }
static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off) { struct adp5588_kpad *kpad = gpiochip_get_data(chip); unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]); unsigned int bit = ADP5588_BIT(kpad->gpiomap[off]); int val; mutex_lock(&kpad->gpio_lock); if (kpad->dir[bank] & bit) val = kpad->dat_out[bank]; else val = adp5588_read(kpad->client, GPIO_DAT_STAT1 + bank); mutex_unlock(&kpad->gpio_lock); return !!(val & bit); }
static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off) { struct adp5588_gpio *dev = gpiochip_get_data(chip); unsigned bank = ADP5588_BANK(off); unsigned bit = ADP5588_BIT(off); int val; mutex_lock(&dev->lock); if (dev->dir[bank] & bit) val = dev->dat_out[bank]; else val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank); mutex_unlock(&dev->lock); return !!(val & bit); }
static void adp5588_gpio_set_value(struct gpio_chip *chip, unsigned off, int val) { unsigned bank, bit; struct adp5588_gpio *dev = gpiochip_get_data(chip); bank = ADP5588_BANK(off); bit = ADP5588_BIT(off); mutex_lock(&dev->lock); if (val) dev->dat_out[bank] |= bit; else dev->dat_out[bank] &= ~bit; adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank, dev->dat_out[bank]); mutex_unlock(&dev->lock); }
static void adp5588_gpio_set_value(struct gpio_chip *chip, unsigned off, int val) { struct adp5588_kpad *kpad = gpiochip_get_data(chip); unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]); unsigned int bit = ADP5588_BIT(kpad->gpiomap[off]); mutex_lock(&kpad->gpio_lock); if (val) kpad->dat_out[bank] |= bit; else kpad->dat_out[bank] &= ~bit; adp5588_write(kpad->client, GPIO_DAT_OUT1 + bank, kpad->dat_out[bank]); mutex_unlock(&kpad->gpio_lock); }
static int __devinit adp5588_gpio_probe(struct i2c_client *client, const struct i2c_device_id *id) { struct adp5588_gpio_platform_data *pdata = client->dev.platform_data; struct adp5588_gpio *dev; struct gpio_chip *gc; int ret, i, revid; if (pdata == NULL) { dev_err(&client->dev, "missing platform data\n"); return -ENODEV; } if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { dev_err(&client->dev, "SMBUS Byte Data not Supported\n"); return -EIO; } dev = kzalloc(sizeof(*dev), GFP_KERNEL); if (dev == NULL) { dev_err(&client->dev, "failed to alloc memory\n"); return -ENOMEM; } dev->client = client; gc = &dev->gpio_chip; gc->direction_input = adp5588_gpio_direction_input; gc->direction_output = adp5588_gpio_direction_output; gc->get = adp5588_gpio_get_value; gc->set = adp5588_gpio_set_value; gc->can_sleep = 1; gc->base = pdata->gpio_start; gc->ngpio = ADP5588_MAXGPIO; gc->label = client->name; gc->owner = THIS_MODULE; mutex_init(&dev->lock); ret = adp5588_gpio_read(dev->client, DEV_ID); if (ret < 0) goto err; revid = ret & ADP5588_DEVICE_ID_MASK; for (i = 0, ret = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) { dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i); dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i); ret |= adp5588_gpio_write(client, KP_GPIO1 + i, 0); ret |= adp5588_gpio_write(client, GPIO_PULL1 + i, (pdata->pullup_dis_mask >> (8 * i)) & 0xFF); ret |= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0); if (ret) goto err; } if (pdata->irq_base) { if (WA_DELAYED_READOUT_REVID(revid)) { dev_warn(&client->dev, "GPIO int not supported\n"); } else { ret = adp5588_irq_setup(dev); if (ret) goto err; } } ret = gpiochip_add(&dev->gpio_chip); if (ret) goto err_irq; dev_info(&client->dev, "IRQ Base: %d Rev.: %d\n", pdata->irq_base, revid); if (pdata->setup) { ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context); if (ret < 0) dev_warn(&client->dev, "setup failed, %d\n", ret); } i2c_set_clientdata(client, dev); return 0; err_irq: adp5588_irq_teardown(dev); err: kfree(dev); return ret; }
static int adp5588_setup(struct i2c_client *client) { const struct adp5588_kpad_platform_data *pdata = dev_get_platdata(&client->dev); const struct adp5588_gpio_platform_data *gpio_data = pdata->gpio_data; int i, ret; unsigned char evt_mode1 = 0, evt_mode2 = 0, evt_mode3 = 0; ret = adp5588_write(client, KP_GPIO1, KP_SEL(pdata->rows)); ret |= adp5588_write(client, KP_GPIO2, KP_SEL(pdata->cols) & 0xFF); ret |= adp5588_write(client, KP_GPIO3, KP_SEL(pdata->cols) >> 8); if (pdata->en_keylock) { ret |= adp5588_write(client, UNLOCK1, pdata->unlock_key1); ret |= adp5588_write(client, UNLOCK2, pdata->unlock_key2); ret |= adp5588_write(client, KEY_LCK_EC_STAT, ADP5588_K_LCK_EN); } for (i = 0; i < KEYP_MAX_EVENT; i++) ret |= adp5588_read(client, Key_EVENTA); for (i = 0; i < pdata->gpimapsize; i++) { unsigned short pin = pdata->gpimap[i].pin; if (pin <= GPI_PIN_ROW_END) { evt_mode1 |= (1 << (pin - GPI_PIN_ROW_BASE)); } else { evt_mode2 |= ((1 << (pin - GPI_PIN_COL_BASE)) & 0xFF); evt_mode3 |= ((1 << (pin - GPI_PIN_COL_BASE)) >> 8); } } if (pdata->gpimapsize) { ret |= adp5588_write(client, GPI_EM1, evt_mode1); ret |= adp5588_write(client, GPI_EM2, evt_mode2); ret |= adp5588_write(client, GPI_EM3, evt_mode3); } if (gpio_data) { for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) { int pull_mask = gpio_data->pullup_dis_mask; ret |= adp5588_write(client, GPIO_PULL1 + i, (pull_mask >> (8 * i)) & 0xFF); } } ret |= adp5588_write(client, INT_STAT, ADP5588_CMP2_INT | ADP5588_CMP1_INT | ADP5588_OVR_FLOW_INT | ADP5588_K_LCK_INT | ADP5588_GPI_INT | ADP5588_KE_INT); /* Status is W1C */ ret |= adp5588_write(client, CFG, ADP5588_INT_CFG | ADP5588_OVR_FLOW_IEN | ADP5588_KE_IEN); if (ret < 0) { dev_err(&client->dev, "Write Error\n"); return ret; } return 0; }