Esempi in C++ (Cpp) per AVS

Esempio n. 1

0

Mostra file

File: acpuclock-8960.c Progetto: LiquidSmooth-Devices/Deathly_Kernel_D2

	[10] = { {  918000, HFPLL, 1, 0x22 }, 1150000, 1150000, 6 },
	[11] = { {  972000, HFPLL, 1, 0x24 }, 1150000, 1150000, 6 },
	[12] = { { 1026000, HFPLL, 1, 0x26 }, 1150000, 1150000, 6 },
	[13] = { { 1080000, HFPLL, 1, 0x28 }, 1150000, 1150000, 6 },
	[14] = { { 1134000, HFPLL, 1, 0x2A }, 1150000, 1150000, 6 },
	[15] = { { 1188000, HFPLL, 1, 0x2C }, 1150000, 1150000, 6 },
	[16] = { { 1242000, HFPLL, 1, 0x2E }, 1150000, 1150000, 6 },
	[17] = { { 1296000, HFPLL, 1, 0x30 }, 1150000, 1150000, 6 },
	[18] = { { 1350000, HFPLL, 1, 0x32 }, 1150000, 1150000, 6 },
	{ }
};

#define AVS(x) .avsdscr_setting = (x)

static struct acpu_level acpu_freq_tbl_slow[] __initdata = {
	{ 1, {   384000, PLL_8, 0, 0x00 }, L2(0),   950000, AVS(0x40001F) },
	{ 0, {   432000, HFPLL, 2, 0x20 }, L2(6),   975000 },
	{ 1, {   486000, HFPLL, 2, 0x24 }, L2(6),   975000 },
	{ 0, {   540000, HFPLL, 2, 0x28 }, L2(6),  1000000 },
	{ 1, {   594000, HFPLL, 1, 0x16 }, L2(6),  1000000 },
	{ 0, {   648000, HFPLL, 1, 0x18 }, L2(6),  1025000 },
	{ 1, {   702000, HFPLL, 1, 0x1A }, L2(6),  1025000 },
	{ 0, {   756000, HFPLL, 1, 0x1C }, L2(6),  1075000 },
	{ 1, {   810000, HFPLL, 1, 0x1E }, L2(6),  1075000 },
	{ 0, {   864000, HFPLL, 1, 0x20 }, L2(6),  1100000 },
	{ 1, {   918000, HFPLL, 1, 0x22 }, L2(6),  1100000 },
	{ 0, {   972000, HFPLL, 1, 0x24 }, L2(6),  1125000 },
	{ 1, {  1026000, HFPLL, 1, 0x26 }, L2(6),  1125000 },
#if defined(CONFIG_MSM_DCVS_FOR_MSM8260A)
	{ 0, {  1080000, HFPLL, 1, 0x28 }, L2(18), 1175000, AVS(0x400015) },
	{ 1, {  1134000, HFPLL, 1, 0x2A }, L2(18), 1175000, AVS(0x400015) },

Esempio n. 2

0

Mostra file

File: acpuclock-8960.c Progetto: WhiteNeo-/kernel-msm

	[12] = { { 1026000, HFPLL, 1, 0x26 }, 1150000, 1100000, 6 },
	[13] = { { 1080000, HFPLL, 1, 0x28 }, 1150000, 1150000, 6 },
	[14] = { { 1134000, HFPLL, 1, 0x2A }, 1150000, 1150000, 6 },
	[15] = { { 1188000, HFPLL, 1, 0x2C }, 1150000, 1150000, 6 },
	[16] = { { 1242000, HFPLL, 1, 0x2E }, 1150000, 1150000, 6 },
	[17] = { { 1296000, HFPLL, 1, 0x30 }, 1150000, 1150000, 6 },
	[18] = { { 1350000, HFPLL, 1, 0x32 }, 1150000, 1150000, 6 },
	[19] = { { 1404000, HFPLL, 1, 0x34 }, 1150000, 1150000, 7 },
	[20] = { { 1458000, HFPLL, 1, 0x36 }, 1150000, 1150000, 7 },
	{ }
};

#define AVS(x) .avsdscr_setting = (x)

static struct acpu_level acpu_freq_tbl_slow[] __initdata = {
	{ 1, {   162000, HFPLL, 1, 0x06 }, L2(0),   900000, AVS(0x40001F) },
	{ 1, {   270000, HFPLL, 1, 0x0A }, L2(0),   925000, AVS(0x40001F) },
	{ 1, {   384000, PLL_8, 0, 0x00 }, L2(0),   950000, AVS(0x40001F) },
	{ 1, {   486000, HFPLL, 1, 0x12 }, L2(6),   975000 },
	{ 1, {   594000, HFPLL, 1, 0x16 }, L2(6),  1000000 },
	{ 1, {   702000, HFPLL, 1, 0x1A }, L2(6),  1025000 },
	{ 1, {   810000, HFPLL, 1, 0x1E }, L2(6),  1075000 },
	{ 1, {   918000, HFPLL, 1, 0x22 }, L2(6),  1100000 },
	{ 1, {  1026000, HFPLL, 1, 0x26 }, L2(6),  1125000 },
	{ 1, {  1134000, HFPLL, 1, 0x2A }, L2(12), 1175000, AVS(0x400015) },
	{ 1, {  1242000, HFPLL, 1, 0x2E }, L2(12), 1200000, AVS(0x400015) },
	{ 1, {  1350000, HFPLL, 1, 0x32 }, L2(12), 1225000, AVS(0x400015) },
	{ 1, {  1458000, HFPLL, 1, 0x36 }, L2(18), 1237500, AVS(0x400015) },
	{ 1, {  1512000, HFPLL, 1, 0x38 }, L2(18), 1250000, AVS(0x400015) },
	{ 1, {  1620000, HFPLL, 1, 0x3C }, L2(20), 1262500, AVS(0x400015) },
	{ 0, { 0 } }

Esempio n. 3

0

Mostra file

File: acpuclock-8960ab.c Progetto: NoelMacwan/SXDHuashan

	[9]  = { { 1350000, HFPLL, 1, 0x32 }, 1150000, 1150000, 5 },
	{ }
};

#define AVS(x) .avsdscr_setting = (x)

#ifdef CONFIG_MACH_VISKAN_HUASHAN
#define VOLTAGE_TUNE 25000
#define TURBO_FREQ_VOLTAGE_TUNE 25000
#else
#define VOLTAGE_TUNE 0
#define TURBO_FREQ_VOLTAGE_TUNE 0
#endif

static struct acpu_level freq_tbl_PVS0[] __initdata = {
	{ 1, {   384000, PLL_8, 0, 0x00 }, L2(0),   950000 + VOLTAGE_TUNE, AVS(0x70001F) },
	{ 1, {   486000, HFPLL, 2, 0x24 }, L2(4),   950000 + VOLTAGE_TUNE, AVS(0x0) },
	{ 1, {   594000, HFPLL, 1, 0x16 }, L2(4),   975000 + VOLTAGE_TUNE, AVS(0x0) },
	{ 1, {   702000, HFPLL, 1, 0x1A }, L2(4),  1000000 + VOLTAGE_TUNE, AVS(0x0) },
	{ 1, {   810000, HFPLL, 1, 0x1E }, L2(4),  1025000 + VOLTAGE_TUNE, AVS(0x0) },
	{ 1, {   918000, HFPLL, 1, 0x22 }, L2(4),  1050000 + VOLTAGE_TUNE, AVS(0x0) },
	{ 1, {  1026000, HFPLL, 1, 0x26 }, L2(4),  1075000 + VOLTAGE_TUNE, AVS(0x0) },
	{ 1, {  1134000, HFPLL, 1, 0x2A }, L2(9),  1100000 + VOLTAGE_TUNE, AVS(0x70000D) },
	{ 1, {  1242000, HFPLL, 1, 0x2E }, L2(9),  1125000 + VOLTAGE_TUNE, AVS(0x0) },
	{ 1, {  1350000, HFPLL, 1, 0x32 }, L2(9),  1150000 + VOLTAGE_TUNE, AVS(0x0) },
	{ 1, {  1458000, HFPLL, 1, 0x36 }, L2(9),  1175000 + VOLTAGE_TUNE, AVS(0x0) },
	{ 1, {  1566000, HFPLL, 1, 0x3A }, L2(9),  1200000 + VOLTAGE_TUNE, AVS(0x0) },
	{ 1, {  1674000, HFPLL, 1, 0x3E }, L2(9),  1225000 + VOLTAGE_TUNE, AVS(0x0) },
	{ 1, {  1728000, HFPLL, 1, 0x40 }, L2(9),  1250000 + VOLTAGE_TUNE
		+ TURBO_FREQ_VOLTAGE_TUNE, AVS(0x70000B) },
	{ 0, { 0 } }

Esempio n. 4

0

Mostra file

File: acpuclock-8960ab.c Progetto: FrozenCow/android_kernel_sony_msm8960t

	[1]  = { {  486000, HFPLL, 2, 0x24 }, 1050000, 1050000, 2 },
	[2]  = { {  594000, HFPLL, 1, 0x16 }, 1050000, 1050000, 2 },
	[3]  = { {  702000, HFPLL, 1, 0x1A }, 1050000, 1050000, 4 },
	[4]  = { {  810000, HFPLL, 1, 0x1E }, 1050000, 1050000, 4 },
	[5]  = { {  918000, HFPLL, 1, 0x22 }, 1150000, 1150000, 5 },
	[6]  = { { 1026000, HFPLL, 1, 0x26 }, 1150000, 1150000, 5 },
	[7]  = { { 1134000, HFPLL, 1, 0x2A }, 1150000, 1150000, 5 },
	[8]  = { { 1242000, HFPLL, 1, 0x2E }, 1150000, 1150000, 5 },
	[9]  = { { 1350000, HFPLL, 1, 0x32 }, 1150000, 1150000, 5 },
	{ }
};

#define AVS(x) .avsdscr_setting = (x)

static struct acpu_level freq_tbl_PVS0[] __initdata = {
	{ 1, {   384000, PLL_8, 0, 0x00 }, L2(0),   975000, AVS(0x70001F) },
	{ 1, {   486000, HFPLL, 2, 0x24 }, L2(3),   975000, AVS(0x0) },
	{ 1, {   594000, HFPLL, 1, 0x16 }, L2(3),  1000000, AVS(0x0) },
	{ 1, {   702000, HFPLL, 1, 0x1A }, L2(3),  1025000, AVS(0x0) },
	{ 1, {   810000, HFPLL, 1, 0x1E }, L2(3),  1050000, AVS(0x0) },
	{ 1, {   918000, HFPLL, 1, 0x22 }, L2(3),  1075000, AVS(0x0) },
	{ 1, {  1026000, HFPLL, 1, 0x26 }, L2(3),  1100000, AVS(0x0) },
	{ 1, {  1134000, HFPLL, 1, 0x2A }, L2(9),  1125000, AVS(0x70000D) },
	{ 1, {  1242000, HFPLL, 1, 0x2E }, L2(9),  1150000, AVS(0x0) },
	{ 1, {  1350000, HFPLL, 1, 0x32 }, L2(9),  1175000, AVS(0x0) },
	{ 1, {  1458000, HFPLL, 1, 0x36 }, L2(9),  1200000, AVS(0x0) },
	{ 1, {  1566000, HFPLL, 1, 0x3A }, L2(9),  1225000, AVS(0x0) },
	{ 1, {  1674000, HFPLL, 1, 0x3E }, L2(9),  1250000, AVS(0x0) },
#ifdef CONFIG_OC_ULTIMATE
	{ 1, {  1728000, HFPLL, 1, 0x42 }, L2(9),  1200000, AVS(0x0) },
	{ 1, {  1836000, HFPLL, 1, 0x46 }, L2(9),  1225000, AVS(0x0) },