/**Function*************************************************************
Synopsis [Establishes relationship between nodes using pairing.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Ssw_MatchingStart( Aig_Man_t * p0, Aig_Man_t * p1, Vec_Int_t * vPairs )
{
Aig_Obj_t * pObj0, * pObj1;
int i;
// create matching
Aig_ManCleanData( p0 );
Aig_ManCleanData( p1 );
for ( i = 0; i < Vec_IntSize(vPairs); i += 2 )
{
pObj0 = Aig_ManObj( p0, Vec_IntEntry(vPairs, i) );
pObj1 = Aig_ManObj( p1, Vec_IntEntry(vPairs, i+1) );
assert( pObj0->pData == NULL );
assert( pObj1->pData == NULL );
pObj0->pData = pObj1;
pObj1->pData = pObj0;
}
// make sure constants are matched
pObj0 = Aig_ManConst1( p0 );
pObj1 = Aig_ManConst1( p1 );
assert( pObj0->pData == pObj1 );
assert( pObj1->pData == pObj0 );
// make sure PIs are matched
Saig_ManForEachPi( p0, pObj0, i )
{
pObj1 = Aig_ManPi( p1, i );
assert( pObj0->pData == pObj1 );
assert( pObj1->pData == pObj0 );
}
/**Function*************************************************************
Synopsis [Duplicates while ORing the POs of sequential circuit.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Saig_ManCreateEquivMiter( Aig_Man_t * pAig, Vec_Int_t * vPairs )
{
Aig_Man_t * pAigNew;
Aig_Obj_t * pObj, * pObj2, * pMiter;
int i;
if ( pAig->nConstrs > 0 )
{
printf( "The AIG manager should have no constraints.\n" );
return NULL;
}
// start the new manager
pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
pAigNew->pName = Aig_UtilStrsav( pAig->pName );
pAigNew->nConstrs = pAig->nConstrs;
// map the constant node
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
// create variables for PIs
Aig_ManForEachPi( pAig, pObj, i )
pObj->pData = Aig_ObjCreatePi( pAigNew );
// add internal nodes of this frame
Aig_ManForEachNode( pAig, pObj, i )
pObj->pData = Aig_And( pAigNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
// create POs
assert( Vec_IntSize(vPairs) % 2 == 0 );
Aig_ManForEachNodeVec( pAig, vPairs, pObj, i )
{
pObj2 = Aig_ManObj( pAig, Vec_IntEntry(vPairs, ++i) );
pMiter = Aig_Exor( pAigNew, (Aig_Obj_t *)pObj->pData, (Aig_Obj_t *)pObj2->pData );
pMiter = Aig_NotCond( pMiter, pObj->fPhase ^ pObj2->fPhase );
Aig_ObjCreatePo( pAigNew, pMiter );
}
/**Function*************************************************************
Synopsis [Creates the dual output miter.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Aig_ManCreateDualOutputMiter( Aig_Man_t * p1, Aig_Man_t * p2 )
{
Aig_Man_t * pNew;
Aig_Obj_t * pObj;
int i;
assert( Aig_ManPiNum(p1) == Aig_ManPiNum(p2) );
assert( Aig_ManPoNum(p1) == Aig_ManPoNum(p2) );
pNew = Aig_ManStart( Aig_ManObjNumMax(p1) + Aig_ManObjNumMax(p2) );
// add first AIG
Aig_ManConst1(p1)->pData = Aig_ManConst1(pNew);
Aig_ManForEachPi( p1, pObj, i )
pObj->pData = Aig_ObjCreatePi( pNew );
Aig_ManForEachNode( p1, pObj, i )
pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
// add second AIG
Aig_ManConst1(p2)->pData = Aig_ManConst1(pNew);
Aig_ManForEachPi( p2, pObj, i )
pObj->pData = Aig_ManPi( pNew, i );
Aig_ManForEachNode( p2, pObj, i )
pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
// add the outputs
for ( i = 0; i < Aig_ManPoNum(p1); i++ )
{
Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(Aig_ManPo(p1, i)) );
Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(Aig_ManPo(p2, i)) );
}
Aig_ManCleanup( pNew );
return pNew;
}
/**Function*************************************************************
Synopsis [Duplicates the AIG manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Aig_ManDup( Aig_Man_t * p, int fOrdered )
{
Aig_Man_t * pNew;
Aig_Obj_t * pObj;
int i;
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
pNew->pName = Aig_UtilStrsav( p->pName );
pNew->nRegs = p->nRegs;
pNew->nAsserts = p->nAsserts;
if ( p->vFlopNums )
pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
Aig_ManForEachPi( p, pObj, i )
pObj->pData = Aig_ObjCreatePi(pNew);
// duplicate internal nodes
if ( fOrdered )
{
Aig_ManForEachObj( p, pObj, i )
if ( Aig_ObjIsBuf(pObj) )
pObj->pData = Aig_ObjChild0Copy(pObj);
else if ( Aig_ObjIsNode(pObj) )
pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
}
else
{
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Unroll the circuit the given number of timeframes.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Inter_ManFramesBmc( Aig_Man_t * pAig, int nFrames )
{
Aig_Man_t * pFrames;
Aig_Obj_t * pObj, * pObjLi, * pObjLo;
int i, f;
assert( Saig_ManRegNum(pAig) > 0 );
assert( Saig_ManPoNum(pAig) == 1 );
pFrames = Aig_ManStart( Aig_ManNodeNum(pAig) * nFrames );
// map the constant node
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pFrames );
// create variables for register outputs
Saig_ManForEachLo( pAig, pObj, i )
pObj->pData = Aig_ManConst0( pFrames );
// add timeframes
for ( f = 0; f < nFrames; f++ )
{
// create PI nodes for this frame
Saig_ManForEachPi( pAig, pObj, i )
pObj->pData = Aig_ObjCreateCi( pFrames );
// add internal nodes of this frame
Aig_ManForEachNode( pAig, pObj, i )
pObj->pData = Aig_And( pFrames, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
if ( f == nFrames - 1 )
break;
// transfer to register outputs
Saig_ManForEachLiLo( pAig, pObjLi, pObjLo, i )
pObjLi->pData = Aig_ObjChild0Copy(pObjLi);
// transfer to register outputs
Saig_ManForEachLiLo( pAig, pObjLi, pObjLo, i )
pObjLo->pData = pObjLi->pData;
}
// create POs for the output of the last frame
pObj = Aig_ManCo( pAig, 0 );
Aig_ObjCreateCo( pFrames, Aig_ObjChild0Copy(pObj) );
Aig_ManCleanup( pFrames );
return pFrames;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Saig_ManTemporDecompose( Aig_Man_t * pAig, int nFrames )
{
Aig_Man_t * pAigNew, * pFrames;
Aig_Obj_t * pObj, * pReset;
int i;
if ( pAig->nConstrs > 0 )
{
printf( "The AIG manager should have no constraints.\n" );
return NULL;
}
// create initialized timeframes
pFrames = Saig_ManTemporFrames( pAig, nFrames );
assert( Aig_ManPoNum(pFrames) == Aig_ManRegNum(pAig) );
// start the new manager
Aig_ManCleanData( pAig );
pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
pAigNew->pName = Aig_UtilStrsav( pAig->pName );
// map the constant node and primary inputs
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
Saig_ManForEachPi( pAig, pObj, i )
pObj->pData = Aig_ObjCreatePi( pAigNew );
// insert initialization logic
Aig_ManConst1(pFrames)->pData = Aig_ManConst1( pAigNew );
Aig_ManForEachPi( pFrames, pObj, i )
pObj->pData = Aig_ObjCreatePi( pAigNew );
Aig_ManForEachNode( pFrames, pObj, i )
pObj->pData = Aig_And( pAigNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
Aig_ManForEachPo( pFrames, pObj, i )
pObj->pData = Aig_ObjChild0Copy(pObj);
// create reset latch (the first one among the latches)
pReset = Aig_ObjCreatePi( pAigNew );
// create flop output values
Saig_ManForEachLo( pAig, pObj, i )
pObj->pData = Aig_Mux( pAigNew, pReset, Aig_ObjCreatePi(pAigNew), (Aig_Obj_t *)Aig_ManPo(pFrames, i)->pData );
Aig_ManStop( pFrames );
// add internal nodes of this frame
Aig_ManForEachNode( pAig, pObj, i )
pObj->pData = Aig_And( pAigNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
// create primary outputs
Saig_ManForEachPo( pAig, pObj, i )
Aig_ObjCreatePo( pAigNew, Aig_ObjChild0Copy(pObj) );
// create reset latch (the first one among the latches)
Aig_ObjCreatePo( pAigNew, Aig_ManConst1(pAigNew) );
// create latch inputs
Saig_ManForEachLi( pAig, pObj, i )
Aig_ObjCreatePo( pAigNew, Aig_ObjChild0Copy(pObj) );
// finalize
Aig_ManCleanup( pAigNew );
Aig_ManSetRegNum( pAigNew, Aig_ManRegNum(pAig)+1 ); // + reset latch (011111...)
return pAigNew;
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Duplicates while ORing the POs of sequential circuit.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Saig_ManDupOrpos( Aig_Man_t * pAig )
{
Aig_Man_t * pAigNew;
Aig_Obj_t * pObj, * pMiter;
int i;
if ( pAig->nConstrs > 0 )
{
printf( "The AIG manager should have no constraints.\n" );
return NULL;
}
// start the new manager
pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
pAigNew->pName = Aig_UtilStrsav( pAig->pName );
pAigNew->nConstrs = pAig->nConstrs;
// map the constant node
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
// create variables for PIs
Aig_ManForEachPi( pAig, pObj, i )
pObj->pData = Aig_ObjCreatePi( pAigNew );
// add internal nodes of this frame
Aig_ManForEachNode( pAig, pObj, i )
pObj->pData = Aig_And( pAigNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
// create PO of the circuit
pMiter = Aig_ManConst0( pAigNew );
Saig_ManForEachPo( pAig, pObj, i )
pMiter = Aig_Or( pAigNew, pMiter, Aig_ObjChild0Copy(pObj) );
Aig_ObjCreatePo( pAigNew, pMiter );
// transfer to register outputs
Saig_ManForEachLi( pAig, pObj, i )
Aig_ObjCreatePo( pAigNew, Aig_ObjChild0Copy(pObj) );
Aig_ManCleanup( pAigNew );
Aig_ManSetRegNum( pAigNew, Aig_ManRegNum(pAig) );
return pAigNew;
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Creates initialized timeframes for temporal decomposition.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Saig_ManTemporFrames( Aig_Man_t * pAig, int nFrames )
{
Aig_Man_t * pFrames;
Aig_Obj_t * pObj, * pObjLi, * pObjLo;
int i, f;
// start the frames package
Aig_ManCleanData( pAig );
pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) * nFrames );
pFrames->pName = Aig_UtilStrsav( pAig->pName );
// initiliaze the flops
Saig_ManForEachLo( pAig, pObj, i )
pObj->pData = Aig_ManConst0(pFrames);
// for each timeframe
for ( f = 0; f < nFrames; f++ )
{
Aig_ManConst1(pAig)->pData = Aig_ManConst1(pFrames);
Saig_ManForEachPi( pAig, pObj, i )
pObj->pData = Aig_ObjCreatePi(pFrames);
Aig_ManForEachNode( pAig, pObj, i )
pObj->pData = Aig_And( pFrames, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
Aig_ManForEachPo( pAig, pObj, i )
pObj->pData = Aig_ObjChild0Copy(pObj);
Saig_ManForEachLiLo( pAig, pObjLi, pObjLo, i )
pObjLo->pData = pObjLi->pData;
}
// create POs for the flop inputs
Saig_ManForEachLi( pAig, pObj, i )
Aig_ObjCreatePo( pFrames, (Aig_Obj_t *)pObj->pData );
Aig_ManCleanup( pFrames );
return pFrames;
}
/**Function*************************************************************
Synopsis [Duplicate the AIG w/o POs and transforms to transit into init state.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Inter_ManStartOneOutput( Aig_Man_t * p, int fAddFirstPo )
{
Aig_Man_t * pNew;
Aig_Obj_t * pObj, * pObjLi, * pObjLo;
Aig_Obj_t * pCtrl = NULL; // Suppress "might be used uninitialized"
int i;
assert( Aig_ManRegNum(p) > 0 );
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
pNew->pName = Abc_UtilStrsav( p->pName );
pNew->pSpec = Abc_UtilStrsav( p->pSpec );
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
Aig_ManForEachCi( p, pObj, i )
{
if ( i == Saig_ManPiNum(p) )
pCtrl = Aig_ObjCreateCi( pNew );
pObj->pData = Aig_ObjCreateCi( pNew );
}
// set registers
pNew->nRegs = fAddFirstPo? 0 : p->nRegs;
pNew->nTruePis = fAddFirstPo? Aig_ManCiNum(p) + 1 : p->nTruePis + 1;
pNew->nTruePos = fAddFirstPo + Saig_ManConstrNum(p);
// duplicate internal nodes
Aig_ManForEachNode( p, pObj, i )
pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
// create constraint outputs
Saig_ManForEachPo( p, pObj, i )
{
if ( i < Saig_ManPoNum(p)-Saig_ManConstrNum(p) )
continue;
Aig_ObjCreateCo( pNew, Aig_Not( Aig_ObjChild0Copy(pObj) ) );
}
// add the PO
if ( fAddFirstPo )
{
pObj = Aig_ManCo( p, 0 );
Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
}
else
{
// create register inputs with MUXes
Saig_ManForEachLiLo( p, pObjLi, pObjLo, i )
{
pObj = Aig_Mux( pNew, pCtrl, (Aig_Obj_t *)pObjLo->pData, Aig_ObjChild0Copy(pObjLi) );
// pObj = Aig_Mux( pNew, pCtrl, Aig_ManConst0(pNew), Aig_ObjChild0Copy(pObjLi) );
Aig_ObjCreateCo( pNew, pObj );
}
}
/**Function*************************************************************
Synopsis [Duplicates the AIG manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Aig_ManStartFrom( Aig_Man_t * p )
{
Aig_Man_t * pNew;
Aig_Obj_t * pObj;
int i;
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
pNew->pName = Aig_UtilStrsav( p->pName );
// create the PIs
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
Aig_ManForEachPi( p, pObj, i )
pObj->pData = Aig_ObjCreatePi(pNew);
return pNew;
}
/**Function*************************************************************
Synopsis [Checks if node with the given attributes is in the hash table.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Obj_t * Aig_TableLookupTwo( Aig_Man_t * p, Aig_Obj_t * pFanin0, Aig_Obj_t * pFanin1 )
{
Aig_Obj_t * pGhost;
// consider simple cases
if ( pFanin0 == pFanin1 )
return pFanin0;
if ( pFanin0 == Aig_Not(pFanin1) )
return Aig_ManConst0(p);
if ( Aig_Regular(pFanin0) == Aig_ManConst1(p) )
return pFanin0 == Aig_ManConst1(p) ? pFanin1 : Aig_ManConst0(p);
if ( Aig_Regular(pFanin1) == Aig_ManConst1(p) )
return pFanin1 == Aig_ManConst1(p) ? pFanin0 : Aig_ManConst0(p);
pGhost = Aig_ObjCreateGhost( p, pFanin0, pFanin1, AIG_OBJ_AND );
return Aig_TableLookup( p, pGhost );
}
/**Function*************************************************************
Synopsis [Adds strashed nodes for one node.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Aig_ManSpeedupNode( Nwk_Man_t * pNtk, Aig_Man_t * pAig, Nwk_Obj_t * pNode, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vTimes )
{
Vec_Ptr_t * vNodes;
Nwk_Obj_t * pObj, * pObj2;
Aig_Obj_t * ppCofs[32], * pAnd, * pTemp;
int nCofs, i, k, nSkip;
// quit of regulars are the same
Vec_PtrForEachEntry( Nwk_Obj_t *, vLeaves, pObj, i )
Vec_PtrForEachEntry( Nwk_Obj_t *, vLeaves, pObj2, k )
if ( i != k && Aig_Regular((Aig_Obj_t *)pObj->pCopy) == Aig_Regular((Aig_Obj_t *)pObj2->pCopy) )
{
// printf( "Identical after structural hashing!!!\n" );
return;
}
// collect the AIG nodes
vNodes = Vec_PtrAlloc( 100 );
Aig_ManIncrementTravId( pAig );
Aig_ObjSetTravIdCurrent( pAig, Aig_ManConst1(pAig) );
Vec_PtrForEachEntry( Nwk_Obj_t *, vLeaves, pObj, i )
{
pAnd = (Aig_Obj_t *)pObj->pCopy;
Aig_ObjSetTravIdCurrent( pAig, Aig_Regular(pAnd) );
}
/**Function*************************************************************
Synopsis [Performs ternary simulation for one design.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Saig_ManSimDataInit( Aig_Man_t * p, Abc_Cex_t * pCex, Vec_Ptr_t * vSimInfo, Vec_Int_t * vRes )
{
Aig_Obj_t * pObj, * pObjLi, * pObjLo;
int i, f, Entry, iBit = 0;
Saig_ManForEachLo( p, pObj, i )
Saig_ManSimInfoSet( vSimInfo, pObj, 0, Abc_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE:SAIG_ZER );
for ( f = 0; f <= pCex->iFrame; f++ )
{
Saig_ManSimInfoSet( vSimInfo, Aig_ManConst1(p), f, SAIG_ONE );
Saig_ManForEachPi( p, pObj, i )
Saig_ManSimInfoSet( vSimInfo, pObj, f, Abc_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE:SAIG_ZER );
if ( vRes )
Vec_IntForEachEntry( vRes, Entry, i )
Saig_ManSimInfoSet( vSimInfo, Aig_ManCi(p, Entry), f, SAIG_UND );
Aig_ManForEachNode( p, pObj, i )
Saig_ManExtendOneEval( vSimInfo, pObj, f );
Aig_ManForEachCo( p, pObj, i )
Saig_ManExtendOneEval( vSimInfo, pObj, f );
if ( f == pCex->iFrame )
break;
Saig_ManForEachLiLo( p, pObjLi, pObjLo, i )
Saig_ManSimInfoSet( vSimInfo, pObjLo, f+1, Saig_ManSimInfoGet(vSimInfo, pObjLi, f) );
}
// make sure the output of the property failed
pObj = Aig_ManCo( p, pCex->iPo );
return Saig_ManSimInfoGet( vSimInfo, pObj, pCex->iFrame );
}
Gia_Man_t * Gia_ManFromAigChoices( Aig_Man_t * p )
{
Gia_Man_t * pNew;
Aig_Obj_t * pObj;
int i;
assert( p->pEquivs != NULL );
// create the new manager
pNew = Gia_ManStart( Aig_ManObjNum(p) );
pNew->pName = Abc_UtilStrsav( p->pName );
pNew->pSpec = Abc_UtilStrsav( p->pSpec );
pNew->nConstrs = p->nConstrs;
// create room to store equivalences
pNew->pSibls = ABC_CALLOC( int, Aig_ManObjNum(p) );
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->iData = 1;
Aig_ManForEachCi( p, pObj, i )
pObj->iData = Gia_ManAppendCi( pNew );
// add logic for the POs
Aig_ManForEachCo( p, pObj, i )
Gia_ManFromAigChoices_rec( pNew, p, Aig_ObjFanin0(pObj) );
Aig_ManForEachCo( p, pObj, i )
Gia_ManAppendCo( pNew, Gia_ObjChild0Copy(pObj) );
Gia_ManSetRegNum( pNew, Aig_ManRegNum(p) );
assert( Gia_ManObjNum(pNew) == Aig_ManObjNum(p) );
return pNew;
}
/**Function*************************************************************
Synopsis [Returns the probability of POs being 1 under rand seq sim.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Ssw_ManProfileConstraints( Aig_Man_t * p, int nWords, int nFrames, int fVerbose )
{
Vec_Ptr_t * vInfo;
Vec_Int_t * vProbs, * vProbs2;
Aig_Obj_t * pObj, * pObjLi;
unsigned * pInfo, * pInfo0, * pInfo1, * pInfoMask, * pInfoMask2;
int i, w, f, RetValue = 1, clk = clock();
if ( fVerbose )
printf( "Simulating %d nodes and %d flops for %d frames with %d words... ",
Aig_ManNodeNum(p), Aig_ManRegNum(p), nFrames, nWords );
Aig_ManRandom( 1 );
vInfo = Vec_PtrAllocSimInfo( Aig_ManObjNumMax(p)+2, nWords );
Vec_PtrCleanSimInfo( vInfo, 0, nWords );
vProbs = Vec_IntStart( Saig_ManPoNum(p) );
vProbs2 = Vec_IntStart( Saig_ManPoNum(p) );
// start the constant
pInfo = (unsigned *)Vec_PtrEntry( vInfo, Aig_ObjId(Aig_ManConst1(p)) );
for ( w = 0; w < nWords; w++ )
pInfo[w] = ~0;
// start the flop inputs
Saig_ManForEachLi( p, pObj, i )
{
pInfo = (unsigned *)Vec_PtrEntry( vInfo, Aig_ObjId(pObj) );
for ( w = 0; w < nWords; w++ )
pInfo[w] = 0;
}
/**Function*************************************************************
Synopsis [Converts the network from AIG to BDD representation.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_MfsConvertHopToAig( Abc_Obj_t * pObjOld, Aig_Man_t * pMan )
{
Hop_Man_t * pHopMan;
Hop_Obj_t * pRoot;
Abc_Obj_t * pFanin;
int i;
// get the local AIG
pHopMan = (Hop_Man_t *)pObjOld->pNtk->pManFunc;
pRoot = (Hop_Obj_t *)pObjOld->pData;
// check the case of a constant
if ( Hop_ObjIsConst1( Hop_Regular(pRoot) ) )
{
pObjOld->pCopy = (Abc_Obj_t *)Aig_NotCond( Aig_ManConst1(pMan), Hop_IsComplement(pRoot) );
pObjOld->pNext = pObjOld->pCopy;
return;
}
// assign the fanin nodes
Abc_ObjForEachFanin( pObjOld, pFanin, i )
Hop_ManPi(pHopMan, i)->pData = pFanin->pCopy;
// construct the AIG
Abc_MfsConvertHopToAig_rec( Hop_Regular(pRoot), pMan );
pObjOld->pCopy = (Abc_Obj_t *)Aig_NotCond( (Aig_Obj_t *)Hop_Regular(pRoot)->pData, Hop_IsComplement(pRoot) );
Hop_ConeUnmark_rec( Hop_Regular(pRoot) );
// assign the fanin nodes
Abc_ObjForEachFanin( pObjOld, pFanin, i )
Hop_ManPi(pHopMan, i)->pData = pFanin->pNext;
// construct the AIG
Abc_MfsConvertHopToAig_rec( Hop_Regular(pRoot), pMan );
pObjOld->pNext = (Abc_Obj_t *)Aig_NotCond( (Aig_Obj_t *)Hop_Regular(pRoot)->pData, Hop_IsComplement(pRoot) );
Hop_ConeUnmark_rec( Hop_Regular(pRoot) );
}
/**Function*************************************************************
Synopsis [Determine starting cut-points.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Int_t * Llb_ManMarkPivotNodes( Aig_Man_t * p, int fUseInternal )
{
Vec_Int_t * vVar2Obj;
Aig_Obj_t * pObj;
int i;
// mark inputs/outputs
Aig_ManForEachPi( p, pObj, i )
pObj->fMarkA = 1;
Saig_ManForEachLi( p, pObj, i )
pObj->fMarkA = 1;
// mark internal pivot nodes
if ( fUseInternal )
Llb_ManMarkInternalPivots( p );
// assign variable numbers
Aig_ManConst1(p)->fMarkA = 0;
vVar2Obj = Vec_IntAlloc( 100 );
Aig_ManForEachPi( p, pObj, i )
Vec_IntPush( vVar2Obj, Aig_ObjId(pObj) );
Aig_ManForEachNode( p, pObj, i )
if ( pObj->fMarkA )
Vec_IntPush( vVar2Obj, Aig_ObjId(pObj) );
Saig_ManForEachLi( p, pObj, i )
Vec_IntPush( vVar2Obj, Aig_ObjId(pObj) );
return vVar2Obj;
}
/**Function*************************************************************
Synopsis [Duplicates AIG in the DFS order.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Gia_Man_t * Gia_ManFromAig( Aig_Man_t * p )
{
Gia_Man_t * pNew;
Aig_Obj_t * pObj;
int i;
// create the new manager
pNew = Gia_ManStart( Aig_ManObjNum(p) );
pNew->pName = Gia_UtilStrsav( p->pName );
pNew->nConstrs = p->nConstrs;
// create room to store equivalences
if ( p->pEquivs )
pNew->pNexts = ABC_CALLOC( int, Aig_ManObjNum(p) );
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->iData = 1;
Aig_ManForEachPi( p, pObj, i )
pObj->iData = Gia_ManAppendCi( pNew );
// add logic for the POs
Aig_ManForEachPo( p, pObj, i )
Gia_ManFromAig_rec( pNew, p, Aig_ObjFanin0(pObj) );
Aig_ManForEachPo( p, pObj, i )
Gia_ManAppendCo( pNew, Gia_ObjChild0Copy(pObj) );
Gia_ManSetRegNum( pNew, Aig_ManRegNum(p) );
if ( pNew->pNexts )
Gia_ManDeriveReprs( pNew );
return pNew;
}
/**Function*************************************************************
Synopsis [Handles choices as additional combinational outputs.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Gia_Man_t * Gia_ManFromAigSwitch( Aig_Man_t * p )
{
Gia_Man_t * pNew;
Aig_Obj_t * pObj;
int i;
// create the new manager
pNew = Gia_ManStart( Aig_ManObjNum(p) );
pNew->pName = Gia_UtilStrsav( p->pName );
pNew->nConstrs = p->nConstrs;
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->iData = 1;
Aig_ManForEachPi( p, pObj, i )
pObj->iData = Gia_ManAppendCi( pNew );
// add POs corresponding to the nodes with choices
Aig_ManForEachNode( p, pObj, i )
if ( Aig_ObjRefs(pObj) == 0 )
{
Gia_ManFromAig_rec( pNew, p, pObj );
Gia_ManAppendCo( pNew, pObj->iData );
}
// add logic for the POs
Aig_ManForEachPo( p, pObj, i )
Gia_ManFromAig_rec( pNew, p, Aig_ObjFanin0(pObj) );
Aig_ManForEachPo( p, pObj, i )
pObj->iData = Gia_ManAppendCo( pNew, Gia_ObjChild0Copy(pObj) );
Gia_ManSetRegNum( pNew, Aig_ManRegNum(p) );
return pNew;
}
/**Function*************************************************************
Synopsis [Performs ternary simulation of one frame.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
unsigned * Saig_ManBmcTerSimOne( Aig_Man_t * p, unsigned * pPrev )
{
Aig_Obj_t * pObj, * pObjLi;
unsigned * pInfo;
int i, Val0, Val1;
pInfo = ABC_CALLOC( unsigned, Aig_BitWordNum(2 * Aig_ManObjNumMax(p)) );
Saig_ManBmcSimInfoSet( pInfo, Aig_ManConst1(p), SAIG_TER_ONE );
Saig_ManForEachPi( p, pObj, i )
Saig_ManBmcSimInfoSet( pInfo, pObj, SAIG_TER_UND );
if ( pPrev == NULL )
{
Saig_ManForEachLo( p, pObj, i )
Saig_ManBmcSimInfoSet( pInfo, pObj, SAIG_TER_ZER );
}
else
{
Saig_ManForEachLiLo( p, pObjLi, pObj, i )
Saig_ManBmcSimInfoSet( pInfo, pObj, Saig_ManBmcSimInfoGet(pPrev, pObjLi) );
}
Aig_ManForEachNode( p, pObj, i )
{
Val0 = Saig_ManBmcSimInfoGet( pInfo, Aig_ObjFanin0(pObj) );
Val1 = Saig_ManBmcSimInfoGet( pInfo, Aig_ObjFanin1(pObj) );
if ( Aig_ObjFaninC0(pObj) )
Val0 = Saig_ManBmcSimInfoNot( Val0 );
if ( Aig_ObjFaninC1(pObj) )
Val1 = Saig_ManBmcSimInfoNot( Val1 );
Saig_ManBmcSimInfoSet( pInfo, pObj, Saig_ManBmcSimInfoAnd(Val0, Val1) );
}
/**Function*************************************************************
Synopsis [Duplicates AIG while mapping PIs into the given array.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Aig_ManAppend( Aig_Man_t * pBase, Aig_Man_t * pNew )
{
Aig_Obj_t * pObj;
int i;
assert( Aig_ManCoNum(pNew) == 1 );
assert( Aig_ManCiNum(pNew) == Aig_ManCiNum(pBase) );
// create the PIs
Aig_ManCleanData( pNew );
Aig_ManConst1(pNew)->pData = Aig_ManConst1(pBase);
Aig_ManForEachCi( pNew, pObj, i )
pObj->pData = Aig_IthVar(pBase, i);
// duplicate internal nodes
Aig_ManForEachNode( pNew, pObj, i )
pObj->pData = Aig_And( pBase, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
// add one PO to base
pObj = Aig_ManCo( pNew, 0 );
Aig_ObjCreateCo( pBase, Aig_ObjChild0Copy(pObj) );
}
/**Function*************************************************************
Synopsis [Creates AND function with nVars inputs.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Obj_t * Aig_CreateAnd( Aig_Man_t * p, int nVars )
{
Aig_Obj_t * pFunc;
int i;
pFunc = Aig_ManConst1( p );
for ( i = 0; i < nVars; i++ )
pFunc = Aig_And( p, pFunc, Aig_IthVar(p, i) );
return pFunc;
}
Aig_Man_t * Saig_ManCreateIndMiter2( Aig_Man_t * pAig, Vec_Vec_t * vCands )
{
int nFrames = 3;
Vec_Ptr_t * vNodes;
Aig_Man_t * pFrames;
Aig_Obj_t * pObj, * pObjLi, * pObjLo, * pObjNew;
Aig_Obj_t ** pObjMap;
int i, f, k;
// create mapping for the frames nodes
pObjMap = ABC_CALLOC( Aig_Obj_t *, nFrames * Aig_ManObjNumMax(pAig) );
// start the fraig package
pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) * nFrames );
pFrames->pName = Abc_UtilStrsav( pAig->pName );
pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
// map constant nodes
for ( f = 0; f < nFrames; f++ )
Aig_ObjSetFrames( pObjMap, nFrames, Aig_ManConst1(pAig), f, Aig_ManConst1(pFrames) );
// create PI nodes for the frames
for ( f = 0; f < nFrames; f++ )
Aig_ManForEachPiSeq( pAig, pObj, i )
Aig_ObjSetFrames( pObjMap, nFrames, pObj, f, Aig_ObjCreateCi(pFrames) );
// set initial state for the latches
Aig_ManForEachLoSeq( pAig, pObj, i )
Aig_ObjSetFrames( pObjMap, nFrames, pObj, 0, Aig_ObjCreateCi(pFrames) );
// add timeframes
for ( f = 0; f < nFrames; f++ )
{
// add internal nodes of this frame
Aig_ManForEachNode( pAig, pObj, i )
{
pObjNew = Aig_And( pFrames, Aig_ObjChild0Frames(pObjMap,nFrames,pObj,f), Aig_ObjChild1Frames(pObjMap,nFrames,pObj,f) );
Aig_ObjSetFrames( pObjMap, nFrames, pObj, f, pObjNew );
}
// set the latch inputs and copy them into the latch outputs of the next frame
Aig_ManForEachLiLoSeq( pAig, pObjLi, pObjLo, i )
{
pObjNew = Aig_ObjChild0Frames(pObjMap,nFrames,pObjLi,f);
if ( f < nFrames - 1 )
Aig_ObjSetFrames( pObjMap, nFrames, pObjLo, f+1, pObjNew );
}
/**Function*************************************************************
Synopsis [Initializes registers to the ternary state.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Saig_SynchSetConstant1( Aig_Man_t * pAig, Vec_Ptr_t * vSimInfo, int nWords )
{
Aig_Obj_t * pObj;
unsigned * pSim;
int w;
pObj = Aig_ManConst1( pAig );
pSim = (unsigned *)Vec_PtrEntry( vSimInfo, pObj->Id );
for ( w = 0; w < nWords; w++ )
pSim[w] = 0x55555555;
}
Kit_GraphForEachNode( pGraph, pNode, i )
{
// get the children of this node
pNode0 = Kit_GraphNode( pGraph, pNode->eEdge0.Node );
pNode1 = Kit_GraphNode( pGraph, pNode->eEdge1.Node );
// get the AIG nodes corresponding to the children
pAnd0 = pNode0->pFunc;
pAnd1 = pNode1->pFunc;
if ( pAnd0 && pAnd1 )
{
// if they are both present, find the resulting node
pAnd0 = Aig_NotCond( pAnd0, pNode->eEdge0.fCompl );
pAnd1 = Aig_NotCond( pAnd1, pNode->eEdge1.fCompl );
pAnd = Aig_TableLookupTwo( pAig, pAnd0, pAnd1 );
// return -1 if the node is the same as the original root
if ( Aig_Regular(pAnd) == pRoot )
return -1;
}
else
pAnd = NULL;
// count the number of added nodes
if ( pAnd == NULL || Aig_ObjIsTravIdCurrent(pAig, Aig_Regular(pAnd)) )
{
if ( ++Counter > NodeMax )
return -1;
}
// count the number of new levels
LevelNew = 1 + AIG_MAX( pNode0->Level, pNode1->Level );
if ( pAnd )
{
if ( Aig_Regular(pAnd) == Aig_ManConst1(pAig) )
LevelNew = 0;
else if ( Aig_Regular(pAnd) == Aig_Regular(pAnd0) )
LevelNew = (int)Aig_Regular(pAnd0)->Level;
else if ( Aig_Regular(pAnd) == Aig_Regular(pAnd1) )
LevelNew = (int)Aig_Regular(pAnd1)->Level;
LevelOld = (int)Aig_Regular(pAnd)->Level;
// assert( LevelNew == LevelOld );
}
if ( LevelNew > LevelMax )
return -1;
pNode->pFunc = pAnd;
pNode->Level = LevelNew;
/*
printf( "Checking " );
Ref_ObjPrint( pAnd0 );
printf( " and " );
Ref_ObjPrint( pAnd1 );
printf( " Result " );
Ref_ObjPrint( pNode->pFunc );
printf( "\n" );
*/
}
/**Function*************************************************************
Synopsis [Returns 1 if the cone of the node overlaps with the vector.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Obj_t * Aig_ManDeriveNewCone( Aig_Man_t * p, Vec_Ptr_t * vImplics, Aig_Obj_t * pNode )
{
Aig_Obj_t * pTemp;
int i;
assert( !Aig_IsComplement(pNode) );
assert( !Aig_ObjIsConst1(pNode) );
Aig_ManIncrementTravId( p );
Vec_PtrForEachEntry( Aig_Obj_t *, vImplics, pTemp, i )
{
Aig_ObjSetTravIdCurrent( p, Aig_Regular(pTemp) );
Aig_Regular(pTemp)->pData = Aig_NotCond( Aig_ManConst1(p), Aig_IsComplement(pTemp) );
}
/**Function*************************************************************
Synopsis [Determine starting cut-points.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Llb_ManLabelLiCones( Aig_Man_t * p )
{
Aig_Obj_t * pObj;
int i;
// mark const and PIs
Aig_ManConst1(p)->fMarkB = 1;
Aig_ManForEachPi( p, pObj, i )
pObj->fMarkB = 1;
// mark cones
Saig_ManForEachLi( p, pObj, i )
Llb_ManLabelLiCones_rec( p, Aig_ObjFanin0(pObj) );
}
/**Function*************************************************************
Synopsis [Returns the array of constraint candidates.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Llb_ManComputeIndCase( Aig_Man_t * p, DdManager * dd, Vec_Int_t * vNodes )
{
Vec_Ptr_t * vBdds;
Aig_Obj_t * pObj;
DdNode * bFunc;
int i, Entry;
vBdds = Vec_PtrStart( Aig_ManObjNumMax(p) );
bFunc = Cudd_ReadOne(dd); Cudd_Ref( bFunc );
Vec_PtrWriteEntry( vBdds, Aig_ObjId(Aig_ManConst1(p)), bFunc );
Saig_ManForEachPi( p, pObj, i )
{
bFunc = Cudd_bddIthVar( dd, Aig_ManPiNum(p) + i ); Cudd_Ref( bFunc );
Vec_PtrWriteEntry( vBdds, Aig_ObjId(pObj), bFunc );
}
/**Function*************************************************************
Synopsis [Duplicate the AIG w/o POs.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Inter_ManStartDuplicated( Aig_Man_t * p )
{
Aig_Man_t * pNew;
Aig_Obj_t * pObj;
int i;
assert( Aig_ManRegNum(p) > 0 );
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
pNew->pName = Abc_UtilStrsav( p->pName );
pNew->pSpec = Abc_UtilStrsav( p->pSpec );
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
Aig_ManForEachCi( p, pObj, i )
pObj->pData = Aig_ObjCreateCi( pNew );
// set registers
pNew->nTruePis = p->nTruePis;
pNew->nTruePos = Saig_ManConstrNum(p);
pNew->nRegs = p->nRegs;
// duplicate internal nodes
Aig_ManForEachNode( p, pObj, i )
pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
// create constraint outputs
Saig_ManForEachPo( p, pObj, i )
{
if ( i < Saig_ManPoNum(p)-Saig_ManConstrNum(p) )
continue;
Aig_ObjCreateCo( pNew, Aig_Not( Aig_ObjChild0Copy(pObj) ) );
}
// create register inputs with MUXes
Saig_ManForEachLi( p, pObj, i )
Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
Aig_ManCleanup( pNew );
return pNew;
}
/**Function*************************************************************
Synopsis [Transforms sequential AIG into dual-rail miter.]
Description [Transforms sequential AIG into a miter encoding ternary
problem formulated as follows "none of the POs has a ternary value".
Interprets the first nDualPis as having ternary value. Sets flops
to have ternary intial value when fDualFfs is set to 1.]
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Saig_ManDupDual( Aig_Man_t * pAig, Vec_Int_t * vDcFlops, int nDualPis, int fDualFfs, int fMiterFfs, int fComplPo, int fCheckZero, int fCheckOne )
{
Vec_Ptr_t * vCopies;
Aig_Man_t * pAigNew;
Aig_Obj_t * pObj, * pTemp0, * pTemp1, * pTemp2, * pTemp3, * pCare, * pMiter;
int i;
assert( Saig_ManPoNum(pAig) > 0 );
assert( nDualPis >= 0 && nDualPis <= Saig_ManPiNum(pAig) );
assert( vDcFlops == NULL || Vec_IntSize(vDcFlops) == Aig_ManRegNum(pAig) );
vCopies = Vec_PtrStart( 2*Aig_ManObjNum(pAig) );
// start the new manager
pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
pAigNew->pName = Abc_UtilStrsav( pAig->pName );
// map the constant node
Saig_ObjSetDual( vCopies, 0, 0, Aig_ManConst0(pAigNew) );
Saig_ObjSetDual( vCopies, 0, 1, Aig_ManConst1(pAigNew) );
// create variables for PIs
Aig_ManForEachCi( pAig, pObj, i )
{
if ( i < nDualPis )
{
pTemp0 = Aig_ObjCreateCi( pAigNew );
pTemp1 = Aig_ObjCreateCi( pAigNew );
}
else if ( i < Saig_ManPiNum(pAig) )
{
pTemp1 = Aig_ObjCreateCi( pAigNew );
pTemp0 = Aig_Not( pTemp1 );
}
else
{
pTemp0 = Aig_ObjCreateCi( pAigNew );
pTemp1 = Aig_ObjCreateCi( pAigNew );
if ( vDcFlops )
pTemp0 = Aig_NotCond( pTemp0, !Vec_IntEntry(vDcFlops, i-Saig_ManPiNum(pAig)) );
else
pTemp0 = Aig_NotCond( pTemp0, !fDualFfs );
}
Saig_ObjSetDual( vCopies, Aig_ObjId(pObj), 0, Aig_And(pAigNew, pTemp0, Aig_Not(pTemp1)) );
Saig_ObjSetDual( vCopies, Aig_ObjId(pObj), 1, Aig_And(pAigNew, pTemp1, Aig_Not(pTemp0)) );
}
// create internal nodes
Aig_ManForEachNode( pAig, pObj, i )
{
Saig_ObjDualFanin( pAigNew, vCopies, pObj, 0, &pTemp0, &pTemp1 );
Saig_ObjDualFanin( pAigNew, vCopies, pObj, 1, &pTemp2, &pTemp3 );
Saig_ObjSetDual( vCopies, Aig_ObjId(pObj), 0, Aig_Or (pAigNew, pTemp0, pTemp2) );
Saig_ObjSetDual( vCopies, Aig_ObjId(pObj), 1, Aig_And(pAigNew, pTemp1, pTemp3) );
}