/**
Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
@param[in] ApHltLoopCode The address of the safe hlt-loop function.
@param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.
@param[in] NumberToFinishAddress Address of Semaphore of APs finish count.
**/
VOID
TransferApToSafeState (
IN UINTN ApHltLoopCode,
IN UINTN TopOfStack,
IN UINTN NumberToFinishAddress
)
{
AsmDisablePaging64 (
GetProtectedModeCS (),
(UINT32)ApHltLoopCode,
(UINT32)NumberToFinishAddress,
0,
(UINT32)TopOfStack
);
//
// It should never reach here
//
ASSERT (FALSE);
}
/**
The X64 entrypoint is used to process capsule in long mode then
return to 32-bit protected mode.
@param EntrypointContext Pointer to the context of long mode.
@param ReturnContext Pointer to the context of 32-bit protected mode.
@retval This function should never return actually.
**/
EFI_STATUS
EFIAPI
_ModuleEntryPoint (
SWITCH_32_TO_64_CONTEXT *EntrypointContext,
SWITCH_64_TO_32_CONTEXT *ReturnContext
)
{
EFI_STATUS Status;
IA32_DESCRIPTOR Ia32Idtr;
IA32_DESCRIPTOR X64Idtr;
IA32_IDT_GATE_DESCRIPTOR IdtEntryTable[EXCEPTION_VECTOR_NUMBER];
//
// Save the IA32 IDT Descriptor
//
AsmReadIdtr ((IA32_DESCRIPTOR *) &Ia32Idtr);
//
// Setup X64 IDT table
//
ZeroMem (IdtEntryTable, sizeof (IA32_IDT_GATE_DESCRIPTOR) * EXCEPTION_VECTOR_NUMBER);
X64Idtr.Base = (UINTN) IdtEntryTable;
X64Idtr.Limit = (UINT16) (sizeof (IA32_IDT_GATE_DESCRIPTOR) * EXCEPTION_VECTOR_NUMBER - 1);
AsmWriteIdtr ((IA32_DESCRIPTOR *) &X64Idtr);
//
// Setup the default CPU exception handlers
//
Status = InitializeCpuExceptionHandlers (NULL);
ASSERT_EFI_ERROR (Status);
//
// Initialize Debug Agent to support source level debug
//
InitializeDebugAgent (DEBUG_AGENT_INIT_THUNK_PEI_IA32TOX64, (VOID *) &Ia32Idtr, NULL);
//
// Call CapsuleDataCoalesce to process capsule.
//
Status = CapsuleDataCoalesce (
NULL,
(EFI_PHYSICAL_ADDRESS *) (UINTN) EntrypointContext->BlockListAddr,
(VOID **) (UINTN) EntrypointContext->MemoryBase64Ptr,
(UINTN *) (UINTN) EntrypointContext->MemorySize64Ptr
);
ReturnContext->ReturnStatus = Status;
//
// Disable interrupt of Debug timer, since the new IDT table cannot work in long mode
//
SaveAndSetDebugTimerInterrupt (FALSE);
//
// Restore IA32 IDT table
//
AsmWriteIdtr ((IA32_DESCRIPTOR *) &Ia32Idtr);
//
// Finish to coalesce capsule, and return to 32-bit mode.
//
AsmDisablePaging64 (
ReturnContext->ReturnCs,
(UINT32) ReturnContext->ReturnEntryPoint,
(UINT32) (UINTN) EntrypointContext,
(UINT32) (UINTN) ReturnContext,
(UINT32) (EntrypointContext->StackBufferBase + EntrypointContext->StackBufferLength)
);
//
// Should never be here.
//
ASSERT (FALSE);
return EFI_SUCCESS;
}
/**
Entry function of Boot script exector. This function will be executed in
S3 boot path.
This function should not return, because it is invoked by switch stack.
@param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT
@param PeiS3ResumeState a pointer to a structure of PEI_S3_RESUME_STATE
@retval EFI_INVALID_PARAMETER - OS waking vector not found
@retval EFI_UNSUPPORTED - something wrong when we resume to OS
**/
EFI_STATUS
EFIAPI
S3BootScriptExecutorEntryFunction (
IN ACPI_S3_CONTEXT *AcpiS3Context,
IN PEI_S3_RESUME_STATE *PeiS3ResumeState
)
{
EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;
EFI_STATUS Status;
UINTN TempStackTop;
UINTN TempStack[0x10];
UINTN AsmTransferControl16Address;
IA32_DESCRIPTOR IdtDescriptor;
//
// Disable interrupt of Debug timer, since new IDT table cannot handle it.
//
SaveAndSetDebugTimerInterrupt (FALSE);
AsmReadIdtr (&IdtDescriptor);
//
// Restore IDT for debug
//
SetIdtEntry (AcpiS3Context);
//
// Initialize Debug Agent to support source level debug in S3 path, it will disable interrupt and Debug Timer.
//
InitializeDebugAgent (DEBUG_AGENT_INIT_S3, (VOID *)&IdtDescriptor, NULL);
//
// Because not install BootScriptExecute PPI(used just in this module), So just pass NULL
// for that parameter.
//
Status = S3BootScriptExecute ();
//
// If invalid script table or opcode in S3 boot script table.
//
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
CpuDeadLoop ();
return Status;
}
AsmWbinvd ();
//
// Get ACPI Table Address
//
Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));
//
// We need turn back to S3Resume - install boot script done ppi and report status code on S3resume.
//
if (PeiS3ResumeState != 0) {
//
// Need report status back to S3ResumePeim.
// If boot script execution is failed, S3ResumePeim wil report the error status code.
//
PeiS3ResumeState->ReturnStatus = (UINT64)(UINTN)Status;
if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
//
// X64 S3 Resume
//
DEBUG ((EFI_D_ERROR, "Call AsmDisablePaging64() to return to S3 Resume in PEI Phase\n"));
PeiS3ResumeState->AsmTransferControl = (EFI_PHYSICAL_ADDRESS)(UINTN)AsmTransferControl32;
if ((Facs != NULL) &&
(Facs->Signature == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) &&
(Facs->FirmwareWakingVector != 0) ) {
//
// more step needed - because relative address is handled differently between X64 and IA32.
//
AsmTransferControl16Address = (UINTN)AsmTransferControl16;
AsmFixAddress16 = (UINT32)AsmTransferControl16Address;
AsmJmpAddr32 = (UINT32)((Facs->FirmwareWakingVector & 0xF) | ((Facs->FirmwareWakingVector & 0xFFFF0) << 12));
}
AsmDisablePaging64 (
PeiS3ResumeState->ReturnCs,
(UINT32)PeiS3ResumeState->ReturnEntryPoint,
(UINT32)(UINTN)AcpiS3Context,
(UINT32)(UINTN)PeiS3ResumeState,
(UINT32)PeiS3ResumeState->ReturnStackPointer
);
} else {
//
// IA32 S3 Resume
//
DEBUG ((EFI_D_ERROR, "Call SwitchStack() to return to S3 Resume in PEI Phase\n"));
PeiS3ResumeState->AsmTransferControl = (EFI_PHYSICAL_ADDRESS)(UINTN)AsmTransferControl;
SwitchStack (
(SWITCH_STACK_ENTRY_POINT)(UINTN)PeiS3ResumeState->ReturnEntryPoint,
(VOID *)(UINTN)AcpiS3Context,
(VOID *)(UINTN)PeiS3ResumeState,
(VOID *)(UINTN)PeiS3ResumeState->ReturnStackPointer
);
}
//
// Never run to here
//
CpuDeadLoop();
return EFI_UNSUPPORTED;
}
//
// S3ResumePeim does not provide a way to jump back to itself, so resume to OS here directly
//
if (Facs->XFirmwareWakingVector != 0) {
//
// Switch to native waking vector
//
TempStackTop = (UINTN)&TempStack + sizeof(TempStack);
if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&
((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&
((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {
//
// X64 long mode waking vector
//
DEBUG (( EFI_D_ERROR, "Transfer to 64bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));
if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
SwitchStack (
(SWITCH_STACK_ENTRY_POINT)(UINTN)Facs->XFirmwareWakingVector,
NULL,
NULL,
(VOID *)(UINTN)TempStackTop
);
} else {
// Unsupported for 32bit DXE, 64bit OS vector
DEBUG (( EFI_D_ERROR, "Unsupported for 32bit DXE transfer to 64bit OS waking vector!\r\n"));
ASSERT (FALSE);
}
} else {
//
// IA32 protected mode waking vector (Page disabled)
//
DEBUG (( EFI_D_ERROR, "Transfer to 32bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));
if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
AsmDisablePaging64 (
0x10,
(UINT32)Facs->XFirmwareWakingVector,
0,
0,
(UINT32)TempStackTop
);
} else {
SwitchStack (
(SWITCH_STACK_ENTRY_POINT)(UINTN)Facs->XFirmwareWakingVector,
NULL,
NULL,
(VOID *)(UINTN)TempStackTop
);
}
}
} else {
//
// 16bit Realmode waking vector
//
DEBUG (( EFI_D_ERROR, "Transfer to 16bit OS waking vector - %x\r\n", (UINTN)Facs->FirmwareWakingVector));
AsmTransferControl (Facs->FirmwareWakingVector, 0x0);
}
//
// Never run to here
//
CpuDeadLoop();
return EFI_UNSUPPORTED;
}
/**
Perform SMM initialization for all processors in the S3 boot path.
For a native platform, MP initialization in the S3 boot path is also performed in this function.
**/
VOID
EFIAPI
SmmRestoreCpu (
VOID
)
{
SMM_S3_RESUME_STATE *SmmS3ResumeState;
IA32_DESCRIPTOR Ia32Idtr;
IA32_DESCRIPTOR X64Idtr;
IA32_IDT_GATE_DESCRIPTOR IdtEntryTable[EXCEPTION_VECTOR_NUMBER];
EFI_STATUS Status;
DEBUG ((EFI_D_INFO, "SmmRestoreCpu()\n"));
mSmmS3Flag = TRUE;
InitializeSpinLock (mMemoryMappedLock);
//
// See if there is enough context to resume PEI Phase
//
if (mSmmS3ResumeState == NULL) {
DEBUG ((EFI_D_ERROR, "No context to return to PEI Phase\n"));
CpuDeadLoop ();
}
SmmS3ResumeState = mSmmS3ResumeState;
ASSERT (SmmS3ResumeState != NULL);
if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_64) {
//
// Save the IA32 IDT Descriptor
//
AsmReadIdtr ((IA32_DESCRIPTOR *) &Ia32Idtr);
//
// Setup X64 IDT table
//
ZeroMem (IdtEntryTable, sizeof (IA32_IDT_GATE_DESCRIPTOR) * 32);
X64Idtr.Base = (UINTN) IdtEntryTable;
X64Idtr.Limit = (UINT16) (sizeof (IA32_IDT_GATE_DESCRIPTOR) * 32 - 1);
AsmWriteIdtr ((IA32_DESCRIPTOR *) &X64Idtr);
//
// Setup the default exception handler
//
Status = InitializeCpuExceptionHandlers (NULL);
ASSERT_EFI_ERROR (Status);
//
// Initialize Debug Agent to support source level debug
//
InitializeDebugAgent (DEBUG_AGENT_INIT_THUNK_PEI_IA32TOX64, (VOID *)&Ia32Idtr, NULL);
}
//
// Skip initialization if mAcpiCpuData is not valid
//
if (mAcpiCpuData.NumberOfCpus > 0) {
//
// First time microcode load and restore MTRRs
//
InitializeCpuBeforeRebase ();
}
//
// Restore SMBASE for BSP and all APs
//
SmmRelocateBases ();
//
// Skip initialization if mAcpiCpuData is not valid
//
if (mAcpiCpuData.NumberOfCpus > 0) {
//
// Restore MSRs for BSP and all APs
//
InitializeCpuAfterRebase ();
}
//
// Set a flag to restore SMM configuration in S3 path.
//
mRestoreSmmConfigurationInS3 = TRUE;
DEBUG (( EFI_D_INFO, "SMM S3 Return CS = %x\n", SmmS3ResumeState->ReturnCs));
DEBUG (( EFI_D_INFO, "SMM S3 Return Entry Point = %x\n", SmmS3ResumeState->ReturnEntryPoint));
DEBUG (( EFI_D_INFO, "SMM S3 Return Context1 = %x\n", SmmS3ResumeState->ReturnContext1));
DEBUG (( EFI_D_INFO, "SMM S3 Return Context2 = %x\n", SmmS3ResumeState->ReturnContext2));
DEBUG (( EFI_D_INFO, "SMM S3 Return Stack Pointer = %x\n", SmmS3ResumeState->ReturnStackPointer));
//
// If SMM is in 32-bit mode, then use SwitchStack() to resume PEI Phase
//
if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_32) {
DEBUG ((EFI_D_INFO, "Call SwitchStack() to return to S3 Resume in PEI Phase\n"));
SwitchStack (
(SWITCH_STACK_ENTRY_POINT)(UINTN)SmmS3ResumeState->ReturnEntryPoint,
(VOID *)(UINTN)SmmS3ResumeState->ReturnContext1,
(VOID *)(UINTN)SmmS3ResumeState->ReturnContext2,
(VOID *)(UINTN)SmmS3ResumeState->ReturnStackPointer
);
}
//
// If SMM is in 64-bit mode, then use AsmDisablePaging64() to resume PEI Phase
//
if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_64) {
DEBUG ((EFI_D_INFO, "Call AsmDisablePaging64() to return to S3 Resume in PEI Phase\n"));
//
// Disable interrupt of Debug timer, since new IDT table is for IA32 and will not work in long mode.
//
SaveAndSetDebugTimerInterrupt (FALSE);
//
// Restore IA32 IDT table
//
AsmWriteIdtr ((IA32_DESCRIPTOR *) &Ia32Idtr);
AsmDisablePaging64 (
SmmS3ResumeState->ReturnCs,
(UINT32)SmmS3ResumeState->ReturnEntryPoint,
(UINT32)SmmS3ResumeState->ReturnContext1,
(UINT32)SmmS3ResumeState->ReturnContext2,
(UINT32)SmmS3ResumeState->ReturnStackPointer
);
}
//
// Can not resume PEI Phase
//
DEBUG ((EFI_D_ERROR, "No context to return to PEI Phase\n"));
CpuDeadLoop ();
}
