/* prepare GPIOs for pair mode + set initial modes */
void cic_pair(int init_vmode, int init_d4) {
cic_videomode(init_vmode);
cic_d4(init_d4);
BITBAND(SNES_CIC_D0_REG->FIODIR, SNES_CIC_D0_BIT) = 1;
BITBAND(SNES_CIC_D1_REG->FIODIR, SNES_CIC_D1_BIT) = 1;
}
void cic_videomode(int value) {
if(value) {
BITBAND(SNES_CIC_D0_REG->FIOSET, SNES_CIC_D0_BIT) = 1;
} else {
BITBAND(SNES_CIC_D0_REG->FIOCLR, SNES_CIC_D0_BIT) = 1;
}
}
void cic_d4(int value) {
if(value) {
BITBAND(SNES_CIC_D1_REG->FIOSET, SNES_CIC_D1_BIT) = 1;
} else {
BITBAND(SNES_CIC_D1_REG->FIOCLR, SNES_CIC_D1_BIT) = 1;
}
}
/* wait_data - see wait_atn */
static __attribute__((unused)) void wait_data(unsigned int state, unsigned int atnabort) {
/* set up capture */
BITBAND(IEC_TIMER_DATA->CCR, 3*IEC_CAPTURE_DATA + IEC_IN_COND_INV(!state)) = 1;
/* clear interrupt flag */
IEC_TIMER_DATA->IR = BV(4 + IEC_CAPTURE_DATA);
/* wait until interrupt flag is set */
while (!BITBAND(IEC_TIMER_DATA->IR, 4+IEC_CAPTURE_DATA))
if (atnabort && !IEC_ATN)
break;
if (atnabort && !IEC_ATN) {
/* read current time */
reference_time = IEC_TIMER_DATA->TC;
} else {
/* read event time */
if (IEC_CAPTURE_DATA == 0) {
reference_time = IEC_TIMER_DATA->CR0;
} else {
reference_time = IEC_TIMER_DATA->CR1;
}
}
/* reset capture mode */
IEC_TIMER_CLOCK->CCR = 0b100100;
}
void cic_init(int allow_pairmode) {
BITBAND(SNES_CIC_PAIR_REG->FIODIR, SNES_CIC_PAIR_BIT) = 1;
if(allow_pairmode) {
BITBAND(SNES_CIC_PAIR_REG->FIOCLR, SNES_CIC_PAIR_BIT) = 1;
} else {
BITBAND(SNES_CIC_PAIR_REG->FIOSET, SNES_CIC_PAIR_BIT) = 1;
}
BITBAND(SNES_CIC_D0_REG->FIODIR, SNES_CIC_D0_BIT) = 0;
BITBAND(SNES_CIC_D1_REG->FIODIR, SNES_CIC_D1_BIT) = 0;
}
void timer_init(void) {
/* turn on power to RIT */
BITBAND(LPC_SC->PCONP, PCRIT) = 1;
/* clear RIT mask */
LPC_RIT->RIMASK = 0; /*xffffffff;*/
/* PCLK = CCLK */
BITBAND(LPC_SC->PCLKSEL1, 26) = 1;
BITBAND(LPC_SC->PCLKSEL1, PCLK_TIMER3) = 1;
}
void fpga_init() {
/* mainly GPIO directions */
BITBAND(CCLKREG->FIODIR, CCLKBIT) = 1; /* CCLK */
BITBAND(DONEREG->FIODIR, DONEBIT) = 0; /* DONE */
BITBAND(PROGBREG->FIODIR, PROGBBIT) = 1; /* PROG_B */
BITBAND(DINREG->FIODIR, DINBIT) = 1; /* DIN */
BITBAND(INITBREG->FIODIR, INITBBIT) = 0; /* INIT_B */
LPC_GPIO2->FIOMASK1 = 0;
SPI_OFFLOAD=0;
fpga_set_cclk(0); /* initial clk=0 */
}
/* GPIO interrupt handler, shared with EINT3 */
void EINT3_IRQHandler(void) {
if (BITBAND(lpc_gpioint_ptr[SD_CHANGE_GPIOINT].IOIntStatF, SD_DETECT_PIN) ||
BITBAND(lpc_gpioint_ptr[SD_CHANGE_GPIOINT].IOIntStatR, SD_DETECT_PIN)) {
BITBAND(lpc_gpioint_ptr[SD_CHANGE_GPIOINT].IOIntClr, SD_DETECT_PIN) = 1;
sdcard_change_handler();
}
#ifdef PARALLEL_ENABLED
if (BITBAND(lpc_gpioint_ptr[PARALLEL_HSK_GPIOINT].IOIntStatF, PARALLEL_HSK_IN_BIT)) {
BITBAND(lpc_gpioint_ptr[PARALLEL_HSK_GPIOINT].IOIntClr, PARALLEL_HSK_IN_BIT) = 1;
parallel_handler();
}
#endif
}
/* set_srq_at - see set_clock_at (nice for debugging) */
static __attribute__((unused)) void set_srq_at(uint32_t time, unsigned int state, unsigned int wait) {
/* check if requested time is possible */
// FIXME: Wrap in debugging macro?
if (IEC_MTIMER_SRQ->TC > reference_time+time)
set_test_led(1);
/* set match time */
IEC_MTIMER_SRQ->IEC_MATCH_SRQ = reference_time + time;
/* reset match interrupt flag */
IEC_MTIMER_SRQ->IR = BV(IEC_OPIN_SRQ);
/* set match action */
if (state) {
IEC_MTIMER_SRQ->EMR = (IEC_MTIMER_SRQ->EMR & ~(3 << (4+IEC_OPIN_SRQ*2))) |
EMR_HIGH << (4+IEC_OPIN_SRQ*2);
} else {
IEC_MTIMER_SRQ->EMR = (IEC_MTIMER_SRQ->EMR & ~(3 << (4+IEC_OPIN_SRQ*2))) |
EMR_LOW << (4+IEC_OPIN_SRQ*2);
}
/* optional: wait for match */
if (wait)
while (!BITBAND(IEC_MTIMER_SRQ->IR, IEC_OPIN_SRQ)) ;
}
void uart_putc(char c) {
unsigned int tmp = (write_idx+1) & (sizeof(txbuf)-1) ;
if (read_idx == write_idx && (BITBAND(UART_REGS->LSR, 5))) {
/* buffer empty, THR empty -> send immediately */
UART_REGS->THR = (unsigned char)c;
} else {
#ifdef CONFIG_DEADLOCK_ME_HARDER
while (tmp == read_idx) ;
#endif
BITBAND(UART_REGS->IER, 1) = 0; // turn off UART interrupt
txbuf[write_idx] = c;
write_idx = tmp;
BITBAND(UART_REGS->IER, 1) = 1;
}
}
uint8_t spi_rx_byte(void) {
/* Wait until SSP is not busy */
while (BITBAND(SSP_REGS->SR, SSP_BSY)) ;
/* Clear RX fifo */
while (BITBAND(SSP_REGS->SR, SSP_RNE))
(void) SSP_REGS->DR;
/* Transmit a single dummy byte */
SSP_REGS->DR = 0xff;
/* Wait until answer has been received */
while (!BITBAND(SSP_REGS->SR, SSP_RNE)) ;
return SSP_REGS->DR;
}
void spi_tx_byte(uint8_t data) {
/* Wait until TX fifo can accept data */
while (!BITBAND(SSP_REGS->SR, SSP_TNF)) ;
/* Send byte */
SSP_REGS->DR = data;
}
void writeled(unsigned int state) {
if(led_pwmstate) {
writebright(state?15:0);
} else {
BITBAND(LPC_GPIO1->FIODIR, 23) = state;
}
led_writeledstate = state;
}
void readled(unsigned int state) {
if(led_pwmstate) {
readbright(state?15:0);
} else {
BITBAND(LPC_GPIO2->FIODIR, 5) = state;
}
led_readledstate = state;
}
void KEY_scan(void)
{
u32 i;
his[0] |= BITBAND(GPIOA->IDR, 0);
his[1] |= BITBAND(GPIOA->IDR, 8);
his[2] |= BITBAND(GPIOB->IDR, 1);
his[3] |= BITBAND(GPIOB->IDR, 2);
for (i = 0; i < 4; i++)
{
if (stu[i] &&! his[i]) KEY_Down(i);
stu[i] = his[i];
his[i] <<= 1;
}
}
void IEC_TIMER_B_HANDLER(void) {
if (IEC_TIMER_ATN == IEC_TIMER_B) {
if (BITBAND(IEC_TIMER_ATN->IR, 4 + IEC_CAPTURE_ATN)) {
IEC_TIMER_ATN->IR = 1 << (4 + IEC_CAPTURE_ATN);
iec_atn_handler();
}
}
#ifdef CONFIG_LOADER_DREAMLOAD
if (IEC_TIMER_CLOCK == IEC_TIMER_B) {
if (BITBAND(IEC_TIMER_CLOCK->IR, 4 + IEC_CAPTURE_CLOCK)) {
IEC_TIMER_CLOCK->IR = 1 << (4 + IEC_CAPTURE_CLOCK);
iec_clock_handler();
}
}
#endif
}
void fpga_pgm(uint8_t* filename) {
int MAXRETRIES = 10;
int retries = MAXRETRIES;
uint8_t data;
int i;
tick_t timeout;
do {
i=0;
timeout = getticks() + 100;
fpga_set_prog_b(0);
if(BITBAND(PROGBREG->FIOPIN, PROGBBIT)) {
printf("PROGB is stuck high!\n");
led_panic();
}
uart_putc('P');
fpga_set_prog_b(1);
while(!fpga_get_initb()){
if(getticks() > timeout) {
printf("no response from FPGA trying to initiate configuration!\n");
led_panic();
}
};
if(fpga_get_done()) {
printf("DONE is stuck high!\n");
led_panic();
}
LPC_GPIO2->FIOMASK1 = ~(BV(0));
uart_putc('p');
/* open configware file */
file_open(filename, FA_READ);
if(file_res) {
uart_putc('?');
uart_putc(0x30+file_res);
return;
}
uart_putc('C');
for (;;) {
data = rle_file_getc();
i++;
if (file_status || file_res) break; /* error or eof */
FPGA_SEND_BYTE_SERIAL(data);
}
uart_putc('c');
file_close();
printf("fpga_pgm: %d bytes programmed\n", i);
delay_ms(1);
} while (!fpga_get_done() && retries--);
if(!fpga_get_done()) {
printf("FPGA failed to configure after %d tries.\n", MAXRETRIES);
led_panic();
}
printf("FPGA configured\n");
fpga_postinit();
}
void spi_tx_block(const void *ptr, unsigned int length) {
const uint8_t *data = (const uint8_t *)ptr;
while (length--) {
/* Wait until TX fifo can accept data */
while (!BITBAND(SSP_REGS->SR, SSP_TNF)) ;
SSP_REGS->DR = *data++;
}
}
//通用定时器6中断初始化
//这里时钟选择为APB1的2倍，而APB1为36M
//arr：自动重装值。
//psc：时钟预分频数
//这里使用的是定时器6!
static void TIM6_Init(u16 arr,u16 psc){
RCC->APB2ENR|=1<<6|1<<7;//PE,PF时钟使能
GPIOF->CRL&=0XFF00FFFF;//PF4,5推挽输出;
GPIOF->CRL|=0X00330000;
GPIOE->CRL&=0XFF00FFFF;//PF4,5推挽输出;
GPIOE->CRL|=0X00330000;
TIM6_PWM_PIN[0]=(volatile unsigned long *)BITBAND(GPIOF_ODR_Addr, 4);//
TIM6_PWM_PIN[1]=(volatile unsigned long *)BITBAND(GPIOF_ODR_Addr, 5);//
TIM6_PWM_PIN[2]=(volatile unsigned long *)BITBAND(GPIOE_ODR_Addr, 4);//
TIM6_PWM_PIN[3]=(volatile unsigned long *)BITBAND(GPIOE_ODR_Addr, 5);//
RCC->APB1ENR|=1<<4; //TIM6时钟使能
TIM6->ARR=arr; //设定计数器自动重装值//刚好1ms
TIM6->PSC=psc; //预分频器7200,得到10Khz的计数时钟
TIM6->DIER|=1<<0; //允许更新中断
TIM6->CR1|=0x01; //使能定时器3
nvic_set_group(2);
nvic_set_pr(2,TIM6_IRQn,1,1);//抢占1，子优先级1，组2
}
void led_std() {
BITBAND(LPC_PINCON->PINSEL4, 9) = 0;
BITBAND(LPC_PINCON->PINSEL4, 8) = 0;
BITBAND(LPC_PINCON->PINSEL4, 11) = 0;
BITBAND(LPC_PINCON->PINSEL4, 10) = 0;
BITBAND(LPC_PINCON->PINSEL3, 15) = 0;
BITBAND(LPC_PINCON->PINSEL3, 14) = 0;
BITBAND(LPC_PWM1->PCR, 12) = 0;
BITBAND(LPC_PWM1->PCR, 13) = 0;
BITBAND(LPC_PWM1->PCR, 14) = 0;
led_pwmstate = 0;
}
/* Late initialisation, increase CPU clock */
void system_init_late(void) {
/* Set flash accelerator to 5 CPU cycle access time */
LPC_SC->FLASHCFG = (LPC_SC->FLASHCFG & 0xffff0fff) | (4 << 12);
/* Enable main oscillator, range 1-20MHz */
BITBAND(LPC_SC->SCS, 5) = 1;
/* Wait until stable */
while (!BITBAND(LPC_SC->SCS, 6)) ;
/* Use main oscillator as system clock source */
LPC_SC->CLKSRCSEL = 1;
/* Set up PLL0 multiplier and pre-divisor */
LPC_SC->PLL0CFG = ((PLL_PREDIV-1) << 16) | (PLL_MULTIPLIER-1);
LPC_SC->PLL0FEED = 0xaa;
LPC_SC->PLL0FEED = 0x55;
/* Enable PLL0 */
LPC_SC->PLL0CON = 1;
LPC_SC->PLL0FEED = 0xaa;
LPC_SC->PLL0FEED = 0x55;
/* Increase CPU clock divider */
LPC_SC->CCLKCFG = PLL_DIVISOR-1;
/* Wait until PLL locks */
while (!(LPC_SC->PLL0STAT & BV(26))) ;
/* Connect PLL0 */
LPC_SC->PLL0CON = 3;
LPC_SC->PLL0FEED = 0xaa;
LPC_SC->PLL0FEED = 0x55;
/* Enable GPIO interrupt */
NVIC_EnableIRQ(EINT3_IRQn);
// FIXME: Debugging
//LPC_GPIO0->FIODIR |= BV(11) | BV(10);
//LPC_GPIO2->FIODIR |= BV(0) | BV(1);
//set_debugstate(0);
}
/**
* wait_atn - wait until ATN has the specified level and capture time
* @state: line level to wait for (0 low, 1 high)
*
* This function waits until the ATN line has the specified level and captures
* the time when its level changed.
*/
static __attribute__((unused)) void wait_atn(unsigned int state) {
/* set up capture */
BITBAND(IEC_TIMER_ATN->CCR, 3*IEC_CAPTURE_ATN + IEC_IN_COND_INV(!state)) = 1;
/* clear interrupt flag */
IEC_TIMER_ATN->IR = BV(4 + IEC_CAPTURE_ATN);
/* wait until interrupt flag is set */
while (!BITBAND(IEC_TIMER_ATN->IR, 4+IEC_CAPTURE_ATN)) ;
/* read event time */
if (IEC_CAPTURE_ATN == 0) {
reference_time = IEC_TIMER_ATN->CR0;
} else {
reference_time = IEC_TIMER_ATN->CR1;
}
/* reset capture mode */
IEC_TIMER_ATN->CCR = 0b100100;
}
void gpio_init(gpio_t *obj, PinName name)
{
obj->name = name;
if (name == (PinName)NC) {
return;
}
unsigned int port = PINNAME_TO_PORT(name);
unsigned int pin = PINNAME_TO_PIN(name);
obj->reg_out = (uint32_t*)BITBAND(&MXC_GPIO->out_val[port], pin);
obj->reg_in = (uint32_t*)BITBAND(&MXC_GPIO->in_val[port], pin);
obj->mode = PullDefault;
/* Ensure that the GPIO clock is enabled */
MXC_CLKMAN->clk_gate_ctrl1 |= MXC_F_CLKMAN_CLK_GATE_CTRL1_GPIO_CLK_GATER;
/* Ensure that the GPIO clock is enabled */
MXC_CLKMAN->sys_clk_ctrl_6_gpio = MXC_S_CLKMAN_CLK_SCALE_DIV_1;
}
void led_pwm() {
/* Rev.C P2.4, P2.5, P1.23 */
BITBAND(LPC_PINCON->PINSEL4, 9) = 0;
BITBAND(LPC_PINCON->PINSEL4, 8) = 1;
BITBAND(LPC_PINCON->PINSEL4, 11) = 0;
BITBAND(LPC_PINCON->PINSEL4, 10) = 1;
BITBAND(LPC_PINCON->PINSEL3, 15) = 1;
BITBAND(LPC_PINCON->PINSEL3, 14) = 0;
BITBAND(LPC_PWM1->PCR, 12) = 1;
BITBAND(LPC_PWM1->PCR, 13) = 1;
BITBAND(LPC_PWM1->PCR, 14) = 1;
led_pwmstate = 1;
}
void delay_ms(unsigned int time) {
/* Prepare RIT */
LPC_RIT->RICOUNTER = 0;
LPC_RIT->RICOMPVAL = (CONFIG_CPU_FREQUENCY / 1000) * time;
LPC_RIT->RICTRL = BV(RITEN) | BV(RITINT);
/* Wait until RIT signals an interrupt */
while (!(BITBAND(LPC_RIT->RICTRL, RITINT))) ;
/* Disable RIT */
LPC_RIT->RICTRL = 0;
}
void spi_init(spi_speed_t speed) {
/* Set clock prescaler to 1:1 */
BITBAND(LPC_SC->SSP_PCLKREG, SSP_PCLKBIT) = 1;
/* configure data format - 8 bits, SPI, CPOL=0, CPHA=0, 1 clock per bit */
SSP_REGS->CR0 = (8-1);
/* set clock prescaler */
if (speed == SPI_SPEED_FAST) {
SSP_REGS->CPSR = SSP_CLK_DIVISOR_FAST;
} else {
SSP_REGS->CPSR = SSP_CLK_DIVISOR_SLOW;
}
/* Enable SSP */
SSP_REGS->CR1 = BV(1);
/* Enable DMA controller, little-endian mode */
BITBAND(LPC_SC->PCONP, 29) = 1;
LPC_GPDMA->DMACConfig = 1;
}
static void fastloader_setup(void) {
/*** set up timer A+B to count synchronized 100ns-units ***/
/* Reset timers */
BITBAND(IEC_TIMER_A->TCR, 1) = 1;
BITBAND(IEC_TIMER_B->TCR, 1) = 1;
/* Move both timers out of reset */
BITBAND(IEC_TIMER_A->TCR, 1) = 0;
BITBAND(IEC_TIMER_B->TCR, 1) = 0;
/* compensate for timer B offset */
//FIXME: Values are wrong for 10MHz timers
//LPC_TIM2->PC = 0;
//LPC_TIM3->PC = 22;
/* disable IEC interrupts */
NVIC_DisableIRQ(IEC_TIMER_A_IRQn);
NVIC_DisableIRQ(IEC_TIMER_B_IRQn);
/* Clear all capture/match functions except interrupts */
timer_a_ccr = IEC_TIMER_A->CCR;
timer_b_ccr = IEC_TIMER_B->CCR;
IEC_TIMER_A->CCR = 0b100100;
IEC_TIMER_B->CCR = 0b100100;
IEC_TIMER_A->MCR = 0b001001001001;
IEC_TIMER_B->MCR = 0b001001001001;
/* Enable both timers */
BITBAND(IEC_TIMER_A->TCR, 0) = 1;
BITBAND(IEC_TIMER_B->TCR, 0) = 1;
}
enum cicstates get_cic_state() {
uint32_t count;
uint32_t togglecount = 0;
uint8_t state, state_old;
state_old = BITBAND(SNES_CIC_STATUS_REG->FIOPIN, SNES_CIC_STATUS_BIT);
/* this loop samples at ~10MHz */
for(count=0; count<CIC_SAMPLECOUNT; count++) {
state = BITBAND(SNES_CIC_STATUS_REG->FIOPIN, SNES_CIC_STATUS_BIT);
if(state != state_old) {
togglecount++;
}
state_old = state;
}
/* CIC_TOGGLE_THRESH_PAIR > CIC_TOGGLE_THRESH_SCIC */
if(togglecount > CIC_TOGGLE_THRESH_PAIR) {
return CIC_PAIR;
} else if(togglecount > CIC_TOGGLE_THRESH_SCIC) {
return CIC_SCIC;
} else if(state) {
return CIC_OK;
} else return CIC_FAIL;
}
void spi_select_device(spi_device_t dev) {
/* Wait until TX fifo is empty */
while (!BITBAND(SSP_REGS->SR, 0)) ;
if (dev == SPIDEV_CARD0 || dev == SPIDEV_ALLCARDS)
sdcard_set_ss(0);
else
sdcard_set_ss(1);
#ifdef CONFIG_TWINSD
if (dev == SPIDEV_CARD1 || dev == SPIDEV_ALLCARDS)
sdcard2_set_ss(0);
else
sdcard2_set_ss(1);
#endif
}
void led_init() {
/* power is already connected by default */
/* set PCLK divider to 8 */
BITBAND(LPC_SC->PCLKSEL0, 13) = 1;
BITBAND(LPC_SC->PCLKSEL0, 12) = 1;
LPC_PWM1->MR0 = 255;
BITBAND(LPC_PWM1->LER, 0) = 1;
BITBAND(LPC_PWM1->TCR, 0) = 1;
BITBAND(LPC_PWM1->TCR, 3) = 1;
BITBAND(LPC_PWM1->MCR, 1) = 1;
}