static int mc34708_regulator_is_enabled(struct regulator_dev *rdev)
{
unsigned int register1;
unsigned int register_mask;
int id = rdev_get_id(rdev);
unsigned int register_val = 0;
switch (id) {
case MC34708_SWBST:
register_mask = BITFMASK(VUSBSEL);
register1 = MC34708_REG_REGULATOR_MODE0;
break;
case MC34708_VUSB:
register_mask = BITFMASK(VUSB_EN);
register1 = MC34708_REG_REGULATOR_MODE0;
break;
default:
return 1;
}
CHECK_ERROR(pmic_read_reg(register1, ®ister_val, register_mask));
return (register_val != 0);
}
static int pmic_start_coulomb_counter(void)
{
/* set scaler */
CHECK_ERROR(pmic_write_reg(REG_ACC1,
ACC_COULOMB_PER_LSB * ACC_ONEC_VALUE, BITFMASK(ACC1_ONEC)));
CHECK_ERROR(pmic_write_reg(
REG_ACC0, ACC_START_COUNTER, ACC_CONTROL_BIT_MASK));
coulomb_counter_start_time_msecs = jiffies_to_msecs(jiffies);
pr_debug("coulomb counter start time %u\n",
coulomb_counter_start_time_msecs);
return 0;
}
static int mc13892_regulator_init(struct mc13892 *mc13892)
{
unsigned int value;
pmic_event_callback_t power_key_event;
int register_mask;
printk("Initializing regulators for 3-stack.\n");
if (mxc_cpu_is_rev(CHIP_REV_2_0) < 0)
sw2_init.constraints.state_mem.uV = 1100000;
/* subscribe PWRON1 event to enable ON_OFF key */
power_key_event.param = NULL;
power_key_event.func = (void *)power_on_evt_handler;
pmic_event_subscribe(EVENT_PWRONI, power_key_event);
/* Bit 4 DRM: keep VSRTC and CLK32KMCU on for all states */
pmic_read_reg(REG_POWER_CTL0, &value, 0xffffff);
value |= 0x000010;
pmic_write_reg(REG_POWER_CTL0, value, 0xffffff);
/* Set the STANDBYSECINV bit, so that STANDBY pin is
* interpreted as active low.
*/
value = BITFVAL(STANDBYSECINV, 1);
register_mask = BITFMASK(STANDBYSECINV);
pmic_write_reg(REG_POWER_CTL2, value, register_mask);
mc13892_register_regulator(mc13892, MC13892_SW1, &sw1_init);
mc13892_register_regulator(mc13892, MC13892_SW2, &sw2_init);
mc13892_register_regulator(mc13892, MC13892_SW3, &sw3_init);
mc13892_register_regulator(mc13892, MC13892_SW4, &sw4_init);
mc13892_register_regulator(mc13892, MC13892_SWBST, &swbst_init);
mc13892_register_regulator(mc13892, MC13892_VIOHI, &viohi_init);
mc13892_register_regulator(mc13892, MC13892_VPLL, &vpll_init);
mc13892_register_regulator(mc13892, MC13892_VDIG, &vdig_init);
mc13892_register_regulator(mc13892, MC13892_VSD, &vsd_init);
mc13892_register_regulator(mc13892, MC13892_VUSB2, &vusb2_init);
mc13892_register_regulator(mc13892, MC13892_VVIDEO, &vvideo_init);
mc13892_register_regulator(mc13892, MC13892_VAUDIO, &vaudio_init);
mc13892_register_regulator(mc13892, MC13892_VCAM, &vcam_init);
mc13892_register_regulator(mc13892, MC13892_VGEN1, &vgen1_init);
mc13892_register_regulator(mc13892, MC13892_VGEN2, &vgen2_init);
mc13892_register_regulator(mc13892, MC13892_VGEN3, &vgen3_init);
mc13892_register_regulator(mc13892, MC13892_VUSB, &vusb_init);
mc13892_register_regulator(mc13892, MC13892_GPO1, &gpo1_init);
mc13892_register_regulator(mc13892, MC13892_GPO2, &gpo2_init);
mc13892_register_regulator(mc13892, MC13892_GPO3, &gpo3_init);
mc13892_register_regulator(mc13892, MC13892_GPO4, &gpo4_init);
return 0;
}
/*!
* This function controls charge LED.
*
* @param on If on is ture, LED will be turned on,
* or otherwise, LED will be turned off.
*
* @return This function returns PMIC_SUCCESS if successful.
*/
PMIC_STATUS pmic_batt_led_control(bool on)
{
unsigned val, mask;
if (suspend_flag == 1)
return PMIC_ERROR;
val = BITFVAL(MC13783_BATT_DAC_LED_EN, on);
mask = BITFMASK(MC13783_BATT_DAC_LED_EN);
CHECK_ERROR(pmic_write_reg(REG_CHARGER, val, mask));
return PMIC_SUCCESS;
}
/*!
* This function sets reverse supply mode.
*
* @param enable If enable is ture, reverse supply mode is enable,
* or otherwise, reverse supply mode is disabled.
*
* @return This function returns PMIC_SUCCESS if successful.
*/
PMIC_STATUS pmic_batt_set_reverse_supply(bool enable)
{
unsigned val, mask;
if (suspend_flag == 1)
return PMIC_ERROR;
val = BITFVAL(MC13783_BATT_DAC_REVERSE_SUPPLY, enable);
mask = BITFMASK(MC13783_BATT_DAC_REVERSE_SUPPLY);
CHECK_ERROR(pmic_write_reg(REG_CHARGER, val, mask));
return PMIC_SUCCESS;
}
/*!
* This function sets a 5K pull down at CHRGRAW.
* To be used in the dual path charging configuration.
*
* @param enable If enable is true, 5k pull down is
* enable, or otherwise, disabled.
*
* @return This function returns PMIC_SUCCESS if successful.
*/
PMIC_STATUS pmic_batt_set_5k_pull(bool enable)
{
unsigned val, mask;
if (suspend_flag == 1)
return PMIC_ERROR;
val = BITFVAL(MC13783_BATT_DAC_5K, enable);
mask = BITFMASK(MC13783_BATT_DAC_5K);
CHECK_ERROR(pmic_write_reg(REG_CHARGER, val, mask));
return PMIC_SUCCESS;
}
static int mc34708_sw_set_stby_voltage(struct regulator_dev *reg, int uV)
{
unsigned int register_val = 0, register_mask = 0, register_valtest = 0;
unsigned int register1 = 0;
int voltage, mV = uV / 1000;
int sw = rdev_get_id(reg);
voltage = mc34708_get_voltage_value(sw, mV);
switch (sw) {
case MC34708_SW1A:
register1 = REG_MC34708_SW_1_A_B;
register_val = BITFVAL(SW1A_STDBY, voltage);
register_mask = BITFMASK(SW1A_STDBY);
break;
case MC34708_SW1B:
register1 = REG_MC34708_SW_1_A_B;
register_val = BITFVAL(SW1B_STDBY, voltage);
register_mask = BITFMASK(SW1B_STDBY);
break;
case MC34708_SW2:
register1 = REG_MC34708_SW_2_3;
register_val = BITFVAL(SW2_STDBY, voltage);
register_mask = BITFMASK(SW2_STDBY);
break;
case MC34708_SW3:
register1 = REG_MC34708_SW_2_3;
register_val = BITFVAL(SW3_STDBY, voltage);
register_mask = BITFMASK(SW3_STDBY);
break;
case MC34708_SW4A:
register1 = REG_MC34708_SW_4_A_B;
register_val = BITFVAL(SW4A_STDBY, voltage);
register_mask = BITFMASK(SW4A_STDBY);
break;
case MC34708_SW4B:
register1 = REG_MC34708_SW_4_A_B;
register_val = BITFVAL(SW4B_STDBY, voltage);
register_mask = BITFMASK(SW4B_STDBY);
break;
case MC34708_SW5:
register1 = REG_MC34708_SW_5;
register_val = BITFVAL(SW5_STDBY, voltage);
register_mask = BITFMASK(SW5_STDBY);
break;
default:
return -EINVAL;
}
return pmic_write_reg(register1, register_val, register_mask);
}
/*!
* This function sets unregulatored charging mode on main battery.
*
* @param enable If enable is ture, unregulated charging mode is
* enable, or otherwise, disabled.
*
* @return This function returns PMIC_SUCCESS if successful.
*/
PMIC_STATUS pmic_batt_set_unregulated(bool enable)
{
unsigned val, mask;
if (suspend_flag == 1) {
return PMIC_ERROR;
}
val = BITFVAL(MC13783_BATT_DAC_UNREGULATED, enable);
mask = BITFMASK(MC13783_BATT_DAC_UNREGULATED);
CHECK_ERROR(pmic_write_reg(REG_CHARGER, val, mask));
return PMIC_SUCCESS;
}
static int mc34708_vgen1_set_voltage(struct regulator_dev *reg,
int minuV, int uV)
{
unsigned int register_val = 0, register_mask = 0;
unsigned int register1;
int voltage, mV = uV / 1000;
voltage = mv_to_bit_value(mV, VGEN1_MIN_MV,
VGEN1_MAX_MV, VGEN1_STEP_MV);
register_val = BITFVAL(VGEN1, voltage);
register_mask = BITFMASK(VGEN1);
register1 = MC34708_REG_REGULATOR_SETTING0;
return pmic_write_reg(register1, register_val, register_mask);
}
static int mc13892_sw_stby_set_voltage(struct regulator *reg, int uV)
{
unsigned int register_val = 0, register_mask = 0;
unsigned int register1 = 0;
int voltage, sw = reg->id, mV = uV / 1000, hi;
hi = mc13892_get_sw_hi_bit(sw);
voltage = mc13892_get_voltage_value(hi, mV);
switch (sw) {
case MC13892_SW1:
register1 = REG_SW_0;
register_val = BITFVAL(SW1_STDBY, voltage);
register_mask = BITFMASK(SW1_STDBY);
break;
case MC13892_SW2:
register1 = REG_SW_1;
register_val = BITFVAL(SW2_STDBY, voltage);
register_mask = BITFMASK(SW2_STDBY);
break;
case MC13892_SW3:
register1 = REG_SW_2;
register_val = BITFVAL(SW3_STDBY, voltage);
register_mask = BITFMASK(SW3_STDBY);
break;
case MC13892_SW4:
register1 = REG_SW_3;
register_val = BITFVAL(SW4_STDBY, voltage);
register_mask = BITFMASK(SW4_STDBY);
break;
default:
return -EINVAL;
}
return (pmic_write_reg(register1, register_val, register_mask));
}
/*!
* This function disables End-of-Life comparator.
*
* @return This function returns PMIC_SUCCESS if successful.
*/
PMIC_STATUS pmic_batt_disable_eol(void)
{
unsigned int val, mask;
if (suspend_flag == 1)
return PMIC_ERROR;
val = BITFVAL(MC13783_BATT_DAC_EOL_CMP_EN,
MC13783_BATT_DAC_EOL_CMP_EN_DISABLE);
mask = BITFMASK(MC13783_BATT_DAC_EOL_CMP_EN);
CHECK_ERROR(pmic_write_reg(REG_POWER_CONTROL_0, val, mask));
return PMIC_SUCCESS;
}
/*!
* This function sets over voltage threshold.
*
* @param threshold value of over voltage threshold.
*
* @return This function returns 0 if successful.
*/
PMIC_STATUS pmic_batt_set_threshold(int threshold)
{
unsigned int val, mask;
if (suspend_flag == 1)
return PMIC_ERROR;
if (threshold > BAT_THRESHOLD_MAX)
return PMIC_PARAMETER_ERROR;
val = BITFVAL(MC13783_BATT_DAC_OVCTRL, threshold);
mask = BITFMASK(MC13783_BATT_DAC_OVCTRL);
CHECK_ERROR(pmic_write_reg(REG_CHARGER, val, mask));
return PMIC_SUCCESS;
}
static int mc34708_swbst_disable(struct regulator_dev *reg)
{
unsigned int register_val = 0, register_mask = 0;
unsigned int register1;
int id = rdev_get_id(reg);
switch (id) {
case MC34708_SWBST:
register_val = BITFVAL(VUSBSEL, VUSBSEL_DISABLE);
register_mask = BITFMASK(VUSBSEL);
break;
default:
return -EINVAL;
}
register1 = MC34708_REG_REGULATOR_MODE0;
return pmic_write_reg(register1, register_val, register_mask);
}
static int mc13892_vgen3_set_voltage(struct regulator *reg, int uV)
{
unsigned int register_val = 0, register_mask = 0;
unsigned int register1;
int voltage, mV = uV / 1000;
if ((mV >= 1800) && (mV < 2900))
voltage = VGEN3_1_8V;
else
voltage = VGEN3_2_9V;
register_val = BITFVAL(VGEN3, voltage);
register_mask = BITFMASK(VGEN3);
register1 = REG_SETTING_0;
return (pmic_write_reg(register1, register_val, register_mask));
}
PMIC_STATUS mc13892_bklit_set_current(enum lit_channel channel,
unsigned char level)
{
unsigned int mask;
unsigned int value;
int reg;
if (level > LIT_CURR_HI_42)
return PMIC_PARAMETER_ERROR;
else if (level >= LIT_CURR_HI_0) {
CHECK_ERROR(mc13892_bklit_set_hi_current(channel, 1));
level -= LIT_CURR_HI_0;
}
switch (channel) {
case LIT_MAIN:
value = BITFVAL(BIT_CL_MAIN, level);
mask = BITFMASK(BIT_CL_MAIN);
reg = REG_LED_CTL0;
break;
case LIT_AUX:
value = BITFVAL(BIT_CL_AUX, level);
mask = BITFMASK(BIT_CL_AUX);
reg = REG_LED_CTL0;
break;
case LIT_KEY:
value = BITFVAL(BIT_CL_KEY, level);
mask = BITFMASK(BIT_CL_KEY);
reg = REG_LED_CTL1;
break;
case LIT_RED:
value = BITFVAL(BIT_CL_RED, level);
mask = BITFMASK(BIT_CL_RED);
reg = REG_LED_CTL2;
break;
case LIT_GREEN:
value = BITFVAL(BIT_CL_GREEN, level);
mask = BITFMASK(BIT_CL_GREEN);
reg = REG_LED_CTL2;
break;
case LIT_BLUE:
value = BITFVAL(BIT_CL_BLUE, level);
mask = BITFMASK(BIT_CL_BLUE);
reg = REG_LED_CTL3;
break;
default:
return PMIC_PARAMETER_ERROR;
}
CHECK_ERROR(pmic_write_reg(reg, value, mask));
return PMIC_SUCCESS;
}
static int mc13892_charger_update_status(struct mc13892_dev_info *di)
{
int ret;
unsigned int value;
int online;
ret = pmic_read_reg(REG_INT_SENSE0, &value, BITFMASK(BIT_CHG_DETS));
if (ret == 0) {
online = BITFEXT(value, BIT_CHG_DETS);
if (online != di->charger_online) {
di->charger_online = online;
dev_info(di->charger.dev, "charger status: %s\n",
online ? "online" : "offline");
power_supply_changed(&di->charger);
if (online) {
cancel_delayed_work_sync(&di->calc_capacity);
queue_delayed_work(di->monitor_wqueue, &di->calc_capacity,0);
} else {
cancel_delayed_work_sync(&di->calc_capacity);
queue_delayed_work(di->monitor_wqueue, &di->calc_capacity, HZ * 10);
}
cancel_delayed_work(&di->monitor_work);
queue_delayed_work(di->monitor_wqueue,
&di->monitor_work, HZ / 10);
if (online) {
//pmic_restart_charging();
//queue_delayed_work(chg_wq, &chg_work, 100);
chg_wa_timer = 1;
} else {
//cancel_delayed_work(&chg_work);
chg_wa_timer = 0;
}
}
}
////////////////////////////////////////////////
bChargerIsDCDC = false;
return ret;
}
static int max17135_hvinp_get_voltage(struct regulator_dev *reg)
{
unsigned int reg_val;
unsigned int fld_val;
int volt;
max17135_reg_read(REG_MAX17135_HVINP, ®_val);
fld_val = (reg_val & BITFMASK(HVINP)) >> HVINP_LSH;
if ((fld_val >= MAX17135_HVINP_MIN_VAL) &&
(fld_val <= MAX17135_HVINP_MAX_VAL)) {
volt = (fld_val * MAX17135_HVINP_STEP_uV) +
MAX17135_HVINP_MIN_uV;
} else {
printk(KERN_ERR "MAX17135: HVINP voltage is out of range\n");
volt = 0;
}
return volt;
}
static int mc13892_vcam_set_voltage(struct regulator *reg, int uV)
{
unsigned int register_val = 0, register_mask = 0;
unsigned int register1;
int voltage, mV = uV / 1000;
if ((mV >= 1800) && (mV < 2500))
voltage = VCAM_1_8V;
else if ((mV >= 2500) && (mV < 2600))
voltage = VCAM_2_5V;
else if ((mV >= 2600) && (mV < 2750))
voltage = VCAM_2_6V;
else
voltage = VCAM_2_75V;
register_val = BITFVAL(VCAM, voltage);
register_mask = BITFMASK(VCAM);
register1 = REG_SETTING_0;
return (pmic_write_reg(register1, register_val, register_mask));
}
static int mc34708_vpll_set_voltage(struct regulator_dev *reg,
int minuV, int uV)
{
unsigned int register_val = 0, register_mask = 0, register1 = 0;
int voltage, mV = uV / 1000;
if (mV < 1250)
voltage = VPLL_1_2V;
else if (mV < 1500)
voltage = VPLL_1_25V;
else if (mV < 1800)
voltage = VPLL_1_5V;
else
voltage = VPLL_1_8V;
register_val = BITFVAL(VPLL, voltage);
register_mask = BITFMASK(VPLL);
register1 = MC34708_REG_REGULATOR_SETTING0;
return pmic_write_reg(register1, register_val, register_mask);
}
static int mc13892_vvideo_set_voltage(struct regulator *reg, int uV)
{
unsigned int register_val = 0, register_mask = 0;
unsigned int register1;
int voltage, mV = uV / 1000;
if ((mV >= 2500) && (mV < 2600))
voltage = VVIDEO_2_5V;
else if ((mV >= 2600) && (mV < 2700))
voltage = VVIDEO_2_6V;
else if ((mV >= 2700) && (mV < 2775))
voltage = VVIDEO_2_7V;
else
voltage = VVIDEO_2_775V;
register_val = BITFVAL(VVIDEO, voltage);
register_mask = BITFMASK(VVIDEO);
register1 = REG_SETTING_1;
return (pmic_write_reg(register1, register_val, register_mask));
}
static int mc13892_vpll_set_voltage(struct regulator *reg, int uV)
{
unsigned int register_val = 0, register_mask = 0;
unsigned int register1;
int voltage, mV = uV / 1000;
if ((mV >= 1050) && (mV < 1250))
voltage = VPLL_1_05V;
else if ((mV >= 1250) && (mV < 1650))
voltage = VPLL_1_25V;
else if ((mV >= 1650) && (mV < 1800))
voltage = VPLL_1_65V;
else
voltage = VPLL_1_80V;
register_val = BITFVAL(VPLL, voltage);
register_mask = BITFMASK(VPLL);
register1 = REG_SETTING_0;
return (pmic_write_reg(register1, register_val, register_mask));
}
static int max17135_vcom_is_enabled(struct regulator_dev *reg)
{
struct max17135 *max17135 = rdev_get_drvdata(reg);
/* read VCOM regulator enable setting */
if (max17135->pass_num == 1) {
int gpio = gpio_get_value(max17135->gpio_pmic_vcom_ctrl);
if (gpio == 0)
return 0;
else
return 1;
} else {
unsigned int reg_val;
max17135_reg_read(REG_MAX17135_ENABLE, ®_val);
reg_val &= BITFMASK(VCOM_ENABLE);
if (reg_val != 0)
return 1;
else
return 0;
}
}
static int mc34708_vdac_set_voltage(struct regulator_dev *reg,
int minuV, int uV)
{
unsigned int register_val = 0, register_mask = 0;
unsigned int register1;
int voltage, mV = uV / 1000;
if (mV < 2600)
voltage = VDAC_2_5V;
else if (mV < 2700)
voltage = VDAC_2_6V;
else if (mV < 2775)
voltage = VDAC_2_7V;
else
voltage = VDAC_2_775V;
register_val = BITFVAL(VDAC, voltage);
register_mask = BITFMASK(VDAC);
register1 = MC34708_REG_REGULATOR_SETTING0;
return pmic_write_reg(register1, register_val, register_mask);
}
static void mc13892_battery_update_status(struct mc13892_dev_info *di)
{
unsigned int value;
int retval;
int old_battery_status = di->battery_status;
if (di->battery_status == POWER_SUPPLY_STATUS_UNKNOWN)
di->full_counter = 0;
if (di->charger_online) {
retval = pmic_read_reg(REG_INT_SENSE0,
&value, BITFMASK(BIT_CHG_CURRS));
if (retval == 0) {
value = BITFEXT(value, BIT_CHG_CURRS);
if (value)
di->battery_status =
POWER_SUPPLY_STATUS_CHARGING;
else
di->battery_status =
POWER_SUPPLY_STATUS_NOT_CHARGING;
}
if (di->battery_status == POWER_SUPPLY_STATUS_NOT_CHARGING)
di->full_counter++;
else
di->full_counter = 0;
} else {
di->battery_status = POWER_SUPPLY_STATUS_DISCHARGING;
di->full_counter = 0;
}
dev_dbg(di->bat.dev, "bat status: %d\n",
di->battery_status);
if (old_battery_status != POWER_SUPPLY_STATUS_UNKNOWN &&
di->battery_status != old_battery_status)
power_supply_changed(&di->bat);
}
static int mc34708_ldo_disable(struct regulator_dev *reg)
{
unsigned int register_val = 0, register_mask = 0;
unsigned int register1;
int id = rdev_get_id(reg);
switch (id) {
case MC34708_SWBST:
register_val = BITFVAL(VUSBSEL, VUSBSEL_DISABLE);
register_mask = BITFMASK(VUSBSEL);
break;
case MC34708_VREFDDR:
register_val = BITFVAL(VREFDDR_EN, VREFDDR_EN_DISABLE);
register_mask = BITFMASK(VREFDDR_EN);
break;
case MC34708_VUSB:
register_val = BITFVAL(VUSB_EN, VUSB_EN_DISABLE);
register_mask = BITFMASK(VUSB_EN);
break;
case MC34708_VUSB2:
register_val = BITFVAL(VUSB2_EN, VUSB2_EN_DISABLE);
register_mask = BITFMASK(VUSB2_EN);
break;
case MC34708_VDAC:
register_val = BITFVAL(VDAC_EN, VDAC_EN_DISABLE);
register_mask = BITFMASK(VDAC_EN);
break;
case MC34708_VGEN1:
register_val = BITFVAL(VGEN1_EN, VGEN1_EN_DISABLE);
register_mask = BITFMASK(VGEN1_EN);
break;
case MC34708_VGEN2:
register_val = BITFVAL(VGEN2_EN, VGEN2_EN_DISABLE);
register_mask = BITFMASK(VGEN2_EN);
break;
default:
return -EINVAL;
}
register1 = MC34708_REG_REGULATOR_MODE0;
return pmic_write_reg(register1, register_val, register_mask);
}
PMIC_STATUS mc13892_bklit_set_dutycycle(enum lit_channel channel,
unsigned char dc)
{
unsigned int mask;
unsigned int value;
int reg;
switch (channel) {
case LIT_MAIN:
value = BITFVAL(BIT_DC_MAIN, dc);
mask = BITFMASK(BIT_DC_MAIN);
reg = REG_LED_CTL0;
break;
case LIT_AUX:
value = BITFVAL(BIT_DC_AUX, dc);
mask = BITFMASK(BIT_DC_AUX);
reg = REG_LED_CTL0;
break;
case LIT_KEY:
value = BITFVAL(BIT_DC_KEY, dc);
mask = BITFMASK(BIT_DC_KEY);
reg = REG_LED_CTL1;
break;
case LIT_RED:
value = BITFVAL(BIT_DC_RED, dc);
mask = BITFMASK(BIT_DC_RED);
reg = REG_LED_CTL2;
break;
case LIT_GREEN:
value = BITFVAL(BIT_DC_GREEN, dc);
mask = BITFMASK(BIT_DC_GREEN);
reg = REG_LED_CTL2;
break;
case LIT_BLUE:
value = BITFVAL(BIT_DC_BLUE, dc);
mask = BITFMASK(BIT_DC_BLUE);
reg = REG_LED_CTL3;
break;
default:
return PMIC_PARAMETER_ERROR;
}
CHECK_ERROR(pmic_write_reg(reg, value, mask));
return PMIC_SUCCESS;
}
PMIC_STATUS mc34708_bklit_set_ramp(enum lit_channel channel, int flag)
{
unsigned int mask;
unsigned int value;
int reg;
switch (channel) {
case LIT_MAIN:
value = BITFVAL(BIT_RP_MAIN, flag);
mask = BITFMASK(BIT_RP_MAIN);
reg = REG_LED_CTL0;
break;
case LIT_AUX:
value = BITFVAL(BIT_RP_AUX, flag);
mask = BITFMASK(BIT_RP_AUX);
reg = REG_LED_CTL0;
break;
case LIT_KEY:
value = BITFVAL(BIT_RP_KEY, flag);
mask = BITFMASK(BIT_RP_KEY);
reg = REG_LED_CTL1;
break;
case LIT_RED:
value = BITFVAL(BIT_RP_RED, flag);
mask = BITFMASK(BIT_RP_RED);
reg = REG_LED_CTL2;
break;
case LIT_GREEN:
value = BITFVAL(BIT_RP_GREEN, flag);
mask = BITFMASK(BIT_RP_GREEN);
reg = REG_LED_CTL2;
break;
case LIT_BLUE:
value = BITFVAL(BIT_RP_BLUE, flag);
mask = BITFMASK(BIT_RP_BLUE);
reg = REG_LED_CTL3;
break;
default:
return PMIC_PARAMETER_ERROR;
}
CHECK_ERROR(pmic_write_reg(reg, value, mask));
return PMIC_SUCCESS;
}
PMIC_STATUS mc13892_bklit_get_dutycycle(enum lit_channel channel,
unsigned char *dc)
{
unsigned int mask;
int reg;
unsigned int reg_value = 0;
switch (channel) {
case LIT_MAIN:
mask = BITFMASK(BIT_DC_MAIN);
reg = REG_LED_CTL0;
break;
case LIT_AUX:
mask = BITFMASK(BIT_DC_AUX);
reg = REG_LED_CTL0;
break;
case LIT_KEY:
mask = BITFMASK(BIT_DC_KEY);
reg = REG_LED_CTL1;
break;
case LIT_RED:
mask = BITFMASK(BIT_DC_RED);
reg = REG_LED_CTL2;
break;
case LIT_GREEN:
mask = BITFMASK(BIT_DC_GREEN);
reg = REG_LED_CTL2;
break;
case LIT_BLUE:
mask = BITFMASK(BIT_DC_BLUE);
reg = REG_LED_CTL3;
break;
default:
return PMIC_PARAMETER_ERROR;
}
CHECK_ERROR(pmic_read_reg(reg, ®_value, mask));
return PMIC_SUCCESS;
}
PMIC_STATUS mc13892_bklit_get_ramp(enum lit_channel channel, int *flag)
{
unsigned int mask;
int reg;
switch (channel) {
case LIT_MAIN:
mask = BITFMASK(BIT_RP_MAIN);
reg = REG_LED_CTL0;
break;
case LIT_AUX:
mask = BITFMASK(BIT_RP_AUX);
reg = REG_LED_CTL0;
break;
case LIT_KEY:
mask = BITFMASK(BIT_RP_KEY);
reg = REG_LED_CTL1;
break;
case LIT_RED:
mask = BITFMASK(BIT_RP_RED);
reg = REG_LED_CTL2;
break;
case LIT_GREEN:
mask = BITFMASK(BIT_RP_GREEN);
reg = REG_LED_CTL2;
break;
case LIT_BLUE:
mask = BITFMASK(BIT_RP_BLUE);
reg = REG_LED_CTL3;
break;
default:
return PMIC_PARAMETER_ERROR;
}
CHECK_ERROR(pmic_read_reg(reg, flag, mask));
return PMIC_SUCCESS;
}
static int mc13892_regulator_init(struct mc13892 *mc13892)
{
unsigned int value, register_mask;
printk("Initializing regulators for mx50 arm2.\n");
/* enable standby controll for all regulators */
pmic_read_reg(REG_MODE_0, &value, 0xffffff);
value |= REG_MODE_0_ALL_MASK;
pmic_write_reg(REG_MODE_0, value, 0xffffff);
pmic_read_reg(REG_MODE_1, &value, 0xffffff);
value |= REG_MODE_1_ALL_MASK;
pmic_write_reg(REG_MODE_1, value, 0xffffff);
/* enable switch audo mode */
pmic_read_reg(REG_IDENTIFICATION, &value, 0xffffff);
/* only for mc13892 2.0A */
if ((value & 0x0000FFFF) == 0x45d0) {
pmic_read_reg(REG_SW_4, &value, 0xffffff);
register_mask = (SWMODE_MASK << SW1MODE_LSB) |
(SWMODE_MASK << SW2MODE_LSB);
value &= ~register_mask;
value |= (SWMODE_AUTO << SW1MODE_LSB) |
(SWMODE_AUTO << SW2MODE_LSB);
pmic_write_reg(REG_SW_4, value, 0xffffff);
pmic_read_reg(REG_SW_5, &value, 0xffffff);
register_mask = (SWMODE_MASK << SW3MODE_LSB) |
(SWMODE_MASK << SW4MODE_LSB);
value &= ~register_mask;
value |= (SWMODE_AUTO << SW3MODE_LSB) |
(SWMODE_AUTO << SW4MODE_LSB);
pmic_write_reg(REG_SW_5, value, 0xffffff);
}
/* Enable coin cell charger */
value = BITFVAL(COINCHEN, 1) | BITFVAL(VCOIN, VCOIN_3_0V);
register_mask = BITFMASK(COINCHEN) | BITFMASK(VCOIN);
pmic_write_reg(REG_POWER_CTL0, value, register_mask);
#if defined(CONFIG_RTC_DRV_MXC_V2) || defined(CONFIG_RTC_DRV_MXC_V2_MODULE)
value = BITFVAL(DRM, 1);
register_mask = BITFMASK(DRM);
pmic_write_reg(REG_POWER_CTL0, value, register_mask);
#endif
mc13892_register_regulator(mc13892, MC13892_SW1, &sw1_init);
mc13892_register_regulator(mc13892, MC13892_SW2, &sw2_init);
mc13892_register_regulator(mc13892, MC13892_SW3, &sw3_init);
mc13892_register_regulator(mc13892, MC13892_SW4, &sw4_init);
mc13892_register_regulator(mc13892, MC13892_SWBST, &swbst_init);
mc13892_register_regulator(mc13892, MC13892_VIOHI, &viohi_init);
mc13892_register_regulator(mc13892, MC13892_VPLL, &vpll_init);
mc13892_register_regulator(mc13892, MC13892_VDIG, &vdig_init);
mc13892_register_regulator(mc13892, MC13892_VSD, &vsd_init);
mc13892_register_regulator(mc13892, MC13892_VUSB2, &vusb2_init);
mc13892_register_regulator(mc13892, MC13892_VVIDEO, &vvideo_init);
mc13892_register_regulator(mc13892, MC13892_VAUDIO, &vaudio_init);
mc13892_register_regulator(mc13892, MC13892_VCAM, &vcam_init);
mc13892_register_regulator(mc13892, MC13892_VGEN1, &vgen1_init);
mc13892_register_regulator(mc13892, MC13892_VGEN2, &vgen2_init);
mc13892_register_regulator(mc13892, MC13892_VGEN3, &vgen3_init);
mc13892_register_regulator(mc13892, MC13892_VUSB, &vusb_init);
mc13892_register_regulator(mc13892, MC13892_GPO1, &gpo1_init);
mc13892_register_regulator(mc13892, MC13892_GPO2, &gpo2_init);
mc13892_register_regulator(mc13892, MC13892_GPO3, &gpo3_init);
mc13892_register_regulator(mc13892, MC13892_GPO4, &gpo4_init);
regulator_has_full_constraints();
return 0;
}
