int camdrv_ss_sr030pc50_set_preview_start(struct v4l2_subdev *sd)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct camdrv_ss_state *state = to_state(sd);
int err = 0;
CAM_INFO_PRINTK( "%s :\n", __func__);
if (!state->pix.width || !state->pix.height) {
CAM_ERROR_PRINTK( "%s : width or height is NULL!!!\n",__func__);
return -EINVAL;
}
if (state->mode_switch == PICTURE_CAPTURE_TO_CAMERA_PREVIEW_RETURN) {
// do nothing
}
if(state->mode_switch == CAMERA_PREVIEW_TO_CAMCORDER_PREVIEW)
{
// do nothing
}
else if(state->mode_switch == INIT_DONE_TO_CAMCORDER_PREVIEW)
{
// do nothing
}
else if(state->mode_switch == CAMCORDER_PREVIEW_TO_CAMERA_PREVIEW)
{
err = camdrv_ss_i2c_set_config_register(client, sr030pc50_init_regs, ARRAY_SIZE(sr030pc50_init_regs), "init_regs");
if (err < 0) {
CAM_ERROR_PRINTK( "%s :sr030pc50_init_regs IS FAILED\n",__func__);
return -EIO;
}
}
/*
err = camdrv_ss_set_preview_size(sd);
if (err < 0) {
CAM_ERROR_PRINTK( "%s : camdrv_ss_set_preview_size is FAILED !!\n", __func__);
return -EIO;
}
*/
state->camera_flash_fire = 0;
state->camera_af_flash_checked = 0;
if (state->check_dataline) { /* Output Test Pattern */
err = camdrv_ss_set_dataline_onoff(sd, 1);
if (err < 0) {
CAM_ERROR_PRINTK( "%s : check_dataline is FAILED !!\n", __func__);
return -EIO;
}
}
return 0;
}
static int camdrv_ss_sr030pc50_enum_frameintervals(struct v4l2_subdev *sd, struct v4l2_frmivalenum *fival)
{
int err = 0;
int size, i;
if (fival->index >= 1)
return -EINVAL;
CAM_INFO_PRINTK(" %s : E\n", __func__);
fival->type = V4L2_FRMIVAL_TYPE_DISCRETE;
for (i = 0; i < ARRAY_SIZE(sr030pc50_supported_preview_framesize_list); i++) {
if ((sr030pc50_supported_preview_framesize_list[i].width == fival->width) &&
(sr030pc50_supported_preview_framesize_list[i].height == fival->height)) {
size = sr030pc50_supported_preview_framesize_list[i].index;
break;
}
}
if (i == ARRAY_SIZE(sr030pc50_supported_preview_framesize_list)) {
CAM_ERROR_PRINTK("%s unsupported width = %d and height = %d\n",
__func__, fival->width, fival->height);
return -EINVAL;
}
switch (size) {
case PREVIEW_SIZE_VGA:
fival->discrete.numerator = 1;
fival->discrete.denominator = 30;
break;
default:
fival->discrete.numerator = 1;
fival->discrete.denominator = 30;
break;
}
return err;
}
static int camdrv_ss_sr030pc50_sensor_power(int on)
{
unsigned int value;
int ret = -1;
struct clk *clock;
struct clk *axi_clk;
static struct pi_mgr_dfs_node unicam_dfs_node;
CAM_INFO_PRINTK("%s:camera power %s\n", __func__, (on ? "on" : "off"));
if (!unicam_dfs_node.valid) {
ret = pi_mgr_dfs_add_request(&unicam_dfs_node, "unicam", PI_MGR_PI_ID_MM,
PI_MGR_DFS_MIN_VALUE);
if (ret) {
CAM_ERROR_PRINTK("%s: failed to register PI DFS request\n",__func__);
return -1;
}
}
clock = clk_get(NULL, SENSOR_0_CLK);
if (!clock) {
CAM_ERROR_PRINTK("%s: unable to get clock %s\n", __func__, SENSOR_0_CLK);
return -1;
}
axi_clk = clk_get(NULL, "csi0_axi_clk");
if (!axi_clk) {
CAM_ERROR_PRINTK("%s:unable to get clock csi0_axi_clk\n", __func__);
return -1;
}
VCAM_A_2_8_V = regulator_get(NULL,"cam");
if(IS_ERR(VCAM_A_2_8_V))
{
CAM_ERROR_PRINTK("can not get VCAM_A_2_8_V.8V\n");
return -1;
}
VCAM_IO_1_8_V = regulator_get(NULL,"hv9");
if(IS_ERR(VCAM_IO_1_8_V))
{
CAM_ERROR_PRINTK("can not get VCAM_IO_1.8V\n");
return -1;
}
#ifdef CONFIG_SOC_CAMERA_POWER_USE_ASR //for hw rev 0.3
VCAM_CORE_1_2_V = regulator_get(NULL,"asr_nm_uc");
if(IS_ERR(VCAM_CORE_1_2_V))
{
CAM_ERROR_PRINTK("can not get VCAM_CORE_1_2_V\n");
return -1;
}
#else
gpio_request(CAM_CORE_EN, "cam_1_2v");
gpio_direction_output(CAM_CORE_EN,0);
#endif
CAM_INFO_PRINTK("set cam_rst cam_stnby to low\n");
gpio_request(CAM0_RESET, "cam0_rst");
gpio_direction_output(CAM0_RESET,0);
gpio_request(CAM0_STNBY, "cam0_stnby");
gpio_direction_output(CAM0_STNBY,0);
gpio_request(CAM1_RESET, "cam1_rst");
gpio_direction_output(CAM1_RESET,0);
gpio_request(CAM1_STNBY, "cam1_stnby");
gpio_direction_output(CAM1_STNBY,0);
if(on)
{
CAM_INFO_PRINTK("power on the sensor \n"); //@HW
regulator_set_voltage(VCAM_A_2_8_V,2800000,2800000);
regulator_set_voltage(VCAM_IO_1_8_V,1800000,1800000);
#ifdef CONFIG_SOC_CAMERA_POWER_USE_ASR //for hw rev 0.3
regulator_set_voltage(VCAM_CORE_1_2_V,1200000,1200000);
#endif
value = clk_enable(axi_clk);
if (value) {
CAM_ERROR_PRINTK("%s:failed to enable csi2 axi clock\n", __func__);
return -1;
}
msleep(100);
CAM_INFO_PRINTK("power on the sensor's power supply\n"); //@HW
regulator_enable(VCAM_A_2_8_V);
msleep(1);
regulator_enable(VCAM_IO_1_8_V);
msleep(5);
#ifdef CONFIG_SOC_CAMERA_POWER_USE_ASR //for hw rev 0.3
regulator_enable(VCAM_CORE_1_2_V);
#else
gpio_set_value(CAM_CORE_EN,1);
#endif
msleep(2);
#ifdef CONFIG_SOC_CAMERA_POWER_USE_ASR //for hw rev 0.3
regulator_disable(VCAM_CORE_1_2_V);
#else
gpio_set_value(CAM_CORE_EN,0);
#endif
msleep(12); //changed by aska for delay MCLK on time
value = clk_enable(clock);
if (value) {
CAM_ERROR_PRINTK("%s: failed to enable clock %s\n", __func__,SENSOR_0_CLK);
return -1;
}
CAM_INFO_PRINTK("enable camera clock\n");
value = clk_set_rate(clock, SENSOR_0_CLK_FREQ);
if (value) {
CAM_ERROR_PRINTK("%s: failed to set the clock %s to freq %d\n",__func__, SENSOR_0_CLK, SENSOR_0_CLK_FREQ);
return -1;
}
CAM_INFO_PRINTK("set rate\n");
msleep(5);
gpio_set_value(CAM1_STNBY,1);
msleep(5);
gpio_set_value(CAM1_RESET,1);
msleep(50);
}
else
{
printk("power off the sensor \n"); //@HW
/* enable reset gpio */
gpio_set_value(CAM1_RESET,0);
msleep(1);
gpio_set_value(CAM1_STNBY,0);
msleep(1);
clk_disable(clock);
clk_disable(axi_clk);
msleep(1);
/* enable power down gpio */
regulator_disable(VCAM_IO_1_8_V);
regulator_disable(VCAM_A_2_8_V);
}
return 0;
}
static int camdrv_ss_sr030pc50_sensor_power(struct v4l2_subdev *sd, int on)
{
unsigned int value;
int ret = -1;
struct clk *clock;
struct clk *axi_clk;
struct clk *axi_clk_0;
struct clk *lp_clock_0;
struct clk *lp_clock_1;
CAM_INFO_PRINTK("%s:camera power %s\n", __func__, (on ? "on" : "off"));
ret = -1;
lp_clock_0 = clk_get(NULL, CSI0_LP_PERI_CLK_NAME_STR);
if (IS_ERR_OR_NULL(lp_clock_0)) {
printk(KERN_ERR "Unable to get %s clock\n",
CSI0_LP_PERI_CLK_NAME_STR);
goto e_clk_get;
}
lp_clock_1 = clk_get(NULL, CSI1_LP_PERI_CLK_NAME_STR);
if (IS_ERR_OR_NULL(lp_clock_1)) {
printk(KERN_ERR "Unable to get %s clock\n",
CSI1_LP_PERI_CLK_NAME_STR);
goto e_clk_get;
}
clock = clk_get(NULL, SENSOR_0_CLK);
if (IS_ERR_OR_NULL(clock)) {
printk(KERN_ERR "Unable to get SENSOR_1 clock\n");
goto e_clk_get;
}
axi_clk_0 = clk_get(NULL, "csi0_axi_clk");
if (IS_ERR_OR_NULL(axi_clk_0)) {
printk(KERN_ERR "Unable to get AXI clock 0\n");
goto e_clk_get;
}
axi_clk = clk_get(NULL, "csi1_axi_clk");
if (IS_ERR_OR_NULL(axi_clk)) {
printk(KERN_ERR "Unable to get AXI clock 1\n");
goto e_clk_get;
}
VCAM_A_2_8_V = regulator_get(NULL, VCAM_A_2_8V_REGULATOR);
if(IS_ERR(VCAM_A_2_8_V))
{
CAM_ERROR_PRINTK("can not get VCAM_A_2_8_V.8V\n");
return -1;
}
#ifdef VCAM1_CORE_1_8V_REGULATOR_NEEDED
VCAM1_CORE_1_8_V = regulator_get(NULL, VCAM1_CORE_1_8V_REGULATOR);
if(IS_ERR(VCAM1_CORE_1_8_V))
{
CAM_ERROR_PRINTK("can not get VCAM1_CORE_1_8_V.8V\n");
return -1;
}
#endif
VCAM_IO_1_8_V = regulator_get(NULL, VCAM_IO_1_8V_REGULATOR);
if(IS_ERR(VCAM_IO_1_8_V))
{
CAM_ERROR_PRINTK("can not get VCAM_IO_1.8V\n");
return -1;
}
#ifdef VCAM0_IO_1_8V_REGULATOR_NEEDED
VCAM0_IO_1_8_V = regulator_get(NULL, VCAM0_IO_1_8V_REGULATOR);
if (IS_ERR(VCAM0_IO_1_8_V))
{
CAM_ERROR_PRINTK("can not get VCAM0_IO_1.8V\n");
return -1;
}
#endif
#ifdef VCAM_CORE_1_2V_REGULATOR_NEEDED
VCAM_CORE_1_2_V = regulator_get(NULL, VCAM_CORE_1_2V_REGULATOR);
if(IS_ERR(VCAM_CORE_1_2_V))
{
CAM_ERROR_PRINTK("can not get VCAM_CORE_1_2_V\n");
return -1;
}
#endif
CAM_INFO_PRINTK("set cam_rst cam_stnby to low\n");
#if 0 // Moved to "if(on) block"
gpio_request(CAM0_RESET, "cam0_rst");
gpio_direction_output(CAM0_RESET, 0);
gpio_request(CAM0_STNBY, "cam0_stnby");
gpio_direction_output(CAM0_STNBY, 0);
gpio_request(CAM1_RESET, "cam1_rst");
gpio_direction_output(CAM1_RESET, 0);
gpio_request(CAM1_STNBY, "cam1_stnby");
gpio_direction_output(CAM1_STNBY, 0);
#endif
if(on)
{
CAM_INFO_PRINTK("power on the sensor \n"); //@HW
gpio_request(CAM0_RESET, "cam0_rst");
gpio_direction_output(CAM0_RESET, 0);
gpio_request(CAM0_STNBY, "cam0_stnby");
gpio_direction_output(CAM0_STNBY, 0);
gpio_request(CAM1_RESET, "cam1_rst");
gpio_direction_output(CAM1_RESET, 0);
gpio_request(CAM1_STNBY, "cam1_stnby");
gpio_direction_output(CAM1_STNBY, 0);
value = regulator_set_voltage(VCAM_A_2_8_V, VCAM_A_2_8V_REGULATOR_uV, VCAM_A_2_8V_REGULATOR_uV);
if (value)
CAM_ERROR_PRINTK("%s:regulator_set_voltage VCAM_A_2_8_V failed \n", __func__);
#ifdef VCAM1_CORE_1_8V_REGULATOR_NEEDED
value = regulator_set_voltage(VCAM1_CORE_1_8_V, VCAM1_CORE_1_8V_REGULATOR_uV, VCAM1_CORE_1_8V_REGULATOR_uV);
if (value)
CAM_ERROR_PRINTK("%s:regulator_set_voltage VCAM1_CORE_1_8_V failed \n", __func__);
#endif
value = regulator_set_voltage(VCAM_IO_1_8_V, VCAM_IO_1_8V_REGULATOR_uV, VCAM_IO_1_8V_REGULATOR_uV);
if (value)
CAM_ERROR_PRINTK("%s:regulator_set_voltage VCAM_IO_1_8_V failed \n", __func__);
#ifdef VCAM0_IO_1_8V_REGULATOR_NEEDED
value = regulator_set_voltage(VCAM0_IO_1_8_V, VCAM_IO_1_8V_REGULATOR_uV, VCAM_IO_1_8V_REGULATOR_uV);
if (value)
CAM_ERROR_PRINTK("%s:regulator_set_voltage VCAM0_IO_1_8_V failed \n", __func__);
#endif
#ifdef VCAM_CORE_1_2V_REGULATOR_NEEDED
value = regulator_set_voltage(VCAM_CORE_1_2_V, VCAM_CORE_1_2V_REGULATOR_uV, VCAM_CORE_1_2V_REGULATOR_uV);
if (value)
CAM_ERROR_PRINTK("%s:regulator_set_voltage VCAM_CORE_1_2_V failed \n", __func__);
#endif
if (mm_ccu_set_pll_select(CSI1_BYTE1_PLL, 8)) {
pr_err("failed to set BYTE1\n");
goto e_clk_pll;
}
if (mm_ccu_set_pll_select(CSI1_BYTE0_PLL, 8)) {
pr_err("failed to set BYTE0\n");
goto e_clk_pll;
}
if (mm_ccu_set_pll_select(CSI1_CAMPIX_PLL, 8)) {
pr_err("failed to set PIXPLL\n");
goto e_clk_pll;
}
value = clk_enable(lp_clock_0);
if (value) {
printk(KERN_ERR "Failed to enable lp clock 0\n");
goto e_clk_lp0;
}
value = clk_set_rate(lp_clock_0, CSI0_LP_FREQ);
if (value) {
pr_err("Failed to set lp clock 0\n");
goto e_clk_set_lp0;
}
value = clk_enable(lp_clock_1);
if (value) {
pr_err(KERN_ERR "Failed to enable lp clock 1\n");
goto e_clk_lp1;
}
value = clk_set_rate(lp_clock_1, CSI1_LP_FREQ);
if (value) {
pr_err("Failed to set lp clock 1\n");
goto e_clk_set_lp1;
}
value = clk_enable(axi_clk_0);
if (value) {
printk(KERN_ERR "Failed to enable axi clock 0\n");
goto e_clk_axi_clk_0;
}
value = clk_enable(axi_clk);
if (value) {
printk(KERN_ERR "Failed to enable axi clock 1\n");
goto e_clk_axi;
}
msleep(100);
CAM_INFO_PRINTK("power on the sensor's power supply\n"); //@HW
#ifdef VCAM_CORE_1_2V_REGULATOR_NEEDED
value = regulator_enable(VCAM_CORE_1_2_V);
if (value) {
CAM_ERROR_PRINTK("%s:failed to enable VCAM_CORE_1_2_V\n", __func__);
return -1;
}
msleep(1);
// regulator_disable(VCAM_CORE_1_2_V);
#endif
value = regulator_enable(VCAM_IO_1_8_V);
if (value) {
CAM_ERROR_PRINTK("%s:failed to enable VCAM_IO_1_8_V\n", __func__);
return -1;
}
value = regulator_enable(VCAM_A_2_8_V);
if (value) {
CAM_ERROR_PRINTK("%s:failed to enable VCAM_A_2_8_V\n", __func__);
return -1;
}
#ifdef VCAM1_CORE_1_8V_REGULATOR_NEEDED
value = regulator_enable(VCAM1_CORE_1_8_V);
if (value) {
CAM_ERROR_PRINTK("%s:failed to enable VCAM1_CORE_1_8_V\n", __func__);
return -1;
}
#endif
#ifdef VCAM0_IO_1_8V_REGULATOR_NEEDED
value = regulator_enable(VCAM0_IO_1_8_V);
if (value) {
CAM_ERROR_PRINTK("%s:failed to enable VCAM0_IO_1_8_V\n", __func__);
return -1;
}
#endif
/*msleep(5);*/
msleep(5); //changed by aska for delay MCLK on time
value = clk_enable(clock);
if (value) {
pr_err("Failed to enable sensor 0 clock\n");
goto e_clk_clock;
}
value = clk_set_rate(clock, SENSOR_0_CLK_FREQ);
if (value) {
pr_err("Failed to set sensor0 clock\n");
goto e_clk_set_clock;
}
msleep(5);
gpio_set_value(CAM1_STNBY,1);
msleep(5);
gpio_set_value(CAM1_RESET,1);
msleep(50);
#ifdef FACTORY_CHECK
if (ANTI_BANDING_60HZ == camera_antibanding_get()) {
ret = camdrv_ss_sr030pc50_check_table_size_for_60hz();
if(ret != 0) {
CAM_ERROR_PRINTK("%s: Fail - the table num is %d \n", __func__, ret);
return -1;
}
camdrv_ss_sr030pc50_copy_files_for_60hz();
}
#endif
}
else
{
printk("power off the sensor \n"); //@HW
/* enable reset gpio */
gpio_set_value(CAM1_RESET,0);
msleep(1);
gpio_set_value(CAM1_STNBY,0);
msleep(1);
clk_disable(lp_clock_0);
clk_disable(lp_clock_1);
clk_disable(clock);
clk_disable(axi_clk);
clk_disable(axi_clk_0);
msleep(1);
#ifdef VCAM1_CORE_1_8V_REGULATOR_NEEDED
regulator_disable(VCAM1_CORE_1_8_V);
#endif
/* enable power down gpio */
regulator_disable(VCAM_A_2_8_V);
regulator_disable(VCAM_IO_1_8_V);
/*
#ifdef VCAM0_IO_1_8V_REGULATOR_NEEDED
regulator_disable(VCAM0_IO_1_8_V);
#endif
*/
#ifdef VCAM_CORE_1_2V_REGULATOR_NEEDED
regulator_disable(VCAM_CORE_1_2_V);
#endif
}
return 0;
e_clk_set_clock:
clk_disable(clock);
e_clk_clock:
clk_disable(axi_clk);
e_clk_axi:
clk_disable(axi_clk_0);
e_clk_axi_clk_0:
e_clk_set_lp1:
clk_disable(lp_clock_1);
e_clk_lp1:
e_clk_set_lp0:
clk_disable(lp_clock_0);
e_clk_lp0:
e_clk_pll:
e_clk_get:
return ret;
}
int camdrv_ss_sr030pc50_set_preview_start(struct v4l2_subdev *sd)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct camdrv_ss_state *state = to_state(sd);
int err = 0;
unsigned int read_value1=0,read_value2=0,read_value3=0,read_value4=0,read_value5=0,read_value6=0;
unsigned char read_chvalue1=0,read_chvalue2=0,read_chvalue3=0,read_chvalue4=0,read_chvalue5=0,read_chvalue6=0;
int Exptime=0,Expmax=0;
CAM_INFO_PRINTK( "%s :\n", __func__);
if (!state->pix.width || !state->pix.height) {
CAM_ERROR_PRINTK( "%s : width or height is NULL!!!\n",__func__);
return -EINVAL;
}
if (state->mode_switch == PICTURE_CAPTURE_TO_CAMERA_PREVIEW_RETURN) {
// do nothing
}
if(state->mode_switch == CAMERA_PREVIEW_TO_CAMCORDER_PREVIEW)
{
/*
if ( (ARRAY_SIZE(sr030pc50_fps_auto_normal_regs) != NULL ) ||(ARRAY_SIZE(sr030pc50_fps_auto_Dark_regs) != NULL))
{
camdrv_ss_i2c_write_2_bytes(client, 0x03, 0x20);
camdrv_ss_i2c_write_2_bytes(client, 0x10, 0x1C);
camdrv_ss_i2c_read_1_byte(client, 0x80, &read_value1);
camdrv_ss_i2c_read_1_byte(client, 0x81, &read_value2);
camdrv_ss_i2c_read_1_byte(client, 0x82, &read_value3);
Exptime = (read_value1) << 16 | (read_value2)<<8 | read_value3;
camdrv_ss_i2c_read_1_byte(client, 0xA0, &read_value4);
camdrv_ss_i2c_read_1_byte(client, 0xA1, &read_value5);
camdrv_ss_i2c_read_1_byte(client, 0xA2, &read_value6);
Expmax = (read_value4) << 16 |(read_value5)<<8 | read_value6; // 50 hz
if( Exptime < Expmax )
{
err = camdrv_ss_i2c_set_config_register(client, sr030pc50_fps_auto_normal_regs, ARRAY_SIZE(sr030pc50_fps_auto_normal_regs), "fps_auto_normal_regs");
}
else
{
err = camdrv_ss_i2c_set_config_register(client, sr030pc50_fps_auto_Dark_regs, ARRAY_SIZE(sr030pc50_fps_auto_Dark_regs), "fps_auto_Dark_regs");
}
//err = camdrv_ss_i2c_set_config_register(client, sr030pc50_fps_auto_regs, ARRAY_SIZE(sr030pc50_fps_auto_regs), "fps_auto_regs");
if (err < 0) {
CAM_ERROR_PRINTK( "%s :sr030pc50_fps_auto_regs IS FAILED\n",__func__);
return -EIO;
}
}*/
// do nothing
/* Fixed FPS */
// if (ARRAY_SIZE(sr030pc50_fps_auto_regs)!= NULL)
// err = camdrv_ss_i2c_set_config_register(client, sr030pc50_fps_auto_regs, ARRAY_SIZE(sr030pc50_fps_auto_regs), "fps_auto_regs");
// else if (ARRAY_SIZE(sr030pc50_fps_30_regs) != NULL)
// err = camdrv_ss_i2c_set_config_register(client, sr030pc50_fps_30_regs, ARRAY_SIZE(sr030pc50_fps_30_regs), "fps_30_regs");
if (ARRAY_SIZE(sr030pc50_fps_25_regs) != (int)NULL)
err = camdrv_ss_i2c_set_config_register(client, sr030pc50_fps_25_regs, ARRAY_SIZE(sr030pc50_fps_25_regs), "fps_25_regs");
else if (ARRAY_SIZE(sr030pc50_fps_20_regs) !=(int) NULL)
err = camdrv_ss_i2c_set_config_register(client, sr030pc50_fps_20_regs, ARRAY_SIZE(sr030pc50_fps_20_regs), "fps_20_regs");
else if (ARRAY_SIZE(sr030pc50_fps_15_regs) !=(int) NULL)
err = camdrv_ss_i2c_set_config_register(client, sr030pc50_fps_15_regs, ARRAY_SIZE(sr030pc50_fps_15_regs), "fps_15_regs");
else
CAM_ERROR_PRINTK("%s : Fixed FPS setting is not supported for 30,25,20,15 fps !!\n", __func__);
if (err < 0) {
CAM_ERROR_PRINTK("%s : Fixed FPS setting is FAILED !!\n", __func__);
return -EIO;
}
}
else if(state->mode_switch == INIT_DONE_TO_CAMCORDER_PREVIEW)
{
// do nothing
}
else if(state->mode_switch == CAMCORDER_PREVIEW_TO_CAMERA_PREVIEW)
{
camdrv_ss_i2c_write_2_bytes(client, 0x03, 0x20);
camdrv_ss_i2c_write_2_bytes(client, 0x10, 0x1C);
camdrv_ss_i2c_read_1_byte(client, 0x80, &read_chvalue1);
camdrv_ss_i2c_read_1_byte(client, 0x81, &read_chvalue2);
camdrv_ss_i2c_read_1_byte(client, 0x82, &read_chvalue3);
read_value1 = (unsigned short)read_chvalue1;
read_value2 = (unsigned short)read_chvalue2;
read_value3 = (unsigned short)read_chvalue3;
Exptime = (read_value1) << 16 | (read_value2)<<8 | read_value3;
camdrv_ss_i2c_read_1_byte(client, 0xA0, &read_chvalue4);
camdrv_ss_i2c_read_1_byte(client, 0xA1, &read_chvalue5);
camdrv_ss_i2c_read_1_byte(client, 0xA2, &read_chvalue6);
read_value4 = (unsigned short)read_chvalue4;
read_value5 = (unsigned short)read_chvalue5;
read_value6 = (unsigned short)read_chvalue6;
Expmax = (read_value4) << 16 |(read_value5)<<8 | read_value6; // 50 hz
if( Exptime < Expmax )
{
err = camdrv_ss_i2c_set_config_register(client, sr030pc50_fps_auto_normal_regs, ARRAY_SIZE(sr030pc50_fps_auto_normal_regs), "fps_auto_normal_regs");
}
else
{
err = camdrv_ss_i2c_set_config_register(client, sr030pc50_fps_auto_Dark_regs, ARRAY_SIZE(sr030pc50_fps_auto_Dark_regs), "fps_auto_Dark_regs");
}
//err = camdrv_ss_i2c_set_config_register(client, sr030pc50_fps_auto_regs, ARRAY_SIZE(sr030pc50_fps_auto_regs), "fps_auto_regs");
if (err < 0) {
CAM_ERROR_PRINTK( "%s :sr030pc50_fps_auto_regs IS FAILED\n",__func__);
return -EIO;
}
}
/*
err = camdrv_ss_set_preview_size(sd);
if (err < 0) {
CAM_ERROR_PRINTK( "%s : camdrv_ss_set_preview_size is FAILED !!\n", __func__);
return -EIO;
}
*/
state->camera_flash_fire = 0;
state->camera_af_flash_checked = 0;
if (state->check_dataline) { /* Output Test Pattern */
err = camdrv_ss_set_dataline_onoff(sd, 1);
if (err < 0) {
CAM_ERROR_PRINTK( "%s : check_dataline is FAILED !!\n", __func__);
return -EIO;
}
}
return 0;
}
