#include <asm/hardware/gic.h>
#include <asm/arch_timer.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <mach/socinfo.h>
#include <mach/board.h>
#include <mach/gpio.h>
#include <mach/clk-provider.h>
#include "clock.h"
#define L2CC_AUX_CTRL ((0x1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) | \
(0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) | \
(0x1 << L2X0_AUX_CTRL_EVNT_MON_BUS_EN_SHIFT))
static struct clk_lookup msm_clocks_dummy[] = {
CLK_DUMMY("core_clk", BLSP1_UART_CLK, "msm_serial_hsl.0", OFF),
CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "msm_serial_hsl.0", OFF),
CLK_DUMMY("phy_clk", NULL, "msm_otg", OFF),
CLK_DUMMY("core_clk", NULL, "msm_otg", OFF),
CLK_DUMMY("alt_core_clk", NULL, "msm_otg", OFF),
CLK_DUMMY("iface_clk", NULL, "msm_otg", OFF),
CLK_DUMMY("xo", NULL, "msm_otg", OFF),
CLK_DUMMY("dfab_clk", DFAB_CLK, NULL, 0),
CLK_DUMMY("dma_bam_pclk", DMA_BAM_P_CLK, NULL, 0),
CLK_DUMMY("mem_clk", NULL, NULL, 0),
CLK_DUMMY("core_clk", SPI_CLK, "spi_qsd.1", OFF),
CLK_DUMMY("iface_clk", SPI_P_CLK, "spi_qsd.1", OFF),
CLK_DUMMY("core_clk", NULL, "f9966000.i2c", 0),
CLK_DUMMY("iface_clk", NULL, "f9966000.i2c", 0),
CLK_DUMMY("core_clk", NULL, "fe12f000.slim", OFF),
};
void __init msmzinc_reserve(void)
{
reserve_info = &msmzinc_reserve_info;
of_scan_flat_dt(dt_scan_for_memory_reserve, msmzinc_reserve_table);
msm_reserve();
}
static void __init msmzinc_early_memory(void)
{
reserve_info = &msmzinc_reserve_info;
of_scan_flat_dt(dt_scan_for_memory_hole, msmzinc_reserve_table);
}
static struct clk_lookup msm_clocks_dummy[] = {
CLK_DUMMY("core_clk", BLSP1_UART_CLK, "f991f000.serial", OFF),
CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "f991f000.serial", OFF),
};
static struct clock_init_data msm_dummy_clock_init_data __initdata = {
.table = msm_clocks_dummy,
.size = ARRAY_SIZE(msm_clocks_dummy),
};
/*
* Used to satisfy dependencies for devices that need to be
* run early or in a particular order. Most likely your device doesn't fall
* into this category, and thus the driver should not be added here. The
* EPROBE_DEFER can satisfy most dependency problems.
*/
void __init msmzinc_add_drivers(void)
CLK_LOOKUP("mdp_lcdc_pclk_clk", mdp_lcdc_pclk_clk.c, NULL),
CLK_LOOKUP("mdp_lcdc_pad_pclk_clk", mdp_lcdc_pad_pclk_clk.c, NULL),
CLK_LOOKUP("mdp_vsync_clk", mdp_vsync_clk.c, NULL),
CLK_LOOKUP("pbus_clk", pbus_clk.c, NULL),
CLK_LOOKUP("pcm_clk", pcm_clk.c, NULL),
CLK_LOOKUP("sdac_clk", sdac_clk.c, NULL),
CLK_LOOKUP("core_clk", sdc1_clk.c, "msm_sdcc.1"),
CLK_LOOKUP("iface_clk", sdc1_p_clk.c, "msm_sdcc.1"),
CLK_LOOKUP("core_clk", sdc2_clk.c, "msm_sdcc.2"),
CLK_LOOKUP("iface_clk", sdc2_p_clk.c, "msm_sdcc.2"),
CLK_LOOKUP("core_clk", sdc3_clk.c, "msm_sdcc.3"),
CLK_LOOKUP("iface_clk", sdc3_p_clk.c, "msm_sdcc.3"),
CLK_LOOKUP("core_clk", sdc4_clk.c, "msm_sdcc.4"),
CLK_LOOKUP("iface_clk", sdc4_p_clk.c, "msm_sdcc.4"),
CLK_LOOKUP("core_clk", spi_clk.c, "spi_qsd.0"),
CLK_DUMMY("iface_clk", SPI_P_CLK, "spi_qsd.0", 0),
CLK_LOOKUP("core_clk", tsif_clk.c, "msm_tsif.0"),
CLK_LOOKUP("ref_clk", tsif_ref_clk.c, "msm_tsif.0"),
CLK_LOOKUP("tv_dac_clk", tv_dac_clk.c, NULL),
CLK_LOOKUP("tv_enc_clk", tv_enc_clk.c, NULL),
CLK_LOOKUP("core_clk", uart1_clk.c, "msm_serial.0"),
CLK_LOOKUP("core_clk", uart2_clk.c, "msm_serial.1"),
CLK_LOOKUP("core_clk", uart3_clk.c, "msm_serial.2"),
CLK_LOOKUP("core_clk", uart1dm_clk.c, "msm_serial_hs.0"),
CLK_LOOKUP("core_clk", uart2dm_clk.c, "msm_serial_hs.1"),
CLK_LOOKUP("alt_core_clk", usb_hs_clk.c, "msm_otg"),
CLK_LOOKUP("iface_clk", usb_hs_p_clk.c, "msm_otg"),
CLK_LOOKUP("alt_core_clk", usb_otg_clk.c, NULL),
CLK_LOOKUP("vdc_clk", vdc_clk.c, NULL),
CLK_LOOKUP("vfe_clk", vfe_clk.c, NULL),
CLK_LOOKUP("vfe_mdc_clk", vfe_mdc_clk.c, NULL),
kfree(cpr_info);
if (msm8625_cpu_id() == MSM8625A)
msm_cpr_pdata.max_freq = 1209600;
else if (msm8625_cpu_id() == MSM8625)
msm_cpr_pdata.max_freq = 1008000;
msm_cpr_clk_enable();
platform_device_register(&msm8625_vp_device);
platform_device_register(&msm8625_device_cpr);
}
static struct clk_lookup msm_clock_8625_dummy[] = {
CLK_DUMMY("core_clk", adm_clk.c, "msm_dmov", 0),
CLK_DUMMY("adsp_clk", adsp_clk.c, NULL, 0),
CLK_DUMMY("ahb_m_clk", ahb_m_clk.c, NULL, 0),
CLK_DUMMY("ahb_s_clk", ahb_s_clk.c, NULL, 0),
CLK_DUMMY("cam_m_clk", cam_m_clk.c, NULL, 0),
CLK_DUMMY("csi_clk", csi1_clk.c, NULL, 0),
CLK_DUMMY("csi_pclk", csi1_p_clk.c, NULL, 0),
CLK_DUMMY("csi_vfe_clk", csi1_vfe_clk.c, NULL, 0),
CLK_DUMMY("dsi_byte_clk", dsi_byte_clk.c, NULL, 0),
CLK_DUMMY("dsi_clk", dsi_clk.c, NULL, 0),
CLK_DUMMY("dsi_esc_clk", dsi_esc_clk.c, NULL, 0),
CLK_DUMMY("dsi_pixel_clk", dsi_pixel_clk.c, NULL, 0),
CLK_DUMMY("dsi_ref_clk", dsi_ref_clk.c, NULL, 0),
CLK_DUMMY("ebi1_clk", ebi1_clk.c, NULL, 0),
CLK_DUMMY("ebi2_clk", ebi2_clk.c, NULL, 0),
CLK_DUMMY("ecodec_clk", ecodec_clk.c, NULL, 0),
.start = MSM_GSBI3_PHYS,
.end = MSM_GSBI3_PHYS + PAGE_SIZE - 1,
.name = "gsbi_resource",
.flags = IORESOURCE_MEM,
},
};
struct platform_device apq8064_device_uart_gsbi3 = {
.name = "msm_serial_hsl",
.id = 0,
.num_resources = ARRAY_SIZE(resources_uart_gsbi3),
.resource = resources_uart_gsbi3,
};
struct clk_lookup msm_clocks_8064_dummy[] = {
CLK_DUMMY("pll2", PLL2, NULL, 0),
CLK_DUMMY("pll8", PLL8, NULL, 0),
CLK_DUMMY("pll4", PLL4, NULL, 0),
CLK_DUMMY("afab_clk", AFAB_CLK, NULL, 0),
CLK_DUMMY("afab_a_clk", AFAB_A_CLK, NULL, 0),
CLK_DUMMY("cfpb_clk", CFPB_CLK, NULL, 0),
CLK_DUMMY("cfpb_a_clk", CFPB_A_CLK, NULL, 0),
CLK_DUMMY("dfab_clk", DFAB_CLK, NULL, 0),
CLK_DUMMY("dfab_a_clk", DFAB_A_CLK, NULL, 0),
CLK_DUMMY("ebi1_clk", EBI1_CLK, NULL, 0),
CLK_DUMMY("ebi1_a_clk", EBI1_A_CLK, NULL, 0),
CLK_DUMMY("mmfab_clk", MMFAB_CLK, NULL, 0),
CLK_DUMMY("mmfab_a_clk", MMFAB_A_CLK, NULL, 0),
CLK_DUMMY("mmfpb_clk", MMFPB_CLK, NULL, 0),
CLK_DUMMY("mmfpb_a_clk", MMFPB_A_CLK, NULL, 0),
#include <asm/mach/time.h>
#include <mach/socinfo.h>
#include <mach/board.h>
#include <mach/msm_memtypes.h>
#include <mach/qpnp-int.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include "board-dt.h"
#include "clock.h"
#include "platsmp.h"
static struct clk_lookup msm_clocks_dummy[] = {
CLK_DUMMY("core_clk", BLSP1_UART_CLK, "msm_serial_hsl.0", OFF),
CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "msm_serial_hsl.0", OFF),
};
struct clock_init_data mpq8092_clock_init_data __initdata = {
.table = msm_clocks_dummy,
.size = ARRAY_SIZE(msm_clocks_dummy),
};
static struct memtype_reserve mpq8092_reserve_table[] __initdata = {
[MEMTYPE_SMI] = {
},
[MEMTYPE_EBI0] = {
.flags = MEMTYPE_FLAGS_1M_ALIGN,
},
[MEMTYPE_EBI1] = {
"msm_sdcc.1", NULL),
OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF98A4000, \
"msm_sdcc.2", NULL),
{}
};
void __init fsm9900_reserve(void)
{
}
static void __init fsm9900_early_memory(void)
{
}
static struct clk_lookup msm_clocks_dummy[] = {
CLK_DUMMY("core_clk", BLSP2_UART_CLK, "f9960000.serial", OFF),
CLK_DUMMY("iface_clk", BLSP2_UART_CLK, "f9960000.serial", OFF),
CLK_DUMMY("core_clk", BLSP1_UART_CLK, "f991f000.serial", OFF),
CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "f991f000.serial", OFF),
CLK_DUMMY("core_clk", BLSP2_I2C_CLK, "f9966000.i2c", OFF),
CLK_DUMMY("iface_clk", BLSP2_I2C_CLK, "f9966000.i2c", OFF),
CLK_DUMMY("core_clk", BLSP1_I2C_CLK, "f9924000.i2c", OFF),
CLK_DUMMY("iface_clk", BLSP1_I2C_CLK, "f9924000.i2c", OFF),
CLK_DUMMY("core_clk", NULL, "f9a55000.usb", OFF),
CLK_DUMMY("iface_clk", NULL, "f9a55000.usb", OFF),
CLK_DUMMY("phy_clk", NULL, "f9a55000.usb", OFF),
CLK_DUMMY("xo", NULL, "f9a55000.usb", OFF),
CLK_DUMMY("core_clk", NULL, "msm_ehci_host", OFF),
CLK_DUMMY("iface_clk", NULL, "msm_ehci_host", OFF),
CLK_DUMMY("sleep_clk", NULL, "msm_ehci_host", OFF),
CLK_DUMMY("xo", NULL, "msm_ehci_host", OFF),
ARRAY_SIZE(msm_bus_8974_devices));
};
void __init msm_8974_add_devices(void)
{
#ifdef CONFIG_ION_MSM
platform_device_register(&ion_dev);
#endif
platform_device_register(&msm_device_smd_8974);
platform_device_register(&android_usb_device);
platform_add_devices(msm_8974_stub_regulator_devices,
msm_8974_stub_regulator_devices_len);
}
static struct clk_lookup msm_clocks_dummy[] = {
CLK_DUMMY("xo", XO_CLK, NULL, OFF),
CLK_DUMMY("xo", XO_CLK, "pil_pronto", OFF),
CLK_DUMMY("core_clk", BLSP2_UART_CLK, "msm_serial_hsl.0", OFF),
CLK_DUMMY("iface_clk", BLSP2_UART_CLK, "msm_serial_hsl.0", OFF),
CLK_DUMMY("core_clk", SDC1_CLK, NULL, OFF),
CLK_DUMMY("iface_clk", SDC1_P_CLK, NULL, OFF),
CLK_DUMMY("core_clk", SDC3_CLK, NULL, OFF),
CLK_DUMMY("iface_clk", SDC3_P_CLK, NULL, OFF),
CLK_DUMMY("phy_clk", NULL, "msm_otg", OFF),
CLK_DUMMY("core_clk", NULL, "msm_otg", OFF),
CLK_DUMMY("iface_clk", NULL, "msm_otg", OFF),
CLK_DUMMY("xo", NULL, "msm_otg", OFF),
CLK_DUMMY("dfab_clk", DFAB_CLK, NULL, 0),
CLK_DUMMY("dma_bam_pclk", DMA_BAM_P_CLK, NULL, 0),
CLK_DUMMY("mem_clk", NULL, NULL, 0),
CLK_DUMMY("core_clk", SPI_CLK, "spi_qsd.1", OFF),
static struct resource rng_resources = {
.flags = IORESOURCE_MEM,
.start = MSM_PRNG_PHYS,
.end = MSM_PRNG_PHYS + SZ_512 - 1,
};
struct platform_device apq8064_device_rng = {
.name = "msm_rng",
.id = 0,
.num_resources = 1,
.resource = &rng_resources,
};
#endif
static struct clk_lookup msm_clocks_8064_dummy[] = {
CLK_DUMMY("pll2", PLL2, NULL, 0),
CLK_DUMMY("pll8", PLL8, NULL, 0),
CLK_DUMMY("pll4", PLL4, NULL, 0),
CLK_DUMMY("afab_clk", AFAB_CLK, NULL, 0),
CLK_DUMMY("afab_a_clk", AFAB_A_CLK, NULL, 0),
CLK_DUMMY("cfpb_clk", CFPB_CLK, NULL, 0),
CLK_DUMMY("cfpb_a_clk", CFPB_A_CLK, NULL, 0),
CLK_DUMMY("dfab_clk", DFAB_CLK, NULL, 0),
CLK_DUMMY("dfab_a_clk", DFAB_A_CLK, NULL, 0),
CLK_DUMMY("ebi1_clk", EBI1_CLK, NULL, 0),
CLK_DUMMY("ebi1_a_clk", EBI1_A_CLK, NULL, 0),
CLK_DUMMY("mmfab_clk", MMFAB_CLK, NULL, 0),
CLK_DUMMY("mmfab_a_clk", MMFAB_A_CLK, NULL, 0),
CLK_DUMMY("mmfpb_clk", MMFPB_CLK, NULL, 0),
CLK_DUMMY("mmfpb_a_clk", MMFPB_A_CLK, NULL, 0),
{
gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
(void *)MSM_QGIC_CPU_BASE);
/* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
writel_relaxed(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
writel_relaxed(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
mb();
irq_domain_generate_simple(msm_copper_gic_match,
COPPER_QGIC_DIST_PHYS, GIC_SPI_START);
}
static struct clk_lookup msm_clocks_dummy[] = {
CLK_DUMMY("core_clk", BLSP2_UART_CLK, "msm_serial_hsl.0", OFF),
CLK_DUMMY("iface_clk", BLSP2_UART_CLK, "msm_serial_hsl.0", OFF),
CLK_DUMMY("core_clk", SDC1_CLK, NULL, OFF),
CLK_DUMMY("iface_clk", SDC1_P_CLK, NULL, OFF),
CLK_DUMMY("core_clk", SDC3_CLK, NULL, OFF),
CLK_DUMMY("iface_clk", SDC3_P_CLK, NULL, OFF),
CLK_DUMMY("phy_clk", NULL, "msm_otg", OFF),
CLK_DUMMY("core_clk", NULL, "msm_otg", OFF),
CLK_DUMMY("alt_core_clk", NULL, "msm_otg", OFF),
CLK_DUMMY("iface_clk", NULL, "msm_otg", OFF),
CLK_DUMMY("dfab_clk", DFAB_CLK, NULL, 0),
CLK_DUMMY("dma_bam_pclk", DMA_BAM_P_CLK, NULL, 0),
CLK_DUMMY("mem_clk", NULL, NULL, 0),
};
struct clock_init_data msm_dummy_clock_init_data __initdata = {
CLK_LOOKUP("mdp_lcdc_pclk_clk", mdp_lcdc_pclk_clk.c, NULL),
CLK_LOOKUP("mdp_lcdc_pad_pclk_clk", mdp_lcdc_pad_pclk_clk.c, NULL),
CLK_LOOKUP("mdp_vsync_clk", mdp_vsync_clk.c, NULL),
CLK_LOOKUP("pbus_clk", pbus_clk.c, NULL),
CLK_LOOKUP("pcm_clk", pcm_clk.c, NULL),
CLK_LOOKUP("sdac_clk", sdac_clk.c, NULL),
CLK_LOOKUP("sdc_clk", sdc1_clk.c, "msm_sdcc.1"),
CLK_LOOKUP("sdc_pclk", sdc1_p_clk.c, "msm_sdcc.1"),
CLK_LOOKUP("sdc_clk", sdc2_clk.c, "msm_sdcc.2"),
CLK_LOOKUP("sdc_pclk", sdc2_p_clk.c, "msm_sdcc.2"),
CLK_LOOKUP("sdc_clk", sdc3_clk.c, "msm_sdcc.3"),
CLK_LOOKUP("sdc_pclk", sdc3_p_clk.c, "msm_sdcc.3"),
CLK_LOOKUP("sdc_clk", sdc4_clk.c, "msm_sdcc.4"),
CLK_LOOKUP("sdc_pclk", sdc4_p_clk.c, "msm_sdcc.4"),
CLK_LOOKUP("spi_clk", spi_clk.c, NULL),
CLK_DUMMY("spi_pclk", SPI_P_CLK, "spi_qsd.0", 0),
CLK_LOOKUP("tsif_clk", tsif_clk.c, NULL),
CLK_LOOKUP("tsif_ref_clk", tsif_ref_clk.c, NULL),
CLK_LOOKUP("tv_dac_clk", tv_dac_clk.c, NULL),
CLK_LOOKUP("tv_enc_clk", tv_enc_clk.c, NULL),
CLK_LOOKUP("uart_clk", uart1_clk.c, "msm_serial.0"),
CLK_LOOKUP("uart_clk", uart2_clk.c, "msm_serial.1"),
CLK_LOOKUP("uart_clk", uart3_clk.c, "msm_serial.2"),
CLK_LOOKUP("uartdm_clk", uart1dm_clk.c, "msm_serial_hs.0"),
CLK_LOOKUP("uartdm_clk", uart2dm_clk.c, "msm_serial_hs.1"),
CLK_LOOKUP("usb_hs_clk", usb_hs_clk.c, NULL),
CLK_LOOKUP("usb_hs_pclk", usb_hs_p_clk.c, NULL),
CLK_LOOKUP("usb_otg_clk", usb_otg_clk.c, NULL),
CLK_LOOKUP("vdc_clk", vdc_clk.c, NULL),
CLK_LOOKUP("vfe_clk", vfe_clk.c, NULL),
CLK_LOOKUP("vfe_mdc_clk", vfe_mdc_clk.c, NULL),
#include <mach/rpm-regulator-smd.h>
#include <mach/socinfo.h>
#include <mach/rpm-smd.h>
#include "clock-local2.h"
#include "clock-pll.h"
#include "clock-rpm.h"
#include "clock-voter.h"
#include "clock.h"
/*
*/
static struct clk_lookup msm_clocks_8092[] = {
CLK_DUMMY("core_clk", BLSP1_UART_CLK, "msm_serial_hsl.0", OFF),
CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "msm_serial_hsl.0", OFF),
CLK_DUMMY("core_clk", BLSP1_UART_CLK, "msm_serial_hsl.1", OFF),
CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "msm_serial_hsl.1", OFF),
CLK_DUMMY("core_clk", SDC1_CLK, "msm_sdcc.1", OFF),
CLK_DUMMY("iface_clk", SDC1_P_CLK, "msm_sdcc.1", OFF),
CLK_DUMMY("core_clk", SDC2_CLK, "msm_sdcc.2", OFF),
CLK_DUMMY("iface_clk", SDC2_P_CLK, "msm_sdcc.2", OFF),
CLK_DUMMY("dfab_clk", DFAB_CLK, "msm_sps", OFF),
CLK_DUMMY("dma_bam_pclk", DMA_BAM_P_CLK, "msm_sps", OFF),
CLK_DUMMY("", usb30_master_clk_src.c, "", OFF),
CLK_DUMMY("", tsif_ref_clk_src.c, "", OFF),
CLK_DUMMY("", ce1_clk_src.c, "", OFF),
CLK_DUMMY("", ce2_clk_src.c, "", OFF),
CLK_DUMMY("", ce3_clk_src.c, "", OFF),
CLK_DUMMY("", geni_ser_clk_src.c, "", OFF),
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/kernel.h>
#include <linux/clk.h>
#include <mach/clk.h>
#include "clock.h"
/*
* Clocks
*/
static struct clk_lookup msm_clocks_fsm9xxx[] = {
CLK_DUMMY("core_clk", ADM0_CLK, "msm_dmov", OFF),
CLK_DUMMY("core_clk", UART1_CLK, "msm_serial.0", OFF),
CLK_DUMMY("core_clk", UART3_CLK, "msm_uim.2", OFF),
CLK_DUMMY("core_clk", CE_CLK, "qce.0", OFF),
CLK_DUMMY("core_clk", CE_CLK, "qcota.0", OFF),
CLK_DUMMY("core_clk", CE_CLK, "qcrypto.0", OFF),
};
struct clock_init_data fsm9xxx_clock_init_data __initdata = {
.table = msm_clocks_fsm9xxx,
.size = ARRAY_SIZE(msm_clocks_fsm9xxx),
};
void __init apq8084_reserve(void)
{
reserve_info = &apq8084_reserve_info;
of_scan_flat_dt(dt_scan_for_memory_reserve, apq8084_reserve_table);
msm_reserve();
}
static void __init apq8084_early_memory(void)
{
reserve_info = &apq8084_reserve_info;
of_scan_flat_dt(dt_scan_for_memory_hole, apq8084_reserve_table);
}
static struct clk_lookup msm_clocks_dummy[] = {
CLK_DUMMY("core_clk", BLSP1_UART_CLK, "f991f000.serial", OFF),
CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "f991f000.serial", OFF),
CLK_DUMMY("core_clk", SDC1_CLK, "msm_sdcc.1", OFF),
CLK_DUMMY("iface_clk", SDC1_P_CLK, "msm_sdcc.1", OFF),
CLK_DUMMY("core_clk", SDC2_CLK, "msm_sdcc.2", OFF),
CLK_DUMMY("iface_clk", SDC2_P_CLK, "msm_sdcc.2", OFF),
CLK_DUMMY("xo", NULL, "f9200000.qcom,ssusb", OFF),
CLK_DUMMY("core_clk", NULL, "f9200000.qcom,ssusb", OFF),
CLK_DUMMY("iface_clk", NULL, "f9200000.qcom,ssusb", OFF),
CLK_DUMMY("sleep_clk", NULL, "f9200000.qcom,ssusb", OFF),
CLK_DUMMY("sleep_a_clk", NULL, "f9200000.qcom,ssusb", OFF),
CLK_DUMMY("utmi_clk", NULL, "f9200000.qcom,ssusb", OFF),
CLK_DUMMY("ref_clk", NULL, "f9200000.qcom,ssusb", OFF),
};
static struct clock_init_data msm_dummy_clock_init_data __initdata = {
#include <linux/clk.h>
#include <linux/iopoll.h>
#include <linux/regulator/consumer.h>
#include <mach/rpm-regulator-smd.h>
#include <mach/socinfo.h>
#include <mach/rpm-smd.h>
#include "clock-local2.h"
#include "clock-pll.h"
#include "clock-rpm.h"
#include "clock-voter.h"
#include "clock.h"
static struct clk_lookup msm_clocks_8084[] = {
CLK_DUMMY("core_clk", BLSP1_UART_CLK, "f991f000.serial", OFF),
CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "f991f000.serial", OFF),
CLK_DUMMY("core_clk", SDC1_CLK, "msm_sdcc.1", OFF),
CLK_DUMMY("iface_clk", SDC1_P_CLK, "msm_sdcc.1", OFF),
CLK_DUMMY("core_clk", SDC2_CLK, "msm_sdcc.2", OFF),
CLK_DUMMY("iface_clk", SDC2_P_CLK, "msm_sdcc.2", OFF),
CLK_DUMMY("xo", NULL, "f9200000.qcom,ssusb", OFF),
CLK_DUMMY("core_clk", NULL, "f9200000.qcom,ssusb", OFF),
CLK_DUMMY("iface_clk", NULL, "f9200000.qcom,ssusb", OFF),
CLK_DUMMY("sleep_clk", NULL, "f9200000.qcom,ssusb", OFF),
CLK_DUMMY("sleep_a_clk", NULL, "f9200000.qcom,ssusb", OFF),
CLK_DUMMY("utmi_clk", NULL, "f9200000.qcom,ssusb", OFF),
CLK_DUMMY("ref_clk", NULL, "f9200000.qcom,ssusb", OFF),
CLK_DUMMY("dfab_clk", DFAB_CLK, "msm_sps", OFF),
CLK_DUMMY("dma_bam_pclk", DMA_BAM_P_CLK, "msm_sps", OFF),
CLK_DUMMY("", ufs_axi_clk_src.c, "", OFF),
#include <mach/gpiomux.h>
#include <mach/msm_iomap.h>
#include <mach/msm_memtypes.h>
#include <mach/restart.h>
#include <mach/socinfo.h>
#include <mach/clk-provider.h>
#include <mach/msm_smem.h>
#include <mach/msm_smd.h>
#include "board-dt.h"
#include "clock.h"
#include "devices.h"
#include "platsmp.h"
#include "modem_notifier.h"
static struct clk_lookup msm_clocks_dummy[] = {
CLK_DUMMY("xo", CXO_CLK, "fc880000.qcom,mss", OFF),
CLK_DUMMY("bus_clk", MSS_BIMC_Q6_CLK, "fc880000.qcom,mss", OFF),
CLK_DUMMY("iface_clk", MSS_CFG_AHB_CLK, "fc880000.qcom,mss", OFF),
CLK_DUMMY("mem_clk", BOOT_ROM_AHB_CLK, "fc880000.qcom,mss", OFF),
CLK_DUMMY("core_clk", BLSP1_UART_CLK, "f991f000.serial", OFF),
CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "f991f000.serial", OFF),
CLK_DUMMY("core_clk", SDC1_CLK, "msm_sdcc.1", OFF),
CLK_DUMMY("iface_clk", SDC1_P_CLK, "msm_sdcc.1", OFF),
CLK_DUMMY("core_clk", SDC2_CLK, "msm_sdcc.2", OFF),
CLK_DUMMY("iface_clk", SDC2_P_CLK, "msm_sdcc.2", OFF),
CLK_DUMMY("core_clk", USB_HS_SYSTEM_CLK, "msm_otg", OFF),
CLK_DUMMY("iface_clk", USB_HS_AHB_CLK, "msm_otg", OFF),
CLK_DUMMY("xo", CXO_OTG_CLK, "msm_otg", OFF),
CLK_DUMMY("dfab_clk", DFAB_CLK, "msm_sps", OFF),
CLK_DUMMY("dma_bam_pclk", DMA_BAM_P_CLK, "msm_sps", OFF),
};
