void IsrWatchdog(void) { struct s3c24x0_interrupt * const intregs = s3c24x0_get_base_interrupt(); intregs->SUBSRCPND = (1<<13); ClearPending_my(BIT_WDT_AC97 /* BIT_WDT */); intCount++; }
void IsrDma2(void) { U8 out_csr3; U32 dwEmptyCnt; U8 saveIndexReg=usbdevregs->INDEX_REG; usbdevregs->INDEX_REG=3; out_csr3=usbdevregs->OUT_CSR1_REG; ClearPending_my(BIT_DMA2); /* thisway.diy, 2006.06.22 * When the first DMA interrupt happened, it has received max (0x80000 + EP3_PKT_SIZE) bytes data from PC */ if (!totalDmaCount) totalDmaCount = dwWillDMACnt + EP3_PKT_SIZE; else totalDmaCount+=dwWillDMACnt; // dwUSBBufWritePtr = ((dwUSBBufWritePtr + dwWillDMACnt - USB_BUF_BASE) % USB_BUF_SIZE) + USB_BUF_BASE; /* thisway.diy, 2006.06.21 */ dwUSBBufWritePtr = ((dwUSBBufWritePtr + dwWillDMACnt - dwUSBBufBase) % dwUSBBufSize) + dwUSBBufBase; if(totalDmaCount>=downloadFileSize)// is last? { totalDmaCount=downloadFileSize; ConfigEp3IntMode(); if(out_csr3& EPO_OUT_PKT_READY) { CLR_EP3_OUT_PKT_READY(); } intregs->INTMSK|=BIT_DMA2; intregs->INTMSK&=~(BIT_USBD); } else { if((totalDmaCount+0x80000)<downloadFileSize) { dwWillDMACnt = 0x80000; } else { dwWillDMACnt = downloadFileSize - totalDmaCount; } // dwEmptyCnt = (dwUSBBufReadPtr - dwUSBBufWritePtr - 1 + USB_BUF_SIZE) % USB_BUF_SIZE; /* thisway.diy, 2006.06.21 */ dwEmptyCnt = (dwUSBBufReadPtr - dwUSBBufWritePtr - 1 + dwUSBBufSize) % dwUSBBufSize; if (dwEmptyCnt >= dwWillDMACnt) { ConfigEp3DmaMode(dwUSBBufWritePtr, dwWillDMACnt); } else { bDMAPending = 1; } } usbdevregs->INDEX_REG = saveIndexReg; }
void Timer_InitEx(void) { struct s3c24x0_interrupt * const intregs = s3c24x0_get_base_interrupt(); intCount=0; intregs->SUBSRCPND = (1<<13); ClearPending_my(BIT_WDT_AC97/*BIT_WDT*/); intregs->INTMSK&=~(BIT_WDT_AC97 /*BIT_WDT*/); intregs->INTSUBMSK &= ~(1<<13); }
void Isr_Init(void) { int i = 0; struct s3c24x0_interrupt * const intregs = s3c24x0_get_base_interrupt(); for (i = 0; i < sizeof(isr_handle_array) / sizeof(isr_handle_array[0]); i++ ) { isr_handle_array[i] = Dummy_isr; } intregs->INTMOD=0x0; // All=IRQ mode intregs->INTMSK=BIT_ALLMSK; // All interrupt is masked. isr_handle_array[ISR_TIMER4_OFT] = IsrTimer4; isr_handle_array[ISR_WDT_OFT] = IsrWatchdog; //#ifdef CONFIG_USB_DEVICE isr_handle_array[ISR_USBD_OFT] = IsrUsbd; isr_handle_array[ISR_DMA2_OFT] = IsrDma2; ClearPending_my(BIT_DMA2); ClearPending_my(BIT_USBD); //#endif }
void IsrDma2() { struct s3c24x0_interrupt *intregs = s3c24x0_get_base_interrupt(); struct s3c24x0_usb_device *usbdevregs = s3c24x0_get_base_usb_device(); U8 out_csr3; U32 dwEmptyCnt; U8 saveIndexReg = usbdevregs->INDEX_REG; usbdevregs->INDEX_REG = 3; out_csr3 = usbdevregs->OUT_CSR1_REG; ClearPending_my((int)BIT_DMA2); if (!totalDmaCount) totalDmaCount = dwWillDMACnt + EP3_PKT_SIZE; else totalDmaCount += dwWillDMACnt; dwUSBBufWritePtr = ((dwUSBBufWritePtr + dwWillDMACnt - dwUSBBufBase) % dwUSBBufSize) + dwUSBBufBase; if (totalDmaCount >= downloadFileSize) { /* last */ totalDmaCount = downloadFileSize; ConfigEp3IntMode(); if (out_csr3 & EPO_OUT_PKT_READY) CLR_EP3_OUT_PKT_READY(); /* 关闭DMA2中断并重新开启USBD中断 */ intregs->INTMSK |= BIT_DMA2; intregs->INTMSK &= ~(BIT_USBD); } else { if ((totalDmaCount + 0x80000) < downloadFileSize) dwWillDMACnt = 0x80000; else dwWillDMACnt = downloadFileSize - totalDmaCount; dwEmptyCnt = (dwUSBBufReadPtr - dwUSBBufWritePtr - 1 + dwUSBBufSize) % dwUSBBufSize; if (dwEmptyCnt >= dwWillDMACnt) ConfigEp3DmaMode(dwUSBBufWritePtr, dwWillDMACnt); } usbdevregs->INDEX_REG = saveIndexReg; }
void IsrTimer4(void) { ClearPending_my(BIT_TIMER4); *(volatile int *)&g_TimerIntHappen = 1; }