/**
Restore SMM Configuration in S3 boot path.
**/
VOID
RestoreSmmConfigurationInS3 (
VOID
)
{
if (!mAcpiS3Enable) {
return;
}
//
// Restore SMM Configuration in S3 boot path.
//
if (mRestoreSmmConfigurationInS3) {
//
// Need make sure gSmst is correct because below function may use them.
//
gSmst->SmmStartupThisAp = gSmmCpuPrivate->SmmCoreEntryContext.SmmStartupThisAp;
gSmst->CurrentlyExecutingCpu = gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu;
gSmst->NumberOfCpus = gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;
gSmst->CpuSaveStateSize = gSmmCpuPrivate->SmmCoreEntryContext.CpuSaveStateSize;
gSmst->CpuSaveState = gSmmCpuPrivate->SmmCoreEntryContext.CpuSaveState;
//
// Configure SMM Code Access Check feature if available.
//
ConfigSmmCodeAccessCheck ();
SmmCpuFeaturesCompleteSmmReadyToLock ();
mRestoreSmmConfigurationInS3 = FALSE;
}
}
/**
Restore SMM Configuration.
**/
VOID
RestoreSmmConfigurationInS3 (
VOID
)
{
if (mRestoreSmmConfigurationInS3) {
//
// Configure SMM Code Access Check feature if available.
//
ConfigSmmCodeAccessCheck ();
mRestoreSmmConfigurationInS3 = FALSE;
}
}
/**
SMI handler for BSP.
@param CpuIndex BSP processor Index
@param SyncMode SMM MP sync mode
**/
VOID
BSPHandler (
IN UINTN CpuIndex,
IN SMM_CPU_SYNC_MODE SyncMode
)
{
UINTN Index;
MTRR_SETTINGS Mtrrs;
UINTN ApCount;
BOOLEAN ClearTopLevelSmiResult;
UINTN PresentCount;
ASSERT (CpuIndex == mSmmMpSyncData->BspIndex);
ApCount = 0;
//
// Flag BSP's presence
//
mSmmMpSyncData->InsideSmm = TRUE;
//
// Initialize Debug Agent to start source level debug in BSP handler
//
InitializeDebugAgent (DEBUG_AGENT_INIT_ENTER_SMI, NULL, NULL);
//
// Mark this processor's presence
//
mSmmMpSyncData->CpuData[CpuIndex].Present = TRUE;
//
// Clear platform top level SMI status bit before calling SMI handlers. If
// we cleared it after SMI handlers are run, we would miss the SMI that
// occurs after SMI handlers are done and before SMI status bit is cleared.
//
ClearTopLevelSmiResult = ClearTopLevelSmiStatus();
ASSERT (ClearTopLevelSmiResult == TRUE);
//
// Set running processor index
//
gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu = CpuIndex;
//
// If Traditional Sync Mode or need to configure MTRRs: gather all available APs.
//
if (SyncMode == SmmCpuSyncModeTradition || SmmCpuFeaturesNeedConfigureMtrrs()) {
//
// Wait for APs to arrive
//
SmmWaitForApArrival();
//
// Lock the counter down and retrieve the number of APs
//
mSmmMpSyncData->AllCpusInSync = TRUE;
ApCount = LockdownSemaphore (&mSmmMpSyncData->Counter) - 1;
//
// Wait for all APs to get ready for programming MTRRs
//
WaitForAllAPs (ApCount);
if (SmmCpuFeaturesNeedConfigureMtrrs()) {
//
// Signal all APs it's time for backup MTRRs
//
ReleaseAllAPs ();
//
// WaitForSemaphore() may wait for ever if an AP happens to enter SMM at
// exactly this point. Please make sure PcdCpuSmmMaxSyncLoops has been set
// to a large enough value to avoid this situation.
// Note: For HT capable CPUs, threads within a core share the same set of MTRRs.
// We do the backup first and then set MTRR to avoid race condition for threads
// in the same core.
//
MtrrGetAllMtrrs(&Mtrrs);
//
// Wait for all APs to complete their MTRR saving
//
WaitForAllAPs (ApCount);
//
// Let all processors program SMM MTRRs together
//
ReleaseAllAPs ();
//
// WaitForSemaphore() may wait for ever if an AP happens to enter SMM at
// exactly this point. Please make sure PcdCpuSmmMaxSyncLoops has been set
// to a large enough value to avoid this situation.
//
ReplaceOSMtrrs (CpuIndex);
//
// Wait for all APs to complete their MTRR programming
//
WaitForAllAPs (ApCount);
}
}
//
// The BUSY lock is initialized to Acquired state
//
AcquireSpinLockOrFail (&mSmmMpSyncData->CpuData[CpuIndex].Busy);
//
// Restore SMM Configuration in S3 boot path.
//
if (mRestoreSmmConfigurationInS3) {
//
// Configure SMM Code Access Check feature if available.
//
ConfigSmmCodeAccessCheck ();
mRestoreSmmConfigurationInS3 = FALSE;
}
//
// Invoke SMM Foundation EntryPoint with the processor information context.
//
gSmmCpuPrivate->SmmCoreEntry (&gSmmCpuPrivate->SmmCoreEntryContext);
//
// Make sure all APs have completed their pending none-block tasks
//
for (Index = mMaxNumberOfCpus; Index-- > 0;) {
if (Index != CpuIndex && mSmmMpSyncData->CpuData[Index].Present) {
AcquireSpinLock (&mSmmMpSyncData->CpuData[Index].Busy);
ReleaseSpinLock (&mSmmMpSyncData->CpuData[Index].Busy);;
}
}
//
// Perform the remaining tasks
//
PerformRemainingTasks ();
//
// If Relaxed-AP Sync Mode: gather all available APs after BSP SMM handlers are done, and
// make those APs to exit SMI synchronously. APs which arrive later will be excluded and
// will run through freely.
//
if (SyncMode != SmmCpuSyncModeTradition && !SmmCpuFeaturesNeedConfigureMtrrs()) {
//
// Lock the counter down and retrieve the number of APs
//
mSmmMpSyncData->AllCpusInSync = TRUE;
ApCount = LockdownSemaphore (&mSmmMpSyncData->Counter) - 1;
//
// Make sure all APs have their Present flag set
//
while (TRUE) {
PresentCount = 0;
for (Index = mMaxNumberOfCpus; Index-- > 0;) {
if (mSmmMpSyncData->CpuData[Index].Present) {
PresentCount ++;
}
}
if (PresentCount > ApCount) {
break;
}
}
}
//
// Notify all APs to exit
//
mSmmMpSyncData->InsideSmm = FALSE;
ReleaseAllAPs ();
//
// Wait for all APs to complete their pending tasks
//
WaitForAllAPs (ApCount);
if (SmmCpuFeaturesNeedConfigureMtrrs()) {
//
// Signal APs to restore MTRRs
//
ReleaseAllAPs ();
//
// Restore OS MTRRs
//
SmmCpuFeaturesReenableSmrr ();
MtrrSetAllMtrrs(&Mtrrs);
//
// Wait for all APs to complete MTRR programming
//
WaitForAllAPs (ApCount);
}
//
// Stop source level debug in BSP handler, the code below will not be
// debugged.
//
InitializeDebugAgent (DEBUG_AGENT_INIT_EXIT_SMI, NULL, NULL);
//
// Signal APs to Reset states/semaphore for this processor
//
ReleaseAllAPs ();
//
// Perform pending operations for hot-plug
//
SmmCpuUpdate ();
//
// Clear the Present flag of BSP
//
mSmmMpSyncData->CpuData[CpuIndex].Present = FALSE;
//
// Gather APs to exit SMM synchronously. Note the Present flag is cleared by now but
// WaitForAllAps does not depend on the Present flag.
//
WaitForAllAPs (ApCount);
//
// Reset BspIndex to -1, meaning BSP has not been elected.
//
if (FeaturePcdGet (PcdCpuSmmEnableBspElection)) {
mSmmMpSyncData->BspIndex = (UINT32)-1;
}
//
// Allow APs to check in from this point on
//
mSmmMpSyncData->Counter = 0;
mSmmMpSyncData->AllCpusInSync = FALSE;
}
