void usbMscInit(){
// Register the host class drivers.
//
USBHCDRegisterDrivers(USB_INSTANCE_FOR_USBDISK, g_ppHostClassDrivers, NUM_CLASS_DRIVERS);
//
// Open an instance of the mass storage class driver.
//
g_ulMSCInstance = USBHMSCDriveOpen(USB_INSTANCE_FOR_USBDISK, USB_INSTANCE_FOR_USBDISK, MSCCallback);
//
// Initialize the power configuration. This sets the power enable signal
// to be active high and does not enable the power fault.
//
USBHCDPowerConfigInit(USB_INSTANCE_FOR_USBDISK, USBHCD_VBUS_AUTO_HIGH);
#if USB_USE_CPPI41DMA
Cppi41DmaInit(USB_INSTANCE_FOR_USBDISK, epInfo, NUMBER_OF_ENDPOINTS);
#endif
//
// Initialize the host controller.
//
USBHCDInit(USB_INSTANCE_FOR_USBDISK, g_pHCDPool, HCD_MEMORY_SIZE);
}
static void initialize(intptr_t unused) {
// Initialize USB OTG
HWREG(CFGCHIP2_USBPHYCTRL) &= ~SYSCFG_CFGCHIP2_USB0OTGMODE;
HWREG(CFGCHIP2_USBPHYCTRL) |= CFGCHIP2_FORCE_DEVICE; // Force USB device operation
HWREG(CFGCHIP2_USBPHYCTRL) |= CFGCHIP2_REFFREQ_24MHZ; // 24 MHz OSCIN
g_sMSCDevice.sMediaFunctions = usbmsc_media_functions_dummy;
USBDMSCInit(0, (tUSBDMSCDevice *)&g_sMSCDevice);
#if defined(DMA_MODE)
Cppi41DmaInit(USB_INSTANCE, epInfo, NUMBER_OF_ENDPOINTS);
for(;g_bufferIndex < NUM_OF_RX_BDs; g_bufferIndex++)
{
unsigned char *dataBuffer = (unsigned char *)cppiDmaAllocBuffer();
doDmaRxTransfer(USB_INSTANCE, USB_MSC_BUFER_SIZE, dataBuffer,
g_sMSCDevice.psPrivateData->ucOUTEndpoint);
}
#endif
// dump_usbmsc();
#if defined(DEBUG_USBMSC)
syslog(LOG_EMERG, "usbmsc_dri initialized.");
#endif
}
//*****************************************************************************
//
// This is the main loop that runs the application.
//
//*****************************************************************************
int
main(void)
{
#ifdef DMA_MODE
MMUConfigAndEnable();
/* Enable Data Cache */
CacheEnable(CACHE_DCACHE);
#endif
//
//USB module clock enable
//
USB0ModuleClkConfig();
//
//USB Interrupt enable
//
USBInterruptEnable();
//
//Delay timer setup
//
DelayTimerSetup();
//
// Initialize the idle timeout and reset all flags.
//
//g_ulIdleTimeout = 0;
g_ulFlags = 0;
//
// Initialize the state to idle.
//
g_eMSCState = MSC_DEV_IDLE;
USBDMSCInit(0, (tUSBDMSCDevice *)&g_sMSCDevice);
#ifdef DMA_MODE
Cppi41DmaInit(USB_INSTANCE, epInfo, NUMBER_OF_ENDPOINTS);
for(;g_bufferIndex < NUM_OF_RX_BDs; g_bufferIndex++)
{
dataBuffer = (unsigned char *)cppiDmaAllocBuffer();
doDmaRxTransfer(USB_INSTANCE, USB_MSC_BUFER_SIZE, dataBuffer,
g_sMSCDevice.psPrivateData->ucOUTEndpoint);
}
#endif
//
// Drop into the main loop.
//
while(1);
}
//*****************************************************************************
//
// This is the main loop that runs the application.
//
//*****************************************************************************
int
main(void)
{
unsigned int i;
unsigned char *src, *dest;
/* MMU needs to be turned on to provide HW support unaligned
access to USB structures */
MMUConfigAndEnable();
/* Enable Data Cache */
CacheEnable(CACHE_ALL);
//
//USB module clock enable
//
USB0ModuleClkConfig();
//
//USB Interrupt enable
//
USBInterruptEnable();
//
//Delay timer setup
//
DelayTimerSetup();
CacheDataCleanInvalidateAll();
USBDMSCInit(0, (tUSBDMSCDevice *)&g_sMSCDevice);
#ifdef DMA_MODE
Cppi41DmaInit(USB_INSTANCE, epInfo, NUMBER_OF_ENDPOINTS);
for(;g_bufferIndex < NUM_OF_RX_BDs; g_bufferIndex++)
{
dataBuffer = (unsigned char *)cppiDmaAllocBuffer();
doDmaRxTransfer(USB_INSTANCE, USB_MSC_BUFER_SIZE, dataBuffer,
g_sMSCDevice.psPrivateData->ucOUTEndpoint);
}
#endif
while(1)
{
}
}
//*****************************************************************************
//
// This is the main loop that runs the application.
//
//*****************************************************************************
static int
main(void)
{
// tRectangle sRect;
unsigned int index, i;
unsigned char *src, *dest;
/* Sets up 'Level 1" page table entries.
* The page table entry consists of the base address of the page
* and the attributes for the page. The following operation is to
* setup one-to-one mapping page table for DDR memeory range and set
* the atributes for the same. The DDR memory range is from 0xC0000000
* to 0xDFFFFFFF. Thus the base of the page table ranges from 0xC00 to
* 0xDFF. Cache(C bit) and Write Buffer(B bit) are enabled only for
* those page table entries which maps to DDR RAM and internal RAM.
* All the pages in the DDR range are provided with R/W permissions
*/
#ifdef DMA_MODE
for(index = 0; index < (4*1024); index++)
{
if((index >= 0xC00 && index < 0xE00)|| (index == 0x800))
{
pageTable[index] = (index << 20) | 0x00000C1E;
}
else
{
pageTable[index] = (index << 20) | 0x00000C12;
}
}
/* Configures translation table base register
* with pagetable base address.
*/
CP15TtbSet((unsigned int )pageTable);
/* Enables MMU */
CP15MMUEnable();
/* Enable Data Cache */
CP15DCacheEnable();
/* Disable Instruction Cache*/
CP15ICacheDisable();
#endif
#if 0 // No LCD -- ertl-liyixiao
//
//configures arm interrupt controller to generate raster interrupt
//
SetupIntc();
//
//Configures raster to display image
//
SetUpLCD();
/* configuring the base ceiling */
RasterDMAFBConfig(SOC_LCDC_0_REGS,
(unsigned int)(g_pucBuffer+PALETTE_OFFSET),
(unsigned int)(g_pucBuffer+PALETTE_OFFSET) + sizeof(g_pucBuffer) - 2 - PALETTE_OFFSET,
0);
RasterDMAFBConfig(SOC_LCDC_0_REGS,
(unsigned int)(g_pucBuffer+PALETTE_OFFSET),
(unsigned int)(g_pucBuffer+PALETTE_OFFSET) + sizeof(g_pucBuffer) - 2 - PALETTE_OFFSET,
1);
// Copy palette info into buffer
src = (unsigned char *) palette_32b;
dest = (unsigned char *) (g_pucBuffer+PALETTE_OFFSET);
for( i = 4; i < (PALETTE_SIZE+4); i++)
{
*dest++ = *src++;
}
GrOffScreen16BPPInit(&g_sSHARP480x272x16Display, g_pucBuffer, LCD_WIDTH, LCD_HEIGHT);
// Initialize a drawing context.
GrContextInit(&g_sContext, &g_sSHARP480x272x16Display);
/* enable End of frame interrupt */
RasterEndOfFrameIntEnable(SOC_LCDC_0_REGS);
/* enable raster */
RasterEnable(SOC_LCDC_0_REGS);
ConfigRasterDisplayEnable();
//
// Fill the top 15 rows of the screen with blue to create the banner.
//
sRect.sXMin = 0;
sRect.sYMin = 0;
sRect.sXMax = GrContextDpyWidthGet(&g_sContext) - 1;
sRect.sYMax = DISPLAY_BANNER_HEIGHT;
GrContextForegroundSet(&g_sContext, ClrDarkBlue);
GrRectFill(&g_sContext, &sRect);
//
// Put a white box around the banner.
//
GrContextForegroundSet(&g_sContext, ClrWhite);
GrRectDraw(&g_sContext, &sRect);
//
// Put the application name in the middle of the banner.
//
GrContextFontSet(&g_sContext, &g_sFontCm20);
GrStringDrawCentered(&g_sContext, "usb-dev-msc", -1,
GrContextDpyWidthGet(&g_sContext) / 2, 10, 0);
//
// Initialize the idle timeout and reset all flags.
//
g_ulIdleTimeout = 0;
g_ulFlags = 0;
//
// Initialize the state to idle.
//
g_eMSCState = MSC_DEV_IDLE;
//
// Draw the status bar and set it to idle.
//
UpdateStatus("Idle", 1);
#endif
//SetupAINTCInt();
//ConfigureAINTCIntUSB();
//DelayTimerSetup();
#if 0 // No LCD
SystickConfigure(SysTickHandler);
SystickPeriodSet(10);
SystickEnable();
#endif
USBDMSCInit(0, (tUSBDMSCDevice *)&g_sMSCDevice);
#ifdef DMA_MODE
Cppi41DmaInit(USB_INSTANCE, epInfo, NUMBER_OF_ENDPOINTS);
for(;g_bufferIndex < NUM_OF_RX_BDs; g_bufferIndex++)
{
dataBuffer = (unsigned char *)cppiDmaAllocBuffer();
doDmaRxTransfer(USB_INSTANCE, USB_MSC_BUFER_SIZE, dataBuffer,
g_sMSCDevice.psPrivateData->ucOUTEndpoint);
}
#endif
#if 0 // No LCD -- ertl-liyixiao
//
// Drop into the main loop.
//
//
// Drop into the main loop.
//
while(1)
{
switch(g_eMSCState)
{
case MSC_DEV_READ:
{
//
// Update the screen if necessary.
//
if(g_ulFlags & FLAG_UPDATE_STATUS)
{
UpdateStatus("Reading", 0);
g_ulFlags &= ~FLAG_UPDATE_STATUS;
}
//
// If there is no activity then return to the idle state.
//
if(g_ulIdleTimeout == 0)
{
UpdateStatus("Idle ", 0);
g_eMSCState = MSC_DEV_IDLE;
}
break;
}
case MSC_DEV_WRITE:
{
//
// Update the screen if necessary.
//
if(g_ulFlags & FLAG_UPDATE_STATUS)
{
UpdateStatus("Writing ", 0);
g_ulFlags &= ~FLAG_UPDATE_STATUS;
}
//
// If there is no activity then return to the idle state.
//
if(g_ulIdleTimeout == 0)
{
UpdateStatus("Idle ", 0);
g_eMSCState = MSC_DEV_IDLE;
}
break;
}
case MSC_DEV_IDLE:
default:
{
break;
}
}
}
#endif
}
