static void configureRxChan(int fftc_ix){
uint8_t isAllocated;
/* The Rx channel is mapped one to one with Tx channel.
* We need to open and enable this one too.
*/
Cppi_RxChInitCfg rxChInitCfg;
rxChInitCfg.channelNum = 0;
rxChInitCfg.rxEnable = Cppi_ChState_CHANNEL_DISABLE;
if ((hCppiRxChan[fftc_ix] = Cppi_rxChannelOpen (hCppi[fftc_ix], &rxChInitCfg, &isAllocated)) == NULL) {
printf ("Error opening Rx channel: %d \n", 0);
}
}
/** ============================================================================
* @n@b Init_Cppi
*
* @b Description
* @n This API initializes the CPPI LLD, opens the PASS CPDMA and opens up
* the Tx, Rx channels required for data transfers.
*
* @param[in]
* @n None
*
* @return Int32
* -1 - Error
* 0 - Success
* =============================================================================
*/
Int32 Init_Cppi (Void)
{
Int32 result, i;
Cppi_CpDmaInitCfg cpdmaCfg;
UInt8 isAllocated;
Cppi_TxChInitCfg txChCfg;
Cppi_RxChInitCfg rxChInitCfg;
/* Initialize CPPI LLD */
result = Cppi_init (cppiGblCfgParams);
if (result != CPPI_SOK)
{
uart_write ("Error initializing CPPI LLD, Error code : %d\n", result);
return -1;
}
/* Initialize PASS CPDMA */
memset (&cpdmaCfg, 0, sizeof (Cppi_CpDmaInitCfg));
cpdmaCfg.dmaNum = Cppi_CpDma_PASS_CPDMA;
if ((gCpdmaHnd = Cppi_open (&cpdmaCfg)) == NULL)
{
uart_write ("Error initializing CPPI for PASS CPDMA %d \n", cpdmaCfg.dmaNum);
return -1;
}
else
uart_write ("Initialized CPPI for PASS CPDMA instance %d Handle %p \n",cpdmaCfg.dmaNum,gCpdmaHnd);
/* Open all CPPI Tx Channels. These will be used to send data to PASS/CPSW */
for (i = 0; i < NUM_PA_TX_QUEUES; i ++)
{
txChCfg.channelNum = i; /* CPPI channels are mapped one-one to the PA Tx queues */
txChCfg.txEnable = Cppi_ChState_CHANNEL_DISABLE; /* Disable the channel for now. */
txChCfg.filterEPIB = 0;
txChCfg.filterPS = 0;
txChCfg.aifMonoMode = 0;
txChCfg.priority = 2;
if ((gCpdmaTxChanHnd[i] = Cppi_txChannelOpen (gCpdmaHnd, &txChCfg, &isAllocated)) == NULL)
{
uart_write ("Error opening Tx channel %d\n", txChCfg.channelNum);
return -1;
}
else
uart_write ("Opened a Tx channel %d Handle %p \n", txChCfg.channelNum,gCpdmaTxChanHnd[i]);
Cppi_channelEnable (gCpdmaTxChanHnd[i]);
}
/* Open all CPPI Rx channels. These will be used by PA to stream data out. */
for (i = 0; i < NUM_PA_RX_CHANNELS; i++)
{
/* Open a CPPI Rx channel that will be used by PA to stream data out. */
rxChInitCfg.channelNum = i;
rxChInitCfg.rxEnable = Cppi_ChState_CHANNEL_DISABLE;
if ((gCpdmaRxChanHnd[i] = Cppi_rxChannelOpen (gCpdmaHnd, &rxChInitCfg, &isAllocated)) == NULL)
{
uart_write ("Error opening Rx channel: %d \n", rxChInitCfg.channelNum);
return -1;
}
else
uart_write ("Opened a Rx channel %d Handle %p \n", rxChInitCfg.channelNum,gCpdmaRxChanHnd[i]);
/* Also enable Rx Channel */
Cppi_channelEnable (gCpdmaRxChanHnd[i]);
}
/* Clear CPPI Loobpack bit in PASS CDMA Global Emulation Control Register */
Cppi_setCpdmaLoopback(gCpdmaHnd, 0);
/* CPPI Init Done. Return success */
return 0;
}