s->phys_mem_read = ledma_memory_read;
s->phys_mem_write = ledma_memory_write;
return pcnet_common_init(&dev->qdev, s, &net_lance_info);
}
static void lance_reset(DeviceState *dev)
{
SysBusPCNetState *d = DO_UPCAST(SysBusPCNetState, busdev.qdev, dev);
pcnet_h_reset(&d->state);
}
static SysBusDeviceInfo lance_info = {
.init = lance_init,
.qdev.name = "lance",
.qdev.size = sizeof(SysBusPCNetState),
.qdev.reset = lance_reset,
.qdev.vmsd = &vmstate_lance,
.qdev.props = (Property[]) {
DEFINE_PROP_PTR("dma", SysBusPCNetState, state.dma_opaque),
DEFINE_NIC_PROPERTIES(SysBusPCNetState, state.conf),
DEFINE_PROP_END_OF_LIST(),
}
};
static void lance_register_devices(void)
{
sysbus_register_withprop(&lance_info);
}
device_init(lance_register_devices)
memory_region_init_io(&s->iomem, OBJECT(s), &stm32_exti_ops, s,
"exti", 0x03ff);
sysbus_init_mmio(dev, &s->iomem);
for(i = 0; i < EXTI_IRQ_COUNT; i++) {
sysbus_init_irq(dev, &s->irq[i]);
}
qdev_init_gpio_in(DEVICE(dev), stm32_exti_gpio_in_handler, EXTI_LINE_COUNT);
return 0;
}
static Property stm32_exti_properties[] = {
DEFINE_PROP_PTR("stm32_gpio", Stm32Exti, stm32_gpio_prop),
DEFINE_PROP_END_OF_LIST()
};
static void stm32_exti_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = stm32_exti_init;
dc->reset = stm32_exti_reset;
dc->props = stm32_exti_properties;
}
static TypeInfo stm32_exti_info = {
.name = "stm32_exti",
}
static const VMStateDescription vmstate_dp8393x = {
.name = "dp8393x",
.version_id = 0,
.minimum_version_id = 0,
.fields = (VMStateField []) {
VMSTATE_BUFFER_UNSAFE(cam, dp8393xState, 0, 16 * 6),
VMSTATE_UINT16_ARRAY(regs, dp8393xState, 0x40),
VMSTATE_END_OF_LIST()
}
};
static Property dp8393x_properties[] = {
DEFINE_NIC_PROPERTIES(dp8393xState, conf),
DEFINE_PROP_PTR("dma_mr", dp8393xState, dma_mr),
DEFINE_PROP_UINT8("it_shift", dp8393xState, it_shift, 0),
DEFINE_PROP_END_OF_LIST(),
};
static void dp8393x_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
dc->realize = dp8393x_realize;
dc->reset = dp8393x_reset;
dc->vmsd = &vmstate_dp8393x;
dc->props = dp8393x_properties;
/* Reason: dma_mr property can't be set */
dc->user_creatable = false;
sysbus_init_mmio(sbd, &s->mmio);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
s->nic = qemu_new_nic(&net_etraxfs_info, &s->conf,
object_get_typename(OBJECT(s)), dev->id, s);
qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a);
tdk_init(&s->phy);
mdio_attach(&s->mdio_bus, &s->phy, s->phyaddr);
return 0;
}
static Property etraxfs_eth_properties[] = {
DEFINE_PROP_UINT32("phyaddr", ETRAXFSEthState, phyaddr, 1),
DEFINE_PROP_PTR("dma_out", ETRAXFSEthState, vdma_out),
DEFINE_PROP_PTR("dma_in", ETRAXFSEthState, vdma_in),
DEFINE_NIC_PROPERTIES(ETRAXFSEthState, conf),
DEFINE_PROP_END_OF_LIST(),
};
static void etraxfs_eth_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = fs_eth_init;
dc->props = etraxfs_eth_properties;
/* Reason: pointer properties "dma_out", "dma_in" */
dc->user_creatable = false;
}
return eeprom_receive_byte(dev);
}
static int smbus_eeprom_init(SMBusDevice *dev)
{
SMBusEEPROMDevice *eeprom = (SMBusEEPROMDevice *)dev;
eeprom->offset = 0;
return 0;
}
static SMBusDeviceInfo smbus_eeprom_info = {
.i2c.qdev.name = "smbus-eeprom",
.i2c.qdev.size = sizeof(SMBusEEPROMDevice),
.i2c.qdev.props = (Property[]) {
DEFINE_PROP_PTR("data", SMBusEEPROMDevice, data),
DEFINE_PROP_END_OF_LIST(),
},
.init = smbus_eeprom_init,
.quick_cmd = eeprom_quick_cmd,
.send_byte = eeprom_send_byte,
.receive_byte = eeprom_receive_byte,
.write_data = eeprom_write_data,
.read_data = eeprom_read_data
};
static void smbus_eeprom_register_devices(void)
{
smbus_register_device(&smbus_eeprom_info);
}
VMSTATE_UINT32(esr, APICCommonState),
VMSTATE_UINT32_ARRAY(icr, APICCommonState, 2),
VMSTATE_UINT32(divide_conf, APICCommonState),
VMSTATE_INT32(count_shift, APICCommonState),
VMSTATE_UINT32(initial_count, APICCommonState),
VMSTATE_INT64(initial_count_load_time, APICCommonState),
VMSTATE_INT64(next_time, APICCommonState),
VMSTATE_INT64(timer_expiry,
APICCommonState), /* open-coded timer state */
VMSTATE_END_OF_LIST()
}
};
static Property apic_properties_common[] = {
DEFINE_PROP_UINT8("id", APICCommonState, id, -1),
DEFINE_PROP_PTR("cpu_env", APICCommonState, cpu_env),
DEFINE_PROP_BIT("vapic", APICCommonState, vapic_control, VAPIC_ENABLE_BIT,
true),
DEFINE_PROP_END_OF_LIST(),
};
static void apic_common_class_init(ObjectClass *klass, void *data)
{
SysBusDeviceClass *sc = SYS_BUS_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_apic_common;
dc->reset = apic_reset_common;
dc->no_user = 1;
dc->props = apic_properties_common;
sc->init = apic_init_common;
sysbus_init_irq(dev, &s->irq);
dma_io_memory = cpu_register_io_memory(dma_mem_read, dma_mem_write, s);
sysbus_init_mmio(dev, DMA_SIZE, dma_io_memory);
qdev_init_gpio_in(&dev->qdev, dma_set_irq, 1);
qdev_init_gpio_out(&dev->qdev, &s->dev_reset, 1);
return 0;
}
static SysBusDeviceInfo sparc32_dma_info = {
.init = sparc32_dma_init1,
.qdev.name = "sparc32_dma",
.qdev.size = sizeof(DMAState),
.qdev.vmsd = &vmstate_dma,
.qdev.reset = dma_reset,
.qdev.props = (Property[]) {
DEFINE_PROP_PTR("iommu_opaque", DMAState, iommu),
DEFINE_PROP_END_OF_LIST(),
}
};
static void sparc32_dma_register_devices(void)
{
sysbus_register_withprop(&sparc32_dma_info);
}
device_init(sparc32_dma_register_devices)
update_irq(pv);
}
static int altera_iic_init(SysBusDevice *dev)
{
AlteraIIC *pv = ALTERA_IIC(dev);
qdev_init_gpio_in(DEVICE(pv), irq_handler, 32);
sysbus_init_irq(dev, &pv->parent_irq);
return 0;
}
static Property altera_iic_properties[] = {
DEFINE_PROP_PTR("cpu", AlteraIIC, cpu),
DEFINE_PROP_END_OF_LIST(),
};
static void altera_iic_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = altera_iic_init;
dc->props = altera_iic_properties;
}
static TypeInfo altera_iic_info = {
.name = "altera,iic",
.parent = TYPE_SYS_BUS_DEVICE,
static int vmmouse_initfn(ISADevice *dev)
{
VMMouseState *s = DO_UPCAST(VMMouseState, dev, dev);
DPRINTF("vmmouse_init\n");
vmport_register(VMMOUSE_STATUS, vmmouse_ioport_read, s);
vmport_register(VMMOUSE_COMMAND, vmmouse_ioport_read, s);
vmport_register(VMMOUSE_DATA, vmmouse_ioport_read, s);
return 0;
}
static Property vmmouse_properties[] = {
DEFINE_PROP_PTR("ps2_mouse", VMMouseState, ps2_mouse),
DEFINE_PROP_END_OF_LIST(),
};
static void vmmouse_class_initfn(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
ISADeviceClass *ic = ISA_DEVICE_CLASS(klass);
ic->init = vmmouse_initfn;
dc->no_user = 1;
dc->reset = vmmouse_reset;
dc->vmsd = &vmstate_vmmouse;
dc->props = vmmouse_properties;
}
static TypeInfo vmmouse_info = {
