Esempio n. 1
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	}
}

static void set_dma_channel(device_t *device, int channel, int state)
{
	if (!state) dma_channel = channel;
}

static WRITE_LINE_DEVICE_HANDLER( pc_dack0_w ) { set_dma_channel(device, 0, state); }
static WRITE_LINE_DEVICE_HANDLER( pc_dack1_w ) { set_dma_channel(device, 1, state); }
static WRITE_LINE_DEVICE_HANDLER( pc_dack2_w ) { set_dma_channel(device, 2, state); }
static WRITE_LINE_DEVICE_HANDLER( pc_dack3_w ) { set_dma_channel(device, 3, state); }

static I8237_INTERFACE( dma8237_1_config )
{
	DEVCB_LINE(pc_dma_hrq_changed),
	DEVCB_NULL,
	DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_read_byte),
	DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_write_byte),
	{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
	{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
	{ DEVCB_LINE(pc_dack0_w), DEVCB_LINE(pc_dack1_w), DEVCB_LINE(pc_dack2_w), DEVCB_LINE(pc_dack3_w) }
};

static I8237_INTERFACE( dma8237_2_config )
{
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
Esempio n. 2
0
};

static GFXDECODE_START( mugsmash )
	GFXDECODE_ENTRY( "gfx1", 0, mugsmash_layout,   0x00, 16  ) /* sprites */
	GFXDECODE_ENTRY( "gfx2", 0, mugsmash2_layout,  0x100, 256  ) /* bg tiles */
GFXDECODE_END

static void irq_handler(device_t *device, int irq)
{
	mugsmash_state *state = device->machine().driver_data<mugsmash_state>();
	device_set_input_line(state->m_audiocpu, 0 , irq ? ASSERT_LINE : CLEAR_LINE );
}

static const ym2151_interface ym2151_config =
{
	DEVCB_LINE(irq_handler)
};

static MACHINE_START( mugsmash )
{
	mugsmash_state *state = machine.driver_data<mugsmash_state>();

	state->m_maincpu = machine.device("maincpu");
	state->m_audiocpu = machine.device("audiocpu");
}

static MACHINE_CONFIG_START( mugsmash, mugsmash_state )

	MCFG_CPU_ADD("maincpu", M68000, 12000000)
	MCFG_CPU_PROGRAM_MAP(mugsmash_map)
	MCFG_CPU_VBLANK_INT("screen", irq6_line_hold)
Esempio n. 3
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const via6522_interface sym1_via0 =
{
	DEVCB_NULL,           /* VIA Port A Input */
	DEVCB_DRIVER_MEMBER(sym1_state,sym1_via0_b_r),  /* VIA Port B Input */
	DEVCB_NULL,           /* VIA Port CA1 Input */
	DEVCB_NULL,           /* VIA Port CB1 Input */
	DEVCB_NULL,           /* VIA Port CA2 Input */
	DEVCB_NULL,           /* VIA Port CB2 Input */
	DEVCB_NULL,           /* VIA Port A Output */
	DEVCB_DRIVER_MEMBER(sym1_state,sym1_via0_b_w),  /* VIA Port B Output */
	DEVCB_NULL,           /* VIA Port CA1 Output */
	DEVCB_NULL,           /* VIA Port CB1 Output */
	DEVCB_NULL,           /* VIA Port CA2 Output */
	DEVCB_NULL,           /* VIA Port CB2 Output */
	DEVCB_LINE(sym1_irq)        /* VIA IRQ Callback */
};


const via6522_interface sym1_via1 =
{
	DEVCB_NULL,           /* VIA Port A Input */
	DEVCB_NULL,           /* VIA Port B Input */
	DEVCB_NULL,           /* VIA Port CA1 Input */
	DEVCB_NULL,           /* VIA Port CB1 Input */
	DEVCB_NULL,           /* VIA Port CA2 Input */
	DEVCB_NULL,           /* VIA Port CB2 Input */
	DEVCB_NULL,           /* VIA Port A Output */
	DEVCB_NULL,           /* VIA Port B Output */
	DEVCB_NULL,           /* VIA Port CA1 Output */
	DEVCB_NULL,           /* VIA Port CB1 Output */
Esempio n. 4
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	bbc_state *driver_state = device->machine().driver_data<bbc_state>();
	driver_state->m_acia_irq = state;

	driver_state->check_interrupts();
}

static ACIA6850_INTERFACE( bbc_acia6850_interface )
{
	0,
	0,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_LINE(bbcb_acia6850_irq_w)
};

static LEGACY_FLOPPY_OPTIONS_START(bbc)
	LEGACY_FLOPPY_OPTION(bbc, "ssd,bbc,img", "BBC disk image", basicdsk_identify_default, basicdsk_construct_default, NULL,
		HEADS([1])
		TRACKS([80])
		SECTORS([10])
		SECTOR_LENGTH([256])
		FIRST_SECTOR_ID([0]))
LEGACY_FLOPPY_OPTIONS_END

static const floppy_interface bbc_floppy_interface =
{
	DEVCB_NULL,
	DEVCB_NULL,
Esempio n. 5
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	GFXDECODE_ENTRY( "gfx1", 0, tile_8x8_layout,     0x100, 32 )	/* Tiles (8x8) */
	GFXDECODE_ENTRY( "gfx1", 0, tile_16x16_layout,   0x100, 32 )	/* Tiles (16x16) */
	GFXDECODE_ENTRY( "gfx2", 0, spritelayout,        0, 16 )	/* Sprites (16x16) */
GFXDECODE_END

/******************************************************************************/

static void sound_irq(device_t *device, int state)
{
	supbtime_state *driver_state = device->machine().driver_data<supbtime_state>();
	device_set_input_line(driver_state->m_audiocpu, 1, state); /* IRQ 2 */
}

static const ym2151_interface ym2151_config =
{
	DEVCB_LINE(sound_irq)
};

static const deco16ic_interface supbtime_deco16ic_tilegen1_intf =
{
	"screen",
	0, 1,
	0x0f, 0x0f,	/* trans masks (default values) */
	0, 16, /* color base (default values) */
	0x0f, 0x0f,	/* color masks (default values) */
	NULL, NULL,
	0,1
};

static MACHINE_START( supbtime )
{
Esempio n. 6
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static WRITE_LINE_DEVICE_HANDLER( nascom2_fdc_intrq_w )
{
	nascom1_state *drvstate = device->machine().driver_data<nascom1_state>();
	drvstate->m_nascom2_fdc.irq = state;
}

static WRITE_LINE_DEVICE_HANDLER( nascom2_fdc_drq_w )
{
	nascom1_state *drvstate = device->machine().driver_data<nascom1_state>();
	drvstate->m_nascom2_fdc.drq = state;
}

const wd17xx_interface nascom2_wd17xx_interface =
{
	DEVCB_LINE_VCC,
	DEVCB_LINE(nascom2_fdc_intrq_w),
	DEVCB_LINE(nascom2_fdc_drq_w),
	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
};


READ8_MEMBER(nascom1_state::nascom2_fdc_select_r)
{
	return m_nascom2_fdc.select | 0xa0;
}


WRITE8_MEMBER(nascom1_state::nascom2_fdc_select_w)
{
	device_t *fdc = machine().device("wd1793");
	m_nascom2_fdc.select = data;
Esempio n. 7
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	space->write_byte(page_offset + offset, data);
}

static void set_dma_channel(device_t *device, int channel, int state)
{
	if (!state) dma_channel = channel;
}

static WRITE_LINE_DEVICE_HANDLER( pc_dack0_w ) { set_dma_channel(device, 0, state); }
static WRITE_LINE_DEVICE_HANDLER( pc_dack1_w ) { set_dma_channel(device, 1, state); }
static WRITE_LINE_DEVICE_HANDLER( pc_dack2_w ) { set_dma_channel(device, 2, state); }
static WRITE_LINE_DEVICE_HANDLER( pc_dack3_w ) { set_dma_channel(device, 3, state); }

static I8237_INTERFACE( dma8237_1_config )
{
	DEVCB_LINE(pc_dma_hrq_changed),
	DEVCB_NULL,
	DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_read_byte),
	DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_write_byte),
	{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
	{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
	{ DEVCB_LINE(pc_dack0_w), DEVCB_LINE(pc_dack1_w), DEVCB_LINE(pc_dack2_w), DEVCB_LINE(pc_dack3_w) }
};

static I8237_INTERFACE( dma8237_2_config )
{
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
Esempio n. 8
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/*************************************
 *
 *  Sound Interfaces
 *
 *************************************/

static void dd3_ymirq_handler(device_t *device, int irq)
{
	ddragon3_state *state = device->machine().driver_data<ddragon3_state>();
	device_set_input_line(state->m_audiocpu, 0 , irq ? ASSERT_LINE : CLEAR_LINE );
}

static const ym2151_interface ym2151_config =
{
	DEVCB_LINE(dd3_ymirq_handler)
};

/*************************************
 *
 *  Interrupt Generators
 *
 *************************************/

static TIMER_DEVICE_CALLBACK( ddragon3_scanline )
{
	ddragon3_state *state = timer.machine().driver_data<ddragon3_state>();
	int scanline = param;

	/* An interrupt is generated every 16 scanlines */
	if (scanline % 16 == 0)
Esempio n. 9
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ADDRESS_MAP_END

/*************************************************************
 *
 * pic8259 configuration
 *
 *************************************************************/

static WRITE_LINE_DEVICE_HANDLER( quakeat_pic8259_1_set_int_line )
{
	cputag_set_input_line(device->machine, "maincpu", 0, state ? HOLD_LINE : CLEAR_LINE);
}

static const struct pic8259_interface quakeat_pic8259_1_config =
{
	DEVCB_LINE(quakeat_pic8259_1_set_int_line)
};

static const struct pic8259_interface quakeat_pic8259_2_config =
{
	DEVCB_DEVICE_LINE("pic8259_1", pic8259_ir2_w)
};

/*************************************************************/

static INPUT_PORTS_START( quake )
INPUT_PORTS_END

/*************************************************************/

static IRQ_CALLBACK(irq_callback)
Esempio n. 10
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#include "emu.h"
#include "cpc_ssa1.h"
#include "includes/amstrad.h"

//**************************************************************************
//  DEVICE DEFINITIONS
//**************************************************************************

const device_type CPC_SSA1 = &device_creator<cpc_ssa1_device>;
const device_type CPC_DKSPEECH = &device_creator<cpc_dkspeech_device>;

CPC_EXPANSION_INTERFACE(sub_exp_intf)
{
	DEVCB_LINE(cpc_irq_w),
	DEVCB_LINE(cpc_nmi_w),
	DEVCB_NULL,  // RESET
	DEVCB_LINE(cpc_romdis),  // ROMDIS
	DEVCB_LINE(cpc_romen)  // /ROMEN
};

//-------------------------------------------------
//  device I/O handlers
//-------------------------------------------------

READ8_MEMBER(cpc_ssa1_device::ssa1_r)
{
	UINT8 ret = 0xff;

	if(get_sby() == 0)
Esempio n. 11
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	DEVCB_NULL,
	DEVCB_HANDLER(irisha_8255_portb_r),
	DEVCB_HANDLER(irisha_8255_portc_r),
	DEVCB_HANDLER(irisha_8255_porta_w),
	DEVCB_HANDLER(irisha_8255_portb_w),
	DEVCB_HANDLER(irisha_8255_portc_w),
};

static WRITE_LINE_DEVICE_HANDLER( irisha_pic_set_int_line )
{
	cputag_set_input_line(device->machine(), "maincpu", 0, state ? HOLD_LINE : CLEAR_LINE);
}

const struct pic8259_interface irisha_pic8259_config =
{
	DEVCB_LINE(irisha_pic_set_int_line)
};

const struct pit8253_config irisha_pit8253_intf =
{
	{
		{
			0,
			DEVCB_NULL,
			DEVCB_NULL
		},
		{
			0,
			DEVCB_NULL,
			DEVCB_NULL
		},
Esempio n. 12
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/* Timestamp of last INTL4 change. The vector CPU runs for
   the delta between this and now.
*/

/* State of the priority encoder output */

/* Result of the last ADC channel sampled */

/* 8254 timer config */
const struct pit8253_config vertigo_pit8254_config =
{
    {
        {
            240000,
            DEVCB_NULL,
            DEVCB_LINE(v_irq4_w)
        }, {
            240000,
            DEVCB_NULL,
            DEVCB_LINE(v_irq3_w)
        }, {
            240000,
            DEVCB_NULL,
            DEVCB_NULL
        }
    }
};



/*************************************
Esempio n. 13
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    port B:
        bits 7-0: input/output: pbus
    port C:
        CA1: N/C
        CA2: input: "TDISP" (one of the higher bits in the video line counter, a mirror of the D5 bit from beezer_line_r), done in /video/beezer.c
        CB1: ASH1 to via 1
        CB2: ASH2 to via 1
    /IRQ: to main m6809 cpu
    /RES: from main reset generator/watchdog/button

    TODO: find a better way to attach ca2 read to beezer_line_r
    */
const via6522_interface b_via_0_interface =
{
	/*inputs : A/B         */ DEVCB_HANDLER(b_via_0_pa_r), DEVCB_HANDLER(b_via_0_pb_r),
	/*inputs : CA/B1,CA/B2 */ DEVCB_NULL, DEVCB_DEVICE_LINE_MEMBER("via6522_1", via6522_device, read_ca2), DEVCB_LINE(b_via_0_ca2_r), DEVCB_DEVICE_LINE_MEMBER("via6522_1", via6522_device, read_ca1),
	/*outputs: A/B         */ DEVCB_HANDLER(b_via_0_pa_w), DEVCB_HANDLER(b_via_0_pb_w),
	/*outputs: CA/B1,CA/B2 */ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_DEVICE_LINE_MEMBER("via6522_1", via6522_device, write_ca1),
	/*irq                  */ DEVCB_CPU_INPUT_LINE("maincpu", M6809_IRQ_LINE)
};

/* VIA 1 (U18 @3C on schematics)
    port A:
        bits 7-0: input/output: pbus
    port B:
        bit 7: output: TIMER1 OUT (used to gate NOISE (see below) to clock channel 1 of 6840, plus acts as channel 0 by itself)
        bit 6: input: NOISE (from mm5837 14-bit LFSR, which also connects to clock above)
        bit 5: output?: N/C
        bit 4: output?: FMSEL1 (does not appear elsewhere on schematics! what does this do? needs tracing) - always 0?
        bit 3: output?: FMSEL0 (does not appear elsewhere on schematics! what does this do? needs tracing) - always 0?
        bit 2: output?: AM (does not appear elsewhere on schematics! what does this do? needs tracing) - always 0?
Esempio n. 14
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static WRITE8_DEVICE_HANDLER( r6532_portb_w )
{
	/* unsure if this is ever used, but the NMI is connected to the RIOT's PB7 */
	cputag_set_input_line(device->machine(), "audiocpu", INPUT_LINE_NMI, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
}


static const riot6532_interface gottlieb_riot6532_intf =
{
	DEVCB_NULL,
	DEVCB_INPUT_PORT("SB1"),
	DEVCB_NULL,
	DEVCB_HANDLER(r6532_portb_w),
	DEVCB_LINE(snd_interrupt)
};



/*************************************
 *
 *  Rev. 1 sample players
 *
 *************************************/

static void play_sample(device_t *samples, const char *phonemes)
{
	if (strcmp(phonemes, "[0] HEH3LOOW     AH1EH3I3YMTERI2NDAHN") == 0)	  /* Q-Bert - Hello, I am turned on */
		sample_start(samples, 0, 42, 0);
	else if (strcmp(phonemes, "[0]BAH1EH1Y") == 0)							  /* Q-Bert - Bye, bye */
Esempio n. 15
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static WRITE_LINE_DEVICE_HANDLER(tourvision_timer_out)
{
	cputag_set_input_line(device->machine(), "sub", I8085_RST55_LINE, state ? CLEAR_LINE : ASSERT_LINE );
	//logerror("Timer out %d\n", state);
}

static I8155_INTERFACE(i8155_intf)
{
	DEVCB_NULL,
	DEVCB_HANDLER(tourvision_i8155_a_w),
	DEVCB_NULL,
	DEVCB_HANDLER(tourvision_i8155_b_w),
	DEVCB_NULL,
	DEVCB_HANDLER(tourvision_i8155_c_w),
	DEVCB_LINE(tourvision_timer_out)
};

static const c6280_interface c6280_config =
{
	"maincpu"
};

static MACHINE_CONFIG_START( tourvision, tourvision_state )
	/* basic machine hardware */
	MCFG_CPU_ADD("maincpu", H6280, PCE_MAIN_CLOCK/3)
	MCFG_CPU_PROGRAM_MAP(pce_mem)
	MCFG_CPU_IO_MAP(pce_io)
	MCFG_TIMER_ADD_SCANLINE("scantimer", pce_interrupt, "screen", 0, 1)

	MCFG_QUANTUM_TIME(attotime::from_hz(60))
Esempio n. 16
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static WRITE_LINE_DEVICE_HANDLER( hrq_w )
{
	/* HACK - this should be connected to the BUSREQ line of Z80 */
	cputag_set_input_line(device->machine(), "maincpu", INPUT_LINE_HALT, state);

	/* HACK - this should be connected to the BUSACK line of Z80 */
	i8257_hlda_w(device, state);
}

static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }

I8257_INTERFACE( radio86_dma )
{
	DEVCB_LINE(hrq_w),
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, memory_read_byte),
	DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, memory_write_byte),
	{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
	{ DEVCB_NULL, DEVCB_NULL, DEVCB_DEVICE_HANDLER("i8275", i8275_dack_w), DEVCB_NULL }
};

static TIMER_CALLBACK( radio86_reset )
{
	radio86_state *state = machine.driver_data<radio86_state>();
	state->membank("bank1")->set_entry(0);
}

Esempio n. 17
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static void video_debug(running_machine &machine, int ref, int params, const char *param[]);
static MC6845_UPDATE_ROW( vid_update_row );
static WRITE_LINE_DEVICE_HANDLER( vid_hsync_changed );
static WRITE_LINE_DEVICE_HANDLER( vid_vsync_changed );

const mc6845_interface mb55x_mc6845_intf =
{
	SCREEN_TAG,						/* screen number */
	8,								/* numbers of pixels per video memory address */
	NULL,							/* begin_update */
	vid_update_row,					/* update_row */
	NULL,							/* end_update */
	DEVCB_NULL,						/* on_de_changed */
	DEVCB_NULL,						/* on_cur_changed */
	DEVCB_LINE(vid_hsync_changed),	/* on_hsync_changed */
	DEVCB_LINE(vid_vsync_changed),	/* on_vsync_changed */
	NULL
};

static void video_debug(running_machine &machine, int ref, int params, const char *param[])
{
	mbc55x_state *mstate = machine.driver_data<mbc55x_state>();
    if(params>0)
    {
        sscanf(param[0],"%d",&mstate->m_debug_video);
    }
    else
    {
        debug_console_printf(machine,"Error usage : mbc55x_vid_debug <debuglevel>\n");
        debug_console_printf(machine,"Current debuglevel=%02X\n",mstate->m_debug_video);
Esempio n. 18
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WRITE_LINE_DEVICE_HANDLER( wait_w )
{
	comx_expansion_slot_device *slot = dynamic_cast<comx_expansion_slot_device *>(device->owner()->owner());
	slot->wait_w(state);
}

WRITE_LINE_DEVICE_HANDLER( clear_w )
{
	comx_expansion_slot_device *slot = dynamic_cast<comx_expansion_slot_device *>(device->owner()->owner());
	slot->clear_w(state);
}

static COMX_EXPANSION_INTERFACE( expansion_intf )
{
	DEVCB_LINE(int_w),
	DEVCB_LINE(ef4_w),
	DEVCB_LINE(wait_w),
	DEVCB_LINE(clear_w)
};


//-------------------------------------------------
//  MACHINE_CONFIG_FRAGMENT( comx_eb )
//-------------------------------------------------

static MACHINE_CONFIG_FRAGMENT( comx_eb )
	MCFG_COMX_EXPANSION_SLOT_ADD(SLOT1_TAG, expansion_intf, comx_expansion_cards, "fd", NULL)
	MCFG_COMX_EXPANSION_SLOT_ADD(SLOT2_TAG, expansion_intf, comx_expansion_cards, "clm", NULL)
	MCFG_COMX_EXPANSION_SLOT_ADD(SLOT3_TAG, expansion_intf, comx_expansion_cards, "joy", NULL)
	MCFG_COMX_EXPANSION_SLOT_ADD(SLOT4_TAG, expansion_intf, comx_expansion_cards, "ram", NULL)
Esempio n. 19
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	n8080->inte = state;
}

static WRITE8_DEVICE_HANDLER( n8080_status_callback )
{
	if (data & I8085_STATUS_INTA)
	{
		/* interrupt acknowledge */
		cpu_set_input_line(device, INPUT_LINE_IRQ0, CLEAR_LINE);
	}
}

static I8085_CONFIG( n8080_cpu_config )
{
	DEVCB_HANDLER(n8080_status_callback),	/* STATUS changed callback */
	DEVCB_LINE(n8080_inte_callback),		/* INTE changed callback */
	DEVCB_NULL,								/* SID changed callback (8085A only) */
	DEVCB_NULL								/* SOD changed callback (8085A only) */
};

static MACHINE_START( n8080 )
{
	n8080_state *state = machine->driver_data<n8080_state>();

	state->maincpu = machine->device("maincpu");

	state_save_register_global(machine, state->shift_data);
	state_save_register_global(machine, state->shift_bits);
	state_save_register_global(machine, state->inte);
}
Esempio n. 20
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static const floppy_interface kayproii_floppy_interface =
{
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	FLOPPY_STANDARD_5_25_DSHD,
	LEGACY_FLOPPY_OPTIONS_NAME(kayproii),
	"floppy_5_25",
	NULL
};

static const floppy_interface kaypro2x_floppy_interface =
{
	DEVCB_LINE(wd17xx_idx_w),
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	FLOPPY_STANDARD_5_25_DSHD,
	LEGACY_FLOPPY_OPTIONS_NAME(kaypro2x),
	"floppy_5_25",
	NULL
};

static MACHINE_CONFIG_START( kayproii, kaypro_state )
	/* basic machine hardware */
	MCFG_CPU_ADD("maincpu", Z80, XTAL_2_5MHz)
	MCFG_CPU_PROGRAM_MAP(kaypro_map)
	MCFG_CPU_IO_MAP(kayproii_io)
Esempio n. 21
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/***************************************************************************
    MACHINE DRIVERS
***************************************************************************/

static const UPD7810_CONFIG lx800_cpu_config =
{
    TYPE_7810,
    0
};

static const e05a03_interface lx800_e05a03_intf =
{
	DEVCB_HANDLER(lx800_centronics_data_r),
	DEVCB_NULL,
	DEVCB_LINE(lx800_paperempty_led_w),
	DEVCB_LINE(lx800_centronics_pe_w),
	DEVCB_LINE(lx800_reset_w)
};

static MACHINE_CONFIG_START( lx800, lx800_state )
	/* basic machine hardware */
	MCFG_CPU_ADD("maincpu", UPD7810, XTAL_14_7456MHz)
	MCFG_CPU_CONFIG(lx800_cpu_config)
	MCFG_CPU_PROGRAM_MAP(lx800_mem)
	MCFG_CPU_IO_MAP(lx800_io)

	MCFG_MACHINE_START(lx800)

	MCFG_DEFAULT_LAYOUT(layout_lx800)
Esempio n. 22
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/* Null port handlers for now, I believe that the IO ports are used for */
/* the nimbus rompacks */

static const ay8910_interface nimbus_ay8910_interface =
{
	AY8910_LEGACY_OUTPUT,
	AY8910_DEFAULT_LOADS,
	DEVCB_NULL,                     /* portA read */
	DEVCB_NULL,                     /* portB read */
	DEVCB_DRIVER_MEMBER(rmnimbus_state, nimbus_sound_ay8910_porta_w),   /* portA write */
	DEVCB_DRIVER_MEMBER(rmnimbus_state, nimbus_sound_ay8910_portb_w)    /* portB write */
};

static const msm5205_interface msm5205_config =
{
	DEVCB_LINE(nimbus_msm5205_vck), /* VCK function */
	MSM5205_S48_4B      /* 8 kHz */
};

static const centronics_interface nimbus_centronics_config =
{
	DEVCB_DRIVER_LINE_MEMBER(rmnimbus_state, nimbus_ack_w),
	DEVCB_NULL,
	DEVCB_NULL
};

static ADDRESS_MAP_START(nimbus_mem, AS_PROGRAM, 16, rmnimbus_state )
	AM_RANGE( 0x00000, 0x1FFFF ) AM_RAMBANK(RAM_BANK00_TAG)
	AM_RANGE( 0x20000, 0x3FFFF ) AM_RAMBANK(RAM_BANK01_TAG)
	AM_RANGE( 0x40000, 0x5FFFF ) AM_RAMBANK(RAM_BANK02_TAG)
	AM_RANGE( 0x60000, 0x7FFFF ) AM_RAMBANK(RAM_BANK03_TAG)
Esempio n. 23
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/**************************************************************************/

/* handler called by the YM2610 emulator when the internal timers cause an IRQ */
static void irqhandler(device_t *device, int irq)
{
	cputag_set_input_line(device->machine(), "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
}

static const ym2610_interface ym2610_config =
{
	irqhandler
};

static const ym2151_interface ym2151_config =
{
	DEVCB_LINE(irqhandler)
};

static MACHINE_START( taitox )
{
	taitox_state *state = machine.driver_data<taitox_state>();

	state->m_banknum = -1;
	state->save_item(NAME(state->m_banknum));
	machine.save().register_postload(save_prepost_delegate(FUNC(reset_sound_region), &machine));
}

static const tc0140syt_interface taitox_tc0140syt_intf =
{
	"maincpu", "audiocpu"
};
Esempio n. 24
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static WRITE_LINE_DEVICE_HANDLER( ctc_z0_w )
{
}

static WRITE_LINE_DEVICE_HANDLER( ctc_z1_w )
{
}

static WRITE_LINE_DEVICE_HANDLER( ctc_z2_w )
{
}

static Z80CTC_INTERFACE( ctc_intf )
{
	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),	/* interrupt handler */
	DEVCB_LINE(ctc_z0_w),			/* ZC/TO0 callback */
	DEVCB_LINE(ctc_z1_w),			/* ZC/TO1 callback */
	DEVCB_LINE(ctc_z2_w)    		/* ZC/TO2 callback */
};

/* WD1795-02 Interface */

WRITE_LINE_MEMBER( xor100_state::fdc_irq_w )
{
	m_fdc_irq = state;
	m_ctc->trg0(state);

	if (state)
	{
		/* TODO: this is really connected to the Z80 _RDY line */
		device_set_input_line(m_maincpu, INPUT_LINE_HALT, CLEAR_LINE);
Esempio n. 25
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static MACHINE_RESET(mquake)
{
	MACHINE_RESET_CALL(amiga);
}

/*************************************
 *
 *  Machine driver
 *
 *************************************/

static const mos6526_interface cia_0_intf =
{
	0,													/* tod_clock */
	DEVCB_LINE(amiga_cia_0_irq),									/* irq_func */
	DEVCB_NULL,	/* pc_func */
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_INPUT_PORT("CIA0PORTA"),
	DEVCB_HANDLER(mquake_cia_0_porta_w),	/* port A */
	DEVCB_HANDLER(mquake_cia_0_portb_r),
	DEVCB_HANDLER(mquake_cia_0_portb_w)	/* port B */
};

static const mos6526_interface cia_1_intf =
{
	0,													/* tod_clock */
	DEVCB_LINE(amiga_cia_1_irq),									/* irq_func */
	DEVCB_NULL,	/* pc_func */
	DEVCB_NULL,
Esempio n. 26
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	return MACHINE_CONFIG_NAME( pc_lpt  );
}



static WRITE_LINE_DEVICE_HANDLER(pc_cpu_line)
{
	isa8_lpt_device *lpt  = downcast<isa8_lpt_device *>(device->owner());
	if (lpt->is_primary())
		lpt->m_isa->irq7_w(state);
	else
		lpt->m_isa->irq5_w(state);
}
static const pc_lpt_interface pc_lpt_config =
{
	DEVCB_LINE(pc_cpu_line)
};

static MACHINE_CONFIG_FRAGMENT( lpt_config )
	MCFG_PC_LPT_ADD("lpt", pc_lpt_config)
MACHINE_CONFIG_END

static INPUT_PORTS_START( lpt_dsw )
	PORT_START("DSW")
	PORT_DIPNAME( 0x01, 0x00, "Base address")
	PORT_DIPSETTING(    0x00, "0x378" )
	PORT_DIPSETTING(    0x01, "0x278" )
INPUT_PORTS_END

//**************************************************************************
//  GLOBAL VARIABLES
Esempio n. 27
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 *
 *  6840 PTM
 *
 *************************************/

static WRITE_LINE_DEVICE_HANDLER( ptm_irq )
{
	cputag_set_input_line(device->machine(), "sound_cpu", M6809_FIRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
}

static const ptm6840_interface ptm_intf =
{
	XTAL_8MHz / 4,
	{ 0, 0, 0 },
	{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
	DEVCB_LINE(ptm_irq)
};


/*************************************
 *
 *  i8251A UART
 *
 *************************************/

/* Note: Game CPU /FIRQ is connected to RXRDY */
static WRITE8_HANDLER( uart_w )
{
	if ((offset & 1) == 0)
		mame_printf_debug("%c",data);
}
Esempio n. 28
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static READ8_DEVICE_HANDLER( get_slave_ack )
{
	su2000_state *state = device->machine().driver_data<su2000_state>();

	if (offset == 2)
	{
		// IRQ = 2
		logerror("pic8259_slave_ACK!\n");
		return pic8259_acknowledge(state->m_pic8259_2);
	}
	return 0x00;
}

static const struct pic8259_interface su2000_pic8259_1_config =
{
	DEVCB_LINE(su2000_pic8259_1_set_int_line),
	DEVCB_LINE_VCC,
	DEVCB_HANDLER(get_slave_ack)
};

static const struct pic8259_interface su2000_pic8259_2_config =
{
	DEVCB_DEVICE_LINE("pic8259_1", pic8259_ir2_w),
	DEVCB_LINE_GND,
	DEVCB_NULL
};


/*************************************************************
 *
 * PIT8254 Configuration
Esempio n. 29
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 */

#include "emu.h"
#include "machine/cpc_rom.h"
#include "includes/amstrad.h"

const device_type CPC_ROM = &device_creator<cpc_rom_device>;


//**************************************************************************
//  DEVICE CONFIG INTERFACE
//**************************************************************************

CPC_EXPANSION_INTERFACE(sub_exp_intf)
{
	DEVCB_LINE(cpc_irq_w),
	DEVCB_LINE(cpc_nmi_w),//LINE_MEMBER(cpc_expansion_slot_device,nmi_w),
	DEVCB_NULL,  // RESET
	DEVCB_LINE(cpc_romdis),  // ROMDIS
	DEVCB_LINE(cpc_romen)  // /ROMEN
};

// device machine config
static MACHINE_CONFIG_FRAGMENT( cpc_rom )
	MCFG_ROMSLOT_ADD("rom1")
	MCFG_ROMSLOT_ADD("rom2")
	MCFG_ROMSLOT_ADD("rom3")
	MCFG_ROMSLOT_ADD("rom4")
	MCFG_ROMSLOT_ADD("rom5")
	MCFG_ROMSLOT_ADD("rom6")
Esempio n. 30
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{
	DEVCB_CPU_INPUT_LINE("sub", INPUT_LINE_IRQ0),
	DEVCB_HANDLER(pio_pa_r),
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL
};

/* z80 ctc */
Z80CTC_INTERFACE( senjyo_ctc_intf )
{
	NOTIMER_2,       /* timer disables */
	DEVCB_CPU_INPUT_LINE("sub", INPUT_LINE_IRQ0), /* interrupt handler */
	DEVCB_LINE(z80ctc_trg1_w),	/* ZC/TO0 callback */
	DEVCB_NULL,					/* ZC/TO1 callback */
	DEVCB_NULL					/* ZC/TO2 callback */
};


WRITE8_HANDLER( senjyo_volume_w )
{
	samples_sound_device *samples = space->machine->device<samples_sound_device>("samples");
	single_volume = data & 0x0f;
	sample_set_volume(samples,0,single_volume / 15.0);
}


static TIMER_CALLBACK( senjyo_sh_update )
{