/* Check if the given DEF is available in INSN. This would require full
computation of available expressions; we check only restricted conditions:
- if DEF is the sole definition of its register, go ahead;
- in the same basic block, we check for no definitions killing the
definition of DEF_INSN;
- if USE's basic block has DEF's basic block as the sole predecessor,
we check if the definition is killed after DEF_INSN or before
TARGET_INSN insn, in their respective basic blocks. */
static bool
use_killed_between (df_ref use, rtx_insn *def_insn, rtx_insn *target_insn)
{
basic_block def_bb = BLOCK_FOR_INSN (def_insn);
basic_block target_bb = BLOCK_FOR_INSN (target_insn);
int regno;
df_ref def;
/* We used to have a def reaching a use that is _before_ the def,
with the def not dominating the use even though the use and def
are in the same basic block, when a register may be used
uninitialized in a loop. This should not happen anymore since
we do not use reaching definitions, but still we test for such
cases and assume that DEF is not available. */
if (def_bb == target_bb
? DF_INSN_LUID (def_insn) >= DF_INSN_LUID (target_insn)
: !dominated_by_p (CDI_DOMINATORS, target_bb, def_bb))
return true;
/* Check if the reg in USE has only one definition. We already
know that this definition reaches use, or we wouldn't be here.
However, this is invalid for hard registers because if they are
live at the beginning of the function it does not mean that we
have an uninitialized access. */
regno = DF_REF_REGNO (use);
def = DF_REG_DEF_CHAIN (regno);
if (def
&& DF_REF_NEXT_REG (def) == NULL
&& regno >= FIRST_PSEUDO_REGISTER)
return false;
/* Check locally if we are in the same basic block. */
if (def_bb == target_bb)
return local_ref_killed_between_p (use, def_insn, target_insn);
/* Finally, if DEF_BB is the sole predecessor of TARGET_BB. */
if (single_pred_p (target_bb)
&& single_pred (target_bb) == def_bb)
{
df_ref x;
/* See if USE is killed between DEF_INSN and the last insn in the
basic block containing DEF_INSN. */
x = df_bb_regno_last_def_find (def_bb, regno);
if (x && DF_INSN_LUID (DF_REF_INSN (x)) >= DF_INSN_LUID (def_insn))
return true;
/* See if USE is killed between TARGET_INSN and the first insn in the
basic block containing TARGET_INSN. */
x = df_bb_regno_first_def_find (target_bb, regno);
if (x && DF_INSN_LUID (DF_REF_INSN (x)) < DF_INSN_LUID (target_insn))
return true;
return false;
}
/* Otherwise assume the worst case. */
return true;
}
static bool
find_inc (bool first_try)
{
rtx insn;
basic_block bb = BLOCK_FOR_INSN (mem_insn.insn);
rtx other_insn;
df_ref *def_rec;
/* Make sure this reg appears only once in this insn. */
if (count_occurrences (PATTERN (mem_insn.insn), mem_insn.reg0, 1) != 1)
{
if (dump_file)
fprintf (dump_file, "mem count failure\n");
return false;
}
if (dump_file)
dump_mem_insn (dump_file);
/* Find the next use that is an inc. */
insn = get_next_ref (REGNO (mem_insn.reg0),
BLOCK_FOR_INSN (mem_insn.insn),
reg_next_inc_use);
if (!insn)
return false;
/* Even though we know the next use is an add or inc because it came
from the reg_next_inc_use, we must still reparse. */
if (!parse_add_or_inc (insn, false))
{
/* Next use was not an add. Look for one extra case. It could be
that we have:
*(a + b)
...= a;
...= b + a
if we reverse the operands in the mem ref we would
find this. Only try it once though. */
if (first_try && !mem_insn.reg1_is_const)
{
reverse_mem ();
return find_inc (false);
}
else
return false;
}
/* Need to assure that none of the operands of the inc instruction are
assigned to by the mem insn. */
for (def_rec = DF_INSN_DEFS (mem_insn.insn); *def_rec; def_rec++)
{
df_ref def = *def_rec;
unsigned int regno = DF_REF_REGNO (def);
if ((regno == REGNO (inc_insn.reg0))
|| (regno == REGNO (inc_insn.reg_res)))
{
if (dump_file)
fprintf (dump_file, "inc conflicts with store failure.\n");
return false;
}
if (!inc_insn.reg1_is_const && (regno == REGNO (inc_insn.reg1)))
{
if (dump_file)
fprintf (dump_file, "inc conflicts with store failure.\n");
return false;
}
}
if (dump_file)
dump_inc_insn (dump_file);
if (inc_insn.form == FORM_POST_ADD)
{
/* Make sure that there is no insn that assigns to inc_insn.res
between the mem_insn and the inc_insn. */
rtx other_insn = get_next_ref (REGNO (inc_insn.reg_res),
BLOCK_FOR_INSN (mem_insn.insn),
reg_next_def);
if (other_insn != inc_insn.insn)
{
if (dump_file)
fprintf (dump_file,
"result of add is assigned to between mem and inc insns.\n");
return false;
}
other_insn = get_next_ref (REGNO (inc_insn.reg_res),
BLOCK_FOR_INSN (mem_insn.insn),
reg_next_use);
if (other_insn
&& (other_insn != inc_insn.insn)
&& (DF_INSN_LUID (inc_insn.insn) > DF_INSN_LUID (other_insn)))
{
if (dump_file)
fprintf (dump_file,
"result of add is used between mem and inc insns.\n");
return false;
}
/* For the post_add to work, the result_reg of the inc must not be
used in the mem insn since this will become the new index
register. */
if (reg_overlap_mentioned_p (inc_insn.reg_res, PATTERN (mem_insn.insn)))
{
if (dump_file)
fprintf (dump_file, "base reg replacement failure.\n");
return false;
}
}
if (mem_insn.reg1_is_const)
{
if (mem_insn.reg1_val == 0)
{
if (!inc_insn.reg1_is_const)
{
/* The mem looks like *r0 and the rhs of the add has two
registers. */
int luid = DF_INSN_LUID (inc_insn.insn);
if (inc_insn.form == FORM_POST_ADD)
{
/* The trick is that we are not going to increment r0,
we are going to increment the result of the add insn.
For this trick to be correct, the result reg of
the inc must be a valid addressing reg. */
addr_space_t as = MEM_ADDR_SPACE (*mem_insn.mem_loc);
if (GET_MODE (inc_insn.reg_res)
!= targetm.addr_space.address_mode (as))
{
if (dump_file)
fprintf (dump_file, "base reg mode failure.\n");
return false;
}
/* We also need to make sure that the next use of
inc result is after the inc. */
other_insn
= get_next_ref (REGNO (inc_insn.reg1), bb, reg_next_use);
if (other_insn && luid > DF_INSN_LUID (other_insn))
return false;
if (!rtx_equal_p (mem_insn.reg0, inc_insn.reg0))
reverse_inc ();
}
other_insn
= get_next_ref (REGNO (inc_insn.reg1), bb, reg_next_def);
if (other_insn && luid > DF_INSN_LUID (other_insn))
return false;
}
}
/* Both the inc/add and the mem have a constant. Need to check
that the constants are ok. */
else if ((mem_insn.reg1_val != inc_insn.reg1_val)
&& (mem_insn.reg1_val != -inc_insn.reg1_val))
return false;
}
else
{
/* The mem insn is of the form *(a + b) where a and b are both
regs. It may be that in order to match the add or inc we
need to treat it as if it was *(b + a). It may also be that
the add is of the form a + c where c does not match b and
then we just abandon this. */
int luid = DF_INSN_LUID (inc_insn.insn);
rtx other_insn;
/* Make sure this reg appears only once in this insn. */
if (count_occurrences (PATTERN (mem_insn.insn), mem_insn.reg1, 1) != 1)
return false;
if (inc_insn.form == FORM_POST_ADD)
{
/* For this trick to be correct, the result reg of the inc
must be a valid addressing reg. */
addr_space_t as = MEM_ADDR_SPACE (*mem_insn.mem_loc);
if (GET_MODE (inc_insn.reg_res)
!= targetm.addr_space.address_mode (as))
{
if (dump_file)
fprintf (dump_file, "base reg mode failure.\n");
return false;
}
if (rtx_equal_p (mem_insn.reg0, inc_insn.reg0))
{
if (!rtx_equal_p (mem_insn.reg1, inc_insn.reg1))
{
/* See comment above on find_inc (false) call. */
if (first_try)
{
reverse_mem ();
return find_inc (false);
}
else
return false;
}
/* Need to check that there are no assignments to b
before the add insn. */
other_insn
= get_next_ref (REGNO (inc_insn.reg1), bb, reg_next_def);
if (other_insn && luid > DF_INSN_LUID (other_insn))
return false;
/* All ok for the next step. */
}
else
{
/* We know that mem_insn.reg0 must equal inc_insn.reg1
or else we would not have found the inc insn. */
reverse_mem ();
if (!rtx_equal_p (mem_insn.reg0, inc_insn.reg0))
{
/* See comment above on find_inc (false) call. */
if (first_try)
return find_inc (false);
else
return false;
}
/* To have gotten here know that.
*(b + a)
... = (b + a)
We also know that the lhs of the inc is not b or a. We
need to make sure that there are no assignments to b
between the mem ref and the inc. */
other_insn
= get_next_ref (REGNO (inc_insn.reg0), bb, reg_next_def);
if (other_insn && luid > DF_INSN_LUID (other_insn))
return false;
}
/* Need to check that the next use of the add result is later than
add insn since this will be the reg incremented. */
other_insn
= get_next_ref (REGNO (inc_insn.reg_res), bb, reg_next_use);
if (other_insn && luid > DF_INSN_LUID (other_insn))
return false;
}
else /* FORM_POST_INC. There is less to check here because we
know that operands must line up. */
{
if (!rtx_equal_p (mem_insn.reg1, inc_insn.reg1))
/* See comment above on find_inc (false) call. */
{
if (first_try)
{
reverse_mem ();
return find_inc (false);
}
else
return false;
}
/* To have gotten here know that.
*(a + b)
... = (a + b)
We also know that the lhs of the inc is not b. We need to make
sure that there are no assignments to b between the mem ref and
the inc. */
other_insn
= get_next_ref (REGNO (inc_insn.reg1), bb, reg_next_def);
if (other_insn && luid > DF_INSN_LUID (other_insn))
return false;
}
}
if (inc_insn.form == FORM_POST_INC)
{
other_insn
= get_next_ref (REGNO (inc_insn.reg0), bb, reg_next_use);
/* When we found inc_insn, we were looking for the
next add or inc, not the next insn that used the
reg. Because we are going to increment the reg
in this form, we need to make sure that there
were no intervening uses of reg. */
if (inc_insn.insn != other_insn)
return false;
}
return try_merge ();
}
static void
merge_in_block (int max_reg, basic_block bb)
{
rtx insn;
rtx curr;
int success_in_block = 0;
if (dump_file)
fprintf (dump_file, "\n\nstarting bb %d\n", bb->index);
FOR_BB_INSNS_REVERSE_SAFE (bb, insn, curr)
{
unsigned int uid = INSN_UID (insn);
bool insn_is_add_or_inc = true;
if (!NONDEBUG_INSN_P (insn))
continue;
/* This continue is deliberate. We do not want the uses of the
jump put into reg_next_use because it is not considered safe to
combine a preincrement with a jump. */
if (JUMP_P (insn))
continue;
if (dump_file)
dump_insn_slim (dump_file, insn);
/* Does this instruction increment or decrement a register? */
if (parse_add_or_inc (insn, true))
{
int regno = REGNO (inc_insn.reg_res);
/* Cannot handle case where there are three separate regs
before a mem ref. Too many moves would be needed to be
profitable. */
if ((inc_insn.form == FORM_PRE_INC) || inc_insn.reg1_is_const)
{
mem_insn.insn = get_next_ref (regno, bb, reg_next_use);
if (mem_insn.insn)
{
bool ok = true;
if (!inc_insn.reg1_is_const)
{
/* We are only here if we are going to try a
HAVE_*_MODIFY_REG type transformation. c is a
reg and we must sure that the path from the
inc_insn to the mem_insn.insn is both def and use
clear of c because the inc insn is going to move
into the mem_insn.insn. */
int luid = DF_INSN_LUID (mem_insn.insn);
rtx other_insn
= get_next_ref (REGNO (inc_insn.reg1), bb, reg_next_use);
if (other_insn && luid > DF_INSN_LUID (other_insn))
ok = false;
other_insn
= get_next_ref (REGNO (inc_insn.reg1), bb, reg_next_def);
if (other_insn && luid > DF_INSN_LUID (other_insn))
ok = false;
}
if (dump_file)
dump_inc_insn (dump_file);
if (ok && find_address (&PATTERN (mem_insn.insn)) == -1)
{
if (dump_file)
dump_mem_insn (dump_file);
if (try_merge ())
{
success_in_block++;
insn_is_add_or_inc = false;
}
}
}
}
}
else
{
insn_is_add_or_inc = false;
mem_insn.insn = insn;
if (find_mem (&PATTERN (insn)))
success_in_block++;
}
/* If the inc insn was merged with a mem, the inc insn is gone
and there is noting to update. */
if (DF_INSN_UID_GET (uid))
{
df_ref *def_rec;
df_ref *use_rec;
/* Need to update next use. */
for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
{
df_ref def = *def_rec;
reg_next_use[DF_REF_REGNO (def)] = NULL;
reg_next_inc_use[DF_REF_REGNO (def)] = NULL;
reg_next_def[DF_REF_REGNO (def)] = insn;
}
for (use_rec = DF_INSN_UID_USES (uid); *use_rec; use_rec++)
{
df_ref use = *use_rec;
reg_next_use[DF_REF_REGNO (use)] = insn;
if (insn_is_add_or_inc)
reg_next_inc_use[DF_REF_REGNO (use)] = insn;
else
reg_next_inc_use[DF_REF_REGNO (use)] = NULL;
}
}
else if (dump_file)
fprintf (dump_file, "skipping update of deleted insn %d\n", uid);
}
