//-------------------------------------------------------------------------------------------------------
// void halRfSetChannel(UINT8 Channel)
//
// DESCRIPTION:
// Programs CC2420 for a given IEEE 802.15.4 channel.
// Note that SRXON, STXON or STXONCCA must be run for the new channel selection to take full effect.
//
// PARAMETERS:
// UINT8 channel
// The channel number (11-26)
//-------------------------------------------------------------------------------------------------------
void halRfSetChannel(uint8_t channel) {
uint16_t f;
/*
// Derive frequency programming from the given channel number
f = (uint16_t) (channel - 11); // Subtract the base channel
f = f + (f << 2); // Multiply with 5, which is the channel spacing
f = f + 357 + 0x4000; // 357 is 2405-2048, 0x4000 is LOCK_THR = 1
// Write it to the CC2420
DISABLE_GLOBAL_INT();
cc2420WriteReg(CC2420_FSCTRL, f);
ENABLE_GLOBAL_INT();
*/
f= cc2420ReadReg(CC2420_FSCTRL);
// Mask bit 0-9 to 0
f &= 0x3C00;
// Set bit 0-9
f |= 357 + ((channel - 11) * 5)+0x4000;
DISABLE_GLOBAL_INT();
cc2420WriteReg(CC2420_FSCTRL, f);
ENABLE_GLOBAL_INT();
} // rfSetChannel
void rf_power_down()
{
DISABLE_GLOBAL_INT();
FASTSPI_STROBE(CC2420_SXOSCOFF);
FASTSPI_STROBE(CC2420_SRFOFF); // shut off radio
ENABLE_GLOBAL_INT();
}
BOOL vaIvRfAddrPan(UINT16 vaLocalAddr, UINT16 vaLocalPan) {
UINT8 n;
DISABLE_GLOBAL_INT();
SPI_WRITE_RAM_LE(&vaLocalAddr, CC2420RAM_SHORTADDR, 2, n);
SPI_WRITE_RAM_LE(&vaLocalPan, CC2420RAM_PANID, 2, n);
ENABLE_GLOBAL_INT();
return TRUE;
}
void rf_power_up()
{
DISABLE_GLOBAL_INT();
FASTSPI_STROBE(CC2420_SXOSCON);
nrk_spin_wait_us(OSC_STARTUP_DELAY);
ENABLE_GLOBAL_INT();
}
uint8_t audio_switch_buffers()
{
uint8_t prev_index;
DISABLE_GLOBAL_INT();
prev_index=audio_index;
audio_index++;
if(audio_index>=AUDIO_BUFS) audio_index=0;
audio_cnt[audio_index]=0;
ENABLE_GLOBAL_INT();
return prev_index;
}
//-------------------------------------------------------------------------------------------------------
// void rfWaitForCrystalOscillator(void)
//
// DESCRIPTION:
// Waits for the crystal oscillator to become stable. The flag is polled via the SPI status byte.
//
// Note that this function will lock up if the SXOSCON command strobe has not been given before the
// function call. Also note that global interrupts will always be enabled when this function
// returns.
//-------------------------------------------------------------------------------------------------------
void halRfWaitForCrystalOscillator(void) {
uint8_t spiStatusByte;
// Poll the SPI status byte until the crystal oscillator is stable
do {
DISABLE_GLOBAL_INT();
spiStatusByte=cc2420GetStatus();
ENABLE_GLOBAL_INT();
} while (!(spiStatusByte & (BM(CC2420_XOSC16M_STABLE))));
} // halRfWaitForCrystalOscillator
char lcd_busy (void)
{
char ret;
DISABLE_GLOBAL_INT(); // necessário caso "lcd_periodic" seja chamado de dentro da ISR de timer0.
if (state_lcd)
ret = -1;
else
ret = 0;
ENABLE_GLOBAL_INT();
return ret;
}
//-------------------------------------------------------------------------------------------------------
// void halRfSetChannel(UINT8 Channel)
//
// DESCRIPTION:
// Programs CC2420 for a given IEEE 802.15.4 channel.
// Note that SRXON, STXON or STXONCCA must be run for the new channel selection to take full effect.
//
// PARAMETERS:
// UINT8 channel
// The channel number (11-26)
//-------------------------------------------------------------------------------------------------------
void halRfSetChannel(uint8_t channel)
{
uint16_t f;
// Derive frequency programming from the given channel number
f = (uint16_t) (channel - 11); // Subtract the base channel
f = f + (f << 2); // Multiply with 5, which is the channel spacing
f = f + 357 + 0x4000; // 357 is 2405-2048, 0x4000 is LOCK_THR = 1
// Write it to the CC2420
DISABLE_GLOBAL_INT();
FASTSPI_SETREG(CC2420_FSCTRL, f);
ENABLE_GLOBAL_INT();
} // rfSetChannel
// パケットの受信を行なう
MRESULT RADIO_recvPacket(WORD *pAddress, BYTE *pPayload, UINT8 *pLength)
{
#ifdef MOXA_DEBUG_CHECK_PARAM
if (pAddress == NULL || pPayload == NULL || pLength == NULL) {
return MOXA_E_PARAM;
}
#endif
CHIP_CC2420_waitRecvPacket();
// 受信パケットのデータをコピー中に受信パケット割り込みが発生するとまずいので割り込み禁止
DISABLE_GLOBAL_INT();
*pAddress = s_rfRxInfo.srcAddr;
*pLength = s_rfRxInfo.nLength;
memcpy(pPayload, s_rfRxInfo.pPayload, s_rfRxInfo.nLength);
ENABLE_GLOBAL_INT();
return MOXA_SUCCESS;
}
int main(void) {
volatile int16_t* samples;
unsigned int i;
DISABLE_GLOBAL_INT();
/* stop watchdog timer */
WDTCTL = WDTPW +WDTHOLD;
/* SET CPU to 5MHz */
/* max DCO
MCLK = DCOCLK
SMCLK = DCOCLK
ACLK = 8KHz
*/
DCOCTL = DCO0 + DCO1 + DCO2;
BCSCTL1 = RSEL0 + RSEL1 + RSEL2 + XT2OFF;
BCSCTL2 = 0x00;
delay_us(10000);
/* activate Active Mode */
__bic_SR_register(LPM4_bits);
/* set LEDs when loaded */
P5SEL = 0x00;
P5DIR = 0x70;
LED_RED_ON();
LED_GREEN_OFF();
LED_BLUE_OFF();
check_for_clock();
init_usb_serial();
#ifdef USE_DMA
init_dma(&g_sample_flag);
#endif
#ifdef TX
init_adc(&g_sample_flag);
#else
init_dac();
#endif
init_rf(RF_CHANNEL, PAN_ID, NODE_ADDR, &g_sample_flag);
debug_print("Successfully booted.\n");
/* set LEDS to signalize finished initilizing */
LED_RED_OFF();
ENABLE_GLOBAL_INT();
#ifdef TX
/* TX */
while(1) {
if(g_sample_flag == 1) {
g_sample_flag = 0;
#ifdef USE_DMA
/* get samples */
samples = get_samples_dma();
#else
/* get samples */
samples = get_samples();
#endif
/* send oder radio, 2*num_words */
send_rf_data(RF_RX_ADDR, (uint8_t*) samples, NUM_SAMPLES*2);
}
/* reset WDT */
WDTCTL = WDTPW + WDTCNTCL;
}
#else
/* RX */
while(1) {
if(g_sample_flag == 1) {
g_sample_flag = 0;
samples = get_samples_rf();
#if 0
uint8_t err = 0;
for(i = 0; i < NUM_SAMPLES; ++i) {
//samples[i] = 4095-7*i;
usb_printf("%d\n", samples[i]);
//if( ((uint16_t) samples[i]) > 4095) {
// usb_printf("i=%u\n", i);
// ++err;
//}
}
usb_printf("#error: %u\n", err);
usb_printf("\n\n");
#endif
set_dma_data(samples, NUM_SAMPLES);
}
/* reset WDT */
WDTCTL = WDTPW + WDTCNTCL;
}
#endif
return 0;
}
//-------------------------------------------------------------------------------------------------------
// BYTE rf_tx_packet(RF_TX_INFO *pRTI)
//
// DESCRIPTION:
// Transmits a packet using the IEEE 802.15.4 MAC data packet format with short addresses. CCA is
// measured only once before backet transmission (not compliant with 802.15.4 CSMA-CA).
// The function returns:
// - When pRTI->ackRequest is FALSE: After the transmission has begun (SFD gone high)
// - When pRTI->ackRequest is TRUE: After the acknowledgment has been received/declared missing.
// The acknowledgment is received through the FIFOP interrupt.
//
// ARGUMENTS:
// RF_TX_INFO *pRTI
// The transmission structure, which contains all relevant info about the packet.
//
// RETURN VALUE:
// uint8_t
// Successful transmission (acknowledgment received)
//-------------------------------------------------------------------------------------------------------
uint8_t rf_tx_packet(RF_TX_INFO *pRTI)
{
uint16_t frameControlField;
uint8_t packetLength, length;
uint8_t success;
uint8_t spiStatusByte;
uint8_t checksum,i;
#ifdef RADIO_PRIORITY_CEILING
nrk_sem_pend(radio_sem);
#endif
#ifdef CC2420_OSC_OPT
FASTSPI_STROBE(CC2420_SXOSCON);
nrk_spin_wait_us(OSC_STARTUP_DELAY);
#endif
if(security_enable)
FASTSPI_STROBE(CC2420_STXENC);
checksum=0;
for(i=0; i<pRTI->length; i++ )
{
// lets do our own payload checksum because we don't trust the CRC
checksum+=pRTI->pPayload[i];
}
// Write the packet to the TX FIFO (the FCS is appended automatically when AUTOCRC is enabled)
// These are only the MAC AGNOSTIC parameters...
// Slots for example are at a slighly higher later since they assume TDMA
packetLength = pRTI->length + RF_PACKET_OVERHEAD_SIZE + CHECKSUM_OVERHEAD;
if(security_enable) packetLength+=4; // for CTR counter
// XXX 2 below are hacks...
FASTSPI_STROBE(CC2420_SFLUSHRX);
FASTSPI_STROBE(CC2420_SFLUSHRX);
// Wait until the transceiver is idle
while (FIFOP_IS_1 || SFD_IS_1);
// Turn off global interrupts to avoid interference on the SPI interface
DISABLE_GLOBAL_INT();
// Flush the TX FIFO just in case...
FASTSPI_STROBE(CC2420_SFLUSHTX);
FASTSPI_STROBE(CC2420_SFLUSHTX);
/*
// Turn on RX if necessary
if (!rfSettings.receiveOn) {
FASTSPI_STROBE(CC2420_SRXON);
}
// Wait for the RSSI value to become valid
do {
FASTSPI_UPD_STATUS(spiStatusByte);
} while (!(spiStatusByte & BM(CC2420_RSSI_VALID)));
// TX begins after the CCA check has passed
do {
FASTSPI_STROBE(CC2420_STXONCCA);
FASTSPI_UPD_STATUS(spiStatusByte);
halWait(100);
} while (!(spiStatusByte & BM(CC2420_TX_ACTIVE)));
*/
FASTSPI_WRITE_FIFO((uint8_t*)&packetLength, 1); // Packet length
frameControlField = RF_FCF_NOACK; // default
if(auto_ack_enable) frameControlField |= RF_ACK_BM;
if(security_enable) frameControlField |= RF_SEC_BM;
FASTSPI_WRITE_FIFO((uint8_t*) &frameControlField, 2); // Frame control field
FASTSPI_WRITE_FIFO((uint8_t*) &rfSettings.txSeqNumber, 1); // Sequence number
FASTSPI_WRITE_FIFO((uint8_t*) &rfSettings.panId, 2); // Dest. PAN ID
FASTSPI_WRITE_FIFO((uint8_t*) &pRTI->destAddr, 2); // Dest. address
FASTSPI_WRITE_FIFO((uint8_t*) &rfSettings.myAddr, 2); // Source address
if(security_enable)
FASTSPI_WRITE_FIFO((uint8_t*) &tx_ctr, 4); // CTR counter
FASTSPI_WRITE_FIFO((uint8_t*) pRTI->pPayload, pRTI->length); // Payload
FASTSPI_WRITE_FIFO((uint8_t*) &checksum, 1); // Checksum
if (pRTI->cca == TRUE)
{
uint8_t cnt;
if (!rfSettings.receiveOn)
{
FASTSPI_STROBE (CC2420_SRXON);
}
// Wait for the RSSI value to become valid
do
{
FASTSPI_UPD_STATUS (spiStatusByte);
}
while (!(spiStatusByte & BM (CC2420_RSSI_VALID)));
// TX begins after the CCA check has passed
cnt = 0;
do
{
FASTSPI_STROBE (CC2420_STXONCCA);
FASTSPI_UPD_STATUS (spiStatusByte);
cnt++;
if (cnt > 100)
{
ENABLE_GLOBAL_INT ();
nrk_sem_post(radio_sem);
return FALSE;
}
halWait (100);
}
while (!(spiStatusByte & BM (CC2420_TX_ACTIVE)));
}
else
FASTSPI_STROBE (CC2420_STXON);
ENABLE_GLOBAL_INT();
// Wait for the transmission to begin before exiting (makes sure that this function cannot be called
// a second time, and thereby cancelling the first transmission (observe the FIFOP + SFD test above).
while (!SFD_IS_1);
success = TRUE;
// Turn interrupts back on
// ENABLE_GLOBAL_INT();
while (SFD_IS_1); // wait for packet to finish
// Wait for the acknowledge to be received, if any
if (auto_ack_enable)
{
// rfSettings.ackReceived = FALSE;
// Wait for the SFD to go low again
// while (SFD_IS_1);
// We'll enter RX automatically, so just wait until we can be sure that the
// ack reception should have finished
// The timeout consists of a 12-symbol turnaround time, the ack packet duration,
// and a small margin
halWait((12 * RF_SYMBOL_DURATION) + (RF_ACK_DURATION) + (2 * RF_SYMBOL_DURATION) + 100);
if(FIFO_IS_1)
{
FASTSPI_READ_FIFO_BYTE(length);
length &= RF_LENGTH_MASK; // Ignore MSB
success = TRUE;
}
else
{
FASTSPI_STROBE(CC2420_SFLUSHRX);
FASTSPI_STROBE(CC2420_SFLUSHRX);
success = FALSE;
}
}
// Turn off the receiver if it should not continue to be enabled
DISABLE_GLOBAL_INT();
//FASTSPI_STROBE(CC2420_SFLUSHRX);
//FASTSPI_STROBE(CC2420_SFLUSHRX);
//FASTSPI_STROBE(CC2420_SFLUSHTX);
//FASTSPI_STROBE(CC2420_SFLUSHTX);
#ifdef CC2420_OSC_OPT
FASTSPI_STROBE(CC2420_SXOSCOFF);
#endif
FASTSPI_STROBE(CC2420_SRFOFF); // shut off radio
ENABLE_GLOBAL_INT();
// agr XXX hack to test time issue
//rf_rx_on();
// Increment the sequence number, and return the result
rfSettings.txSeqNumber++;
// while (SFD_IS_1);
#ifdef RADIO_PRIORITY_CEILING
nrk_sem_post(radio_sem);
#endif
return success;
}
/**************************************************************************
This function is the same as normal TX, only it waits until the last
second to send the duty out with the high speed timer. And by duty, I mean
the packet BIATCH...
**************************************************************************/
uint8_t rf_tx_tdma_packet(RF_TX_INFO *pRTI, uint16_t slot_start_time, uint16_t tx_guard_time)
{
uint16_t frameControlField;
uint8_t packetLength;
uint8_t success;
uint8_t spiStatusByte;
uint8_t checksum,i;
uint8_t timestamp;
#ifdef RADIO_PRIORITY_CEILING
nrk_sem_pend (radio_sem);
#endif
timestamp=_nrk_os_timer_get();
// XXX 2 below are hacks...
#ifdef CC2420_OSC_OPT
FASTSPI_STROBE(CC2420_SXOSCON);
nrk_spin_wait_us(OSC_STARTUP_DELAY);
#endif
FASTSPI_STROBE(CC2420_SFLUSHRX);
FASTSPI_STROBE(CC2420_SFLUSHRX);
// Wait until the transceiver is idle
while (FIFOP_IS_1 || SFD_IS_1);
// Turn off global interrupts to avoid interference on the SPI interface
DISABLE_GLOBAL_INT();
// Flush the TX FIFO just in case...
FASTSPI_STROBE(CC2420_SFLUSHTX);
FASTSPI_STROBE(CC2420_SFLUSHTX);
checksum=0;
for(i=0; i<pRTI->length; i++ )
{
// lets do our own payload checksum because we don't trust the CRC
checksum+=pRTI->pPayload[i];
}
packetLength = pRTI->length + RF_PACKET_OVERHEAD_SIZE + CHECKSUM_OVERHEAD;
//nrk_set_led(3);
//do { } while(_nrk_get_high_speed_timer()<(tx_guard_time));
// Write the packet to the TX FIFO (the FCS is appended automatically when AUTOCRC is enabled)
// These are only the MAC AGNOSTIC parameters...
// Slots for example are at a higher layer since they assume TDMA
FASTSPI_WRITE_FIFO((uint8_t*)&packetLength, 1); // Packet length
frameControlField = pRTI->ackRequest ? RF_FCF_ACK : RF_FCF_NOACK;
FASTSPI_WRITE_FIFO((uint8_t*) &frameControlField, 2); // Frame control field
FASTSPI_WRITE_FIFO((uint8_t*) &rfSettings.txSeqNumber, 1); // Sequence number
FASTSPI_WRITE_FIFO((uint8_t*) &rfSettings.panId, 2); // Dest. PAN ID
FASTSPI_WRITE_FIFO((uint8_t*) &pRTI->destAddr, 2); // Dest. address
FASTSPI_WRITE_FIFO((uint8_t*) &rfSettings.myAddr, 2); // Source address
nrk_high_speed_timer_wait(slot_start_time,tx_guard_time);
//nrk_clr_led(3);
/*
DISABLE_GLOBAL_INT();
nrk_set_led(3);
last=0;
do {
if(last==_nrk_get_high_speed_timer())
{
//while(1)
//printf( "TX ERROR %d vs %d\r\n",_nrk_get_high_speed_timer(),tx_guard_time );
break;
}
last=_nrk_get_high_speed_timer();
}
while((volatile)last<(tx_guard_time));
ENABLE_GLOBAL_INT();
nrk_clr_led(3);
*/
/*
// Turn on RX if necessary
if (!rfSettings.receiveOn) {
FASTSPI_STROBE(CC2420_SRXON);
}
// Wait for the RSSI value to become valid
do {
FASTSPI_UPD_STATUS(spiStatusByte);
} while (!(spiStatusByte & BM(CC2420_RSSI_VALID)));
// TX begins after the CCA check has passed
do {
FASTSPI_STROBE(CC2420_STXONCCA);
FASTSPI_UPD_STATUS(spiStatusByte);
halWait(100);
} while (!(spiStatusByte & BM(CC2420_TX_ACTIVE)));
*/
if (pRTI->cca == TRUE)
{
uint8_t cnt;
if (!rfSettings.receiveOn)
{
FASTSPI_STROBE (CC2420_SRXON);
}
// Wait for the RSSI value to become valid
do
{
FASTSPI_UPD_STATUS (spiStatusByte);
}
while (!(spiStatusByte & BM (CC2420_RSSI_VALID)));
// TX begins after the CCA check has passed
cnt = 0;
do
{
FASTSPI_STROBE (CC2420_STXONCCA);
FASTSPI_UPD_STATUS (spiStatusByte);
cnt++;
if (cnt > 100)
{
ENABLE_GLOBAL_INT ();
nrk_sem_post(radio_sem);
return FALSE;
}
halWait (100);
}
while (!(spiStatusByte & BM (CC2420_TX_ACTIVE)));
}
else
FASTSPI_STROBE (CC2420_STXON);
//nrk_gpio_set(DEBUG_0);
// Fill in the rest of the packet now
FASTSPI_WRITE_FIFO((uint8_t*) pRTI->pPayload, pRTI->length); // Payload
FASTSPI_WRITE_FIFO((uint8_t*) &checksum, 1); // Checksum
//nrk_spin_wait_us(200);
// FASTSPI_STROBE(CC2420_STXON);
// Wait for the transmission to begin before exiting (makes sure that this function cannot be called
// a second time, and thereby cancelling the first transmission (observe the FIFOP + SFD test above).
while (!SFD_IS_1);
success = TRUE;
// Turn interrupts back on
// ENABLE_GLOBAL_INT();
// Wait for the acknowledge to be received, if any
/*if (pRTI->ackRequest) {
rfSettings.ackReceived = FALSE;
// Wait for the SFD to go low again
while (SFD_IS_1);
// We'll enter RX automatically, so just wait until we can be sure that the ack reception should have finished
// The timeout consists of a 12-symbol turnaround time, the ack packet duration, and a small margin
halWait((12 * RF_SYMBOL_DURATION) + (RF_ACK_DURATION) + (2 * RF_SYMBOL_DURATION) + 100);
// If an acknowledgment has been received (by the FIFOP interrupt), the ackReceived flag should be set
success = rfSettings.ackReceived;
}*/
// Turn off the receiver if it should not continue to be enabled
DISABLE_GLOBAL_INT();
// XXX hack, temp out
//if (!rfSettings.receiveOn) { while (SFD_IS_1); /*FASTSPI_STROBE(CC2420_SRFOFF);*/ }
// while (SFD_IS_1);
while (SFD_IS_1); // wait for packet to finish
FASTSPI_STROBE(CC2420_SFLUSHRX);
FASTSPI_STROBE(CC2420_SFLUSHRX);
FASTSPI_STROBE(CC2420_SFLUSHTX);
FASTSPI_STROBE(CC2420_SFLUSHTX);
#ifdef CC2420_OSC_OPT
FASTSPI_STROBE(CC2420_SXOSCOFF);
#endif
FASTSPI_STROBE(CC2420_SRFOFF); // shut off radio
ENABLE_GLOBAL_INT();
// Increment the sequence number, and return the result
rfSettings.txSeqNumber++;
// while (SFD_IS_1);
#ifdef RADIO_PRIORITY_CEILING
nrk_sem_post(radio_sem);
#endif
return success;
}
//-------------------------------------------------------------------------------------------------------
// void rf_init(RF_RX_INFO *pRRI, uint8_t channel, WORD panId, WORD myAddr)
//
// DESCRIPTION:
// Initializes CC2420 for radio communication via the basic RF library functions. Turns on the
// voltage regulator, resets the CC2420, turns on the crystal oscillator, writes all necessary
// registers and protocol addresses (for automatic address recognition). Note that the crystal
// oscillator will remain on (forever).
//
// ARGUMENTS:
// RF_RX_INFO *pRRI
// A pointer the RF_RX_INFO data structure to be used during the first packet reception.
// The structure can be switched upon packet reception.
// uint8_t channel
// The RF channel to be used (11 = 2405 MHz to 26 = 2480 MHz)
// WORD panId
// The personal area network identification number
// WORD myAddr
// The 16-bit short address which is used by this node. Must together with the PAN ID form a
// unique 32-bit identifier to avoid addressing conflicts. Normally, in a 802.15.4 network, the
// short address will be given to associated nodes by the PAN coordinator.
//-------------------------------------------------------------------------------------------------------
void rf_init(RF_RX_INFO *pRRI, uint8_t channel, uint16_t panId, uint16_t myAddr)
{
uint8_t n;
#ifdef RADIO_PRIORITY_CEILING
int8_t v;
radio_sem = nrk_sem_create(1,RADIO_PRIORITY_CEILING);
if (radio_sem == NULL)
nrk_kernel_error_add (NRK_SEMAPHORE_CREATE_ERROR, nrk_get_pid ());
v = nrk_sem_pend (radio_sem);
if (v == NRK_ERROR)
{
nrk_kprintf (PSTR ("CC2420 ERROR: Access to semaphore failed\r\n"));
}
#endif
// Make sure that the voltage regulator is on, and that the reset pin is inactive
SET_VREG_ACTIVE();
halWait(1000);
SET_RESET_ACTIVE();
halWait(1);
SET_RESET_INACTIVE();
halWait(100);
// Initialize the FIFOP external interrupt
//FIFOP_INT_INIT();
//ENABLE_FIFOP_INT();
// Turn off all interrupts while we're accessing the CC2420 registers
DISABLE_GLOBAL_INT();
FASTSPI_STROBE(CC2420_SXOSCON);
mdmctrl0=0x02E2;
FASTSPI_SETREG(CC2420_MDMCTRL0, mdmctrl0); // Std Preamble, CRC, no auto ack, no hw addr decoding
//FASTSPI_SETREG(CC2420_MDMCTRL0, 0x0AF2); // Turn on automatic packet acknowledgment
// Turn on hw addre decoding
FASTSPI_SETREG(CC2420_MDMCTRL1, 0x0500); // Set the correlation threshold = 20
FASTSPI_SETREG(CC2420_IOCFG0, 0x007F); // Set the FIFOP threshold to maximum
FASTSPI_SETREG(CC2420_SECCTRL0, 0x01C4); // Turn off "Security"
FASTSPI_SETREG(CC2420_RXCTRL1, 0x1A56); // All default except
// reference bias current to RX
// bandpass filter is set to 3uA
/*
// FIXME: remove later for auto ack
myAddr=MY_MAC;
panId=0x02;
FASTSPI_SETREG(CC2420_MDMCTRL0, 0x0AF2); // Turn on automatic packet acknowledgment
// FASTSPI_SETREG(CC2420_MDMCTRL0, 0x0AE2); // Turn on automatic packet acknowledgment
nrk_spin_wait_us(500);
nrk_spin_wait_us(500);
FASTSPI_WRITE_RAM_LE(&myAddr, CC2420RAM_SHORTADDR, 2, n);
nrk_spin_wait_us(500);
FASTSPI_WRITE_RAM_LE(&panId, CC2420RAM_PANID, 2, n);
nrk_spin_wait_us(500);
printf( "myAddr=%d\r\n",myAddr );
*/
nrk_spin_wait_us(500);
FASTSPI_WRITE_RAM_LE(&panId, CC2420RAM_PANID, 2, n);
nrk_spin_wait_us(500);
ENABLE_GLOBAL_INT();
// Set the RF channel
halRfSetChannel(channel);
// Turn interrupts back on
ENABLE_GLOBAL_INT();
// Set the protocol configuration
rfSettings.pRxInfo = pRRI;
rfSettings.panId = panId;
rfSettings.myAddr = myAddr;
rfSettings.txSeqNumber = 0;
rfSettings.receiveOn = FALSE;
// Wait for the crystal oscillator to become stable
halRfWaitForCrystalOscillator();
// Write the short address and the PAN ID to the CC2420 RAM (requires that the XOSC is on and stable)
// DISABLE_GLOBAL_INT();
// FASTSPI_WRITE_RAM_LE(&myAddr, CC2420RAM_SHORTADDR, 2, n);
// FASTSPI_WRITE_RAM_LE(&panId, CC2420RAM_PANID, 2, n);
// ENABLE_GLOBAL_INT();
#ifdef RADIO_PRIORITY_CEILING
v = nrk_sem_post (radio_sem);
if (v == NRK_ERROR)
{
nrk_kprintf (PSTR ("CC2420 ERROR: Release of semaphore failed\r\n"));
_nrk_errno_set (2);
}
#endif
auto_ack_enable=0;
security_enable=0;
last_pkt_encrypted=0;
} // rf_init()
inline void nrk_int_disable(void) {
DISABLE_GLOBAL_INT();
};