Esempio n. 1
0
int WDMAReset(unsigned idx)
{
	unsigned int delay_cnt = 0;
	static unsigned int wdma_timeout_cnt;

	/* WDMA_RST = 0x00; */
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_RST, 0x01);	/* soft reset */
	while ((DISP_REG_GET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_FLOW_CTRL_DBG) & 0x1) != 0x1) {
		delay_cnt++;
		if (delay_cnt > 10000) {
			DISP_ERR("[DDP] error, WDMAReset(%d) timeout! wdma_timeout_cnt=%d\n", idx,
				 wdma_timeout_cnt++);
			WDMADumpHidenReg(idx);
			disp_dump_reg(DISP_MODULE_WDMA0);
			smi_dumpDebugMsg();
			break;
		}
	}
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_RST, 0x00);

	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_CFG, 0x00);
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_SRC_SIZE, 0x00);
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_CLIP_SIZE, 0x00);
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_CLIP_COORD, 0x00);
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_DST_ADDR, 0x00);
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_DST_W_IN_BYTE, 0x00);
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_ALPHA, 0x00);	/* clear regs */

	return 0;
}
Esempio n. 2
0
int RDMAReset(unsigned idx)
{
	unsigned int delay_cnt = 0;
	/* static unsigned int cnt=0; */

	ASSERT(idx <= 2);

	DISP_REG_SET_FIELD(GLOBAL_CON_FLD_SOFT_RESET,
			   idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_GLOBAL_CON, 1);
	while ((DISP_REG_GET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_GLOBAL_CON) & 0x700) == 0x100) {
		delay_cnt++;
		if (delay_cnt > 10000) {
			DISP_ERR
			    ("[DDP] error, RDMAReset(%d) timeout, stage 1! DISP_REG_RDMA_GLOBAL_CON=0x%x\n",
			     idx, DISP_REG_GET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_GLOBAL_CON));
			break;
		}
	}
	DISP_REG_SET_FIELD(GLOBAL_CON_FLD_SOFT_RESET,
			   idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_GLOBAL_CON, 0);
	while ((DISP_REG_GET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_GLOBAL_CON) & 0x700) != 0x100) {
		delay_cnt++;
		if (delay_cnt > 10000) {
			DISP_ERR
			    ("[DDP] error, RDMAReset(%d) timeout, stage 2! DISP_REG_RDMA_GLOBAL_CON=0x%x\n",
			     idx, DISP_REG_GET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_GLOBAL_CON));
			ddp_dump_info(DISP_MODULE_CONFIG);
			ddp_dump_info(DISP_MODULE_MUTEX);
			ddp_dump_info(DISP_MODULE_OVL);
			ddp_dump_info(DISP_MODULE_RDMA);
			break;
		}
	}

#if 0
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_GLOBAL_CON, 0x00);
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_SIZE_CON_0, 0x00);
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_SIZE_CON_1, 0x00);
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_MEM_CON, 0x00);
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_MEM_START_ADDR, 0x00);
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_MEM_SRC_PITCH, 0x00);
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_MEM_GMC_SETTING_1, 0x20);	/* /TODO: need check */
	/* DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_FIFO_CON , 0x80f00008);        ///TODO: need check */
#endif

	return 0;
}
Esempio n. 3
0
enum WDMA_OUTPUT_FORMAT wdma_fmt_convert(DpColorFormat fmt)
{
	enum WDMA_OUTPUT_FORMAT wdma_fmt = WDMA_OUTPUT_FORMAT_UNKNOWN;
	switch (fmt) {
	case eRGB565:
		wdma_fmt = WDMA_OUTPUT_FORMAT_RGB565;
		break;
	case eRGB888:
		wdma_fmt = WDMA_OUTPUT_FORMAT_RGB888;
		break;
	case eBGR888:
		wdma_fmt = WDMA_OUTPUT_FORMAT_BGR888;
		break;
	case eARGB8888:
		wdma_fmt = WDMA_OUTPUT_FORMAT_ARGB;
		break;
	case eXARGB8888:
		wdma_fmt = WDMA_OUTPUT_FORMAT_XRGB;
		break;
	case eXABGR8888:
		wdma_fmt = WDMA_OUTPUT_FORMAT_XBGR;
		break;
	case eYUYV:
		wdma_fmt = WDMA_OUTPUT_FORMAT_YUYV;
		break;
	case eUYVY:
		wdma_fmt = WDMA_OUTPUT_FORMAT_UYVY;
		break;
	case eGREY:
		wdma_fmt = WDMA_OUTPUT_FORMAT_GREY;
		break;
	case eYV12:
		wdma_fmt = WDMA_OUTPUT_FORMAT_YV12;
		break;
	case eI420:
		wdma_fmt = WDMA_OUTPUT_FORMAT_I420;
		break;
	case eNV12:
		wdma_fmt = WDMA_OUTPUT_FORMAT_NV12;
		break;
	case eNV21:
		wdma_fmt = WDMA_OUTPUT_FORMAT_NV21;
		break;

	case eBGRA8888:
		wdma_fmt = WDMA_OUTPUT_FORMAT_BGRA;
		break;
	case eABGR8888:
		wdma_fmt = WDMA_OUTPUT_FORMAT_ABGR;
		break;
	case eRGBA8888:
		wdma_fmt = WDMA_OUTPUT_FORMAT_RGBA;
		break;
	default:
		DISP_ERR("DDP error, unknow wdma_fmt=%d\n", wdma_fmt);
	}

	return wdma_fmt;
}
Esempio n. 4
0
static int disp_bls_release_mutex(void)
{ 
    if (gBLSMutexID < 0)
        return -1;
    
    DISP_REG_SET(DISP_REG_CONFIG_MUTEX(gBLSMutexID), 0);
    if(disp_poll_for_reg(DISP_REG_CONFIG_MUTEX(gBLSMutexID), 0, 0x2, POLLING_TIME_OUT))
    {
        DISP_ERR("release mutex timeout! \n");
        disp_dump_reg(DISP_MODULE_CONFIG);
        return -1;
    }
    return 0;

}
Esempio n. 5
0
enum RDMA_OUTPUT_FORMAT rdma_output_fmt_convert(DpColorFormat fmt)
{
	enum RDMA_OUTPUT_FORMAT rdma_fmt = RDMA_OUTPUT_FORMAT_ARGB;
	switch (fmt) {
	case eRGB565:
		rdma_fmt = RDMA_OUTPUT_FORMAT_ARGB;
		break;
		/* case eYUV_444_1P           : */
		/* rdma_fmt = RDMA_OUTPUT_FORMAT_YUV444   ;  break; */
	default:
		DISP_ERR("error: rdma_fmt_convert fmt=%d, rdma_fmt=%d\n", fmt, rdma_fmt);
	}

	return rdma_fmt;
}
Esempio n. 6
0
void WDMAWait(unsigned idx)
{
	/* polling interrupt status */
	unsigned int delay_cnt = 0;
	while ((DISP_REG_GET(0x1000 * idx + DISP_REG_WDMA_INTSTA) & 0x1) != 0x1) {
		delay_cnt++;
		/*msleep(1);*/
		/* use usleep_range(min, max) instead */
		usleep_range(1000, 1100);
		if (delay_cnt > 100) {
			DISP_ERR("[DDP] error:WDMA%dWait timeout\n", idx);
			break;
		}
	}
	DISP_REG_SET(0x1000 * idx + DISP_REG_WDMA_INTSTA, 0x0);

}
Esempio n. 7
0
enum RDMA_INPUT_FORMAT rdma_fmt_convert(DpColorFormat fmt)
{
	enum RDMA_INPUT_FORMAT rdma_fmt = RDMA_INPUT_FORMAT_RGB565;
	switch (fmt) {
	case eRGB565:
		rdma_fmt = RDMA_INPUT_FORMAT_RGB565;
		break;
	case eRGB888:
		rdma_fmt = RDMA_INPUT_FORMAT_RGB888;
		break;
	case eBGR565:
		rdma_fmt = RDMA_INPUT_FORMAT_BGR565;
		break;
	case eBGR888:
		rdma_fmt = RDMA_INPUT_FORMAT_BGR888;
		break;

	case eARGB8888:
	case ePARGB8888:
	case eXARGB8888:
		rdma_fmt = RDMA_INPUT_FORMAT_ARGB;
		break;
	case eABGR8888:
	case ePABGR8888:
	case eXABGR8888:
		rdma_fmt = RDMA_INPUT_FORMAT_ABGR;
		break;

	case eYUY2:
		rdma_fmt = RDMA_INPUT_FORMAT_YUYV;
		break;
	case eUYVY:
		rdma_fmt = RDMA_INPUT_FORMAT_UYVY;
		break;
	case eYVYU:
		rdma_fmt = RDMA_INPUT_FORMAT_YVYU;
		break;
	case eVYUY:
		rdma_fmt = RDMA_INPUT_FORMAT_VYUY;
		break;
	default:
		DISP_ERR("error: rdma_fmt_convert fmt=%d, rdma_fmt=%d\n", fmt, rdma_fmt);
	}
	return rdma_fmt;
}
void disp_bls_update_gamma_lut(void)
{
#if defined(DDP_GAMMA_SUPPORT)
        int index, i;
        unsigned long regValue;
        unsigned long CurVal, Count;
    
        DISP_MSG("disp_bls_update_gamma_lut!\n");
    
        if (DISP_REG_GET(DISP_REG_BLS_EN) & 0x1)
        {
            DISP_ERR("try to update gamma lut while BLS is active\n");
            return;
        }
    
        // init gamma table
        for(index = 0; index < 3; index++)
        {    
            for(Count = 0; Count < 257 ; Count++)
            {  
                 g_gamma_lut.entry[index][Count] = g_gamma_index.entry[index][Count];
            }
        }
    
        DISP_REG_SET(DISP_REG_BLS_LUT_UPDATE, 0x1);
            
        for (i = 0; i < 256 ; i++)
        {
            CurVal = (((g_gamma_lut.entry[0][i]&0x3FF)<<20) | ((g_gamma_lut.entry[1][i]&0x3FF)<<10) | (g_gamma_lut.entry[2][i]&0x3FF));
            DISP_REG_SET(DISP_REG_BLS_GAMMA_LUT(i), CurVal);
            DISP_DBG("[%d] GAMMA LUT = 0x%x, (%lu, %lu, %lu)\n", i, DISP_REG_GET(DISP_REG_BLS_GAMMA_LUT(i)), 
                g_gamma_lut.entry[0][i], g_gamma_lut.entry[1][i], g_gamma_lut.entry[2][i]);
        }
        
        /* Set Gamma Last point*/    
        DISP_REG_SET(DISP_REG_BLS_GAMMA_SETTING, 0x00000001);
        
        // set gamma last index
        CurVal = (((g_gamma_lut.entry[0][256]&0x3FF)<<20) | ((g_gamma_lut.entry[1][256]&0x3FF)<<10) | (g_gamma_lut.entry[2][256]&0x3FF));
        DISP_REG_SET(DISP_REG_BLS_GAMMA_BOUNDARY, CurVal);
            
        DISP_REG_SET(DISP_REG_BLS_LUT_UPDATE, 0);
#endif
}
Esempio n. 9
0
void disp_bls_update_pwm_lut(void)
{
    int i;
    unsigned int regValue;

    DISP_MSG("disp_bls_update_pwm_lut!\n");

    regValue = DISP_REG_GET(DISP_REG_BLS_EN);
    if (regValue & 0x1) {
        DISP_ERR("update PWM LUT while BLS func enabled!\n");
        disp_dump_reg(DISP_MODULE_BLS);
    }
    //DISP_REG_SET(DISP_REG_BLS_EN, (regValue & 0x00010000));

    for (i = 0; i < PWM_LUT_ENTRY; i++)
    {
        DISP_REG_SET(DISP_REG_BLS_LUMINANCE(i), g_pwm_lut.entry[i]);
        DISP_DBG("[%d] PWM LUT = 0x%x (%lu)\n", i, DISP_REG_GET(DISP_REG_BLS_LUMINANCE(i)), g_pwm_lut.entry[i]);

    }
    DISP_REG_SET(DISP_REG_BLS_LUMINANCE_255, g_pwm_lut.entry[PWM_LUT_ENTRY-1]);
    //DISP_REG_SET(DISP_REG_BLS_EN, regValue);

}
Esempio n. 10
0
int WDMAConfig2(unsigned idx,
		unsigned inputFormat,
		unsigned srcWidth,
		unsigned srcHeight,
		unsigned clipX,
		unsigned clipY,
		unsigned clipWidth,
		unsigned clipHeight,
		DpColorFormat out_formt,
		unsigned dstAddress,
		unsigned dstWidth,
		unsigned dstPitch, unsigned dstUVPitch, bool useSpecifiedAlpha, unsigned char alpha)
{
	unsigned int output_format = 0;
	unsigned int byte_swap = 0;
	unsigned int rgb_swap = 0;
	unsigned int uv_swap = 0;

	unsigned input_color_space;	/* check input format color space */
	unsigned output_color_space;	/* check output format color space */
	unsigned mode = 0xdeaddead;
	/* unsigned bpp; */
	unsigned char *yAddr, *uAddr, *vAddr;
	enum WDMA_OUTPUT_FORMAT outputFormat = wdma_fmt_convert(out_formt);

	ASSERT((WDMA_INPUT_FORMAT_ARGB == inputFormat) ||
	       (WDMA_INPUT_FORMAT_YUV444 == inputFormat));

	/* should use OVL alpha instead of sw config */
	useSpecifiedAlpha = 0;
	alpha = 0xff;

	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_SRC_SIZE, srcHeight << 16 | srcWidth);
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_CLIP_COORD, clipY << 16 | clipX);
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_CLIP_SIZE,
		     clipHeight << 16 | clipWidth);

	DISP_REG_SET_FIELD(WDMA_CFG_FLD_In_Format, idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_CFG,
			   inputFormat);

	switch (outputFormat) {
	case WDMA_OUTPUT_FORMAT_RGB565:
	case WDMA_OUTPUT_FORMAT_RGB888:
	case WDMA_OUTPUT_FORMAT_ARGB:
	case WDMA_OUTPUT_FORMAT_XRGB:
	case WDMA_OUTPUT_FORMAT_UYVY:
	case WDMA_OUTPUT_FORMAT_GREY:
	case WDMA_OUTPUT_FORMAT_YV12:
	case WDMA_OUTPUT_FORMAT_NV12:
	case WDMA_OUTPUT_FORMAT_NV21:
		output_format = outputFormat;
		byte_swap = 0;
		rgb_swap = 0;
		uv_swap = 0;
		break;
	case WDMA_OUTPUT_FORMAT_YUYV:
		output_format = WDMA_OUTPUT_FORMAT_UYVY;
		byte_swap = 0;
		rgb_swap = 0;
		uv_swap = 1;
		break;
	case WDMA_OUTPUT_FORMAT_BGR888:
		output_format = WDMA_OUTPUT_FORMAT_RGB888;
		byte_swap = 0;
		rgb_swap = 1;
		uv_swap = 0;
		break;
	case WDMA_OUTPUT_FORMAT_BGRA:
		output_format = WDMA_OUTPUT_FORMAT_ARGB;
		byte_swap = 1;
		rgb_swap = 0;
		uv_swap = 0;
		break;
	case WDMA_OUTPUT_FORMAT_ABGR:
		output_format = WDMA_OUTPUT_FORMAT_ARGB;
		byte_swap = 0;
		rgb_swap = 1;
		uv_swap = 0;
		break;
	case WDMA_OUTPUT_FORMAT_RGBA:
		output_format = WDMA_OUTPUT_FORMAT_ARGB;
		byte_swap = 1;
		rgb_swap = 1;
		uv_swap = 0;
		break;
	case WDMA_OUTPUT_FORMAT_XBGR:
		output_format = WDMA_OUTPUT_FORMAT_XRGB;
		byte_swap = 0;
		rgb_swap = 1;
		uv_swap = 0;
		break;
	default:
		DISP_ERR("[DDP] error: invalid color format:0x%x\n", outputFormat);
		ASSERT(0);	/* invalid format */
	}
	DISP_REG_SET_FIELD(WDMA_CFG_FLD_Out_Format, idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_CFG,
			   output_format);
	DISP_REG_SET_FIELD(WDMA_CFG_FLD_BYTE_SWAP, idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_CFG,
			   byte_swap);
	DISP_REG_SET_FIELD(WDMA_CFG_FLD_RGB_SWAP, idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_CFG,
			   rgb_swap);
	DISP_REG_SET_FIELD(WDMA_CFG_FLD_UV_SWAP, idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_CFG,
			   uv_swap);


	/* set DNSP for UYVY and YUV_3P format for better quality */
	if (outputFormat == WDMA_OUTPUT_FORMAT_UYVY || outputFormat == WDMA_OUTPUT_FORMAT_YUYV) {
		DISP_REG_SET_FIELD(WDMA_CFG_FLD_DNSP_SEL,
				   idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_CFG, 1);
	} else {
		DISP_REG_SET_FIELD(WDMA_CFG_FLD_DNSP_SEL,
				   idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_CFG, 0);
	}

	switch (inputFormat) {
	case WDMA_INPUT_FORMAT_ARGB:
		input_color_space = WDMA_COLOR_SPACE_RGB;
		break;
	case WDMA_INPUT_FORMAT_YUV444:
		input_color_space = WDMA_COLOR_SPACE_YUV;
		break;
	default:
		DISP_ERR("[DDP] error: invalid color format:0x%x\n", inputFormat);
		ASSERT(0);
	}

	switch (outputFormat) {
	case WDMA_OUTPUT_FORMAT_RGB565:
	case WDMA_OUTPUT_FORMAT_RGB888:
	case WDMA_OUTPUT_FORMAT_ARGB:
	case WDMA_OUTPUT_FORMAT_XRGB:
	case WDMA_OUTPUT_FORMAT_BGR888:
	case WDMA_OUTPUT_FORMAT_BGRA:
	case WDMA_OUTPUT_FORMAT_ABGR:
	case WDMA_OUTPUT_FORMAT_RGBA:
	case WDMA_OUTPUT_FORMAT_XBGR:
		output_color_space = WDMA_COLOR_SPACE_RGB;
		break;
	case WDMA_OUTPUT_FORMAT_UYVY:
	case WDMA_OUTPUT_FORMAT_YUYV:
	case WDMA_OUTPUT_FORMAT_GREY:
	case WDMA_OUTPUT_FORMAT_YV12:
	case WDMA_OUTPUT_FORMAT_NV12:
	case WDMA_OUTPUT_FORMAT_NV21:
		output_color_space = WDMA_COLOR_SPACE_YUV;
		break;
	default:
		DISP_ERR("[DDP] error: invalid color format:0x%x\n", outputFormat);
		ASSERT(0);
	}

	if (WDMA_COLOR_SPACE_RGB == input_color_space && WDMA_COLOR_SPACE_YUV == output_color_space) {
		/* RGB to YUV required */
		mode = RGB2YUV_601;
	} else if (WDMA_COLOR_SPACE_YUV == input_color_space &&
		   WDMA_COLOR_SPACE_RGB == output_color_space) {
		/* YUV to RGB required */
		mode = YUV2RGB_601_16_16;
	}

	if (TABLE_NO > mode) {	/* set matrix as mode */
		DISP_REG_SET_FIELD(WDMA_C00_FLD_C00, idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_C00,
				   coef[mode][0][0]);
		DISP_REG_SET_FIELD(WDMA_C00_FLD_C01, idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_C00,
				   coef[mode][0][1]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_C02, coef[mode][0][2]);

		DISP_REG_SET_FIELD(WDMA_C10_FLD_C10, idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_C10,
				   coef[mode][1][0]);
		DISP_REG_SET_FIELD(WDMA_C10_FLD_C11, idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_C10,
				   coef[mode][1][1]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_C12, coef[mode][1][2]);

		DISP_REG_SET_FIELD(WDMA_C20_FLD_C20, idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_C20,
				   coef[mode][2][0]);
		DISP_REG_SET_FIELD(WDMA_C20_FLD_C21, idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_C20,
				   coef[mode][2][1]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_C22, coef[mode][2][2]);

		DISP_REG_SET_FIELD(WDMA_PRE_ADD0_FLD_PRE_ADD_0,
				   idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_PRE_ADD0,
				   coef[mode][3][0]);
		DISP_REG_SET_FIELD(WDMA_PRE_ADD0_FLD_SIGNED_0,
				   idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_PRE_ADD0, 0);
		DISP_REG_SET_FIELD(WDMA_PRE_ADD0_FLD_PRE_ADD_1,
				   idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_PRE_ADD0,
				   coef[mode][3][1]);
		DISP_REG_SET_FIELD(WDMA_PRE_ADD0_FLD_SIGNED_1,
				   idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_PRE_ADD0, 0);

		DISP_REG_SET_FIELD(WDMA_PRE_ADD2_FLD_PRE_ADD_2,
				   idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_PRE_ADD2,
				   coef[mode][3][2]);
		DISP_REG_SET_FIELD(WDMA_PRE_ADD2_FLD_SIGNED_2,
				   idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_PRE_ADD2, 0);

		DISP_REG_SET_FIELD(WDMA_POST_ADD0_FLD_POST_ADD_0,
				   idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_POST_ADD0,
				   coef[mode][4][0]);
		DISP_REG_SET_FIELD(WDMA_POST_ADD0_FLD_POST_ADD_1,
				   idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_POST_ADD0,
				   coef[mode][4][1]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_POST_ADD2, coef[mode][4][2]);

		DISP_REG_SET_FIELD(WDMA_CFG_FLD_EXT_MTX_EN,
				   idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_CFG, 1);
		DISP_REG_SET_FIELD(WDMA_CFG_FLD_CT_EN, idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_CFG,
				   1);
	} else {
		DISP_REG_SET_FIELD(WDMA_CFG_FLD_EXT_MTX_EN,
				   idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_CFG, 0);
		DISP_REG_SET_FIELD(WDMA_CFG_FLD_CT_EN, idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_CFG,
				   0);
	}
	/* YUV format parameters */
	yAddr = (unsigned char *)dstAddress;
	switch (outputFormat) {
	case WDMA_OUTPUT_FORMAT_UYVY:
	case WDMA_OUTPUT_FORMAT_YUYV:
	case WDMA_OUTPUT_FORMAT_GREY:
		uAddr = yAddr;
		vAddr = yAddr;
		break;
	case WDMA_OUTPUT_FORMAT_YV12:
		/* TODO: remove this input parameter, just ignore and recalculate it now. */
		dstUVPitch = ALIGN_TO(dstPitch / 2, 16);
		vAddr = yAddr + dstPitch * srcHeight;
		uAddr = vAddr + dstUVPitch * srcHeight / 2;
		break;
	case WDMA_OUTPUT_FORMAT_NV12:
	case WDMA_OUTPUT_FORMAT_NV21:
		uAddr = yAddr + dstPitch * srcHeight;
		vAddr = uAddr;
		break;
	default:
		break;
	}
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_DST_ADDR, dstAddress);
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_DST_W_IN_BYTE, dstPitch);
	if (WDMA_COLOR_SPACE_YUV == output_color_space) {
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_DST_U_ADDR,
			     (unsigned int)uAddr);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_DST_V_ADDR,
			     (unsigned int)vAddr);
		DISP_REG_SET_FIELD(WDMA_BUF_ADDR_FLD_UV_Pitch,
				   idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_DST_UV_PITCH,
				   dstUVPitch);
	}
	DISP_REG_SET_FIELD(WDMA_ALPHA_FLD_A_Sel, idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_ALPHA,
			   useSpecifiedAlpha);
	DISP_REG_SET_FIELD(WDMA_ALPHA_FLD_A_Value, idx * DISP_INDEX_OFFSET + DISP_REG_WDMA_ALPHA,
			   alpha);

	return 0;
}
Esempio n. 11
0
int RDMAConfig(unsigned idx,
	       enum RDMA_MODE mode,
	       DpColorFormat inFormat,
	       unsigned address,
	       enum RDMA_OUTPUT_FORMAT outputFormat,
	       unsigned pitch,
	       unsigned width,
	       unsigned height,
	       bool isByteSwap,	/* input setting */
	       bool isRGBSwap) /* ourput setting */
{
	unsigned int bpp = 2;
	unsigned int rgb_swap = 0;
	unsigned int input_is_yuv = 0;
	unsigned int output_is_yuv = 0;
	/* Calculate fifo settings */
	unsigned int fifo_pseudo_length = 256;
	unsigned int fifo_threashold;
	/* Calculate ultra settings */
	unsigned int fps = 60;
	unsigned int blank_overhead = 115;	/* it is 1.15, need to divide 100 later */
	unsigned int rdma_fifo_width = 16;	/* in unit of byte */
	unsigned int ultra_low_time = 6;	/* in unit of us */
	unsigned int pre_ultra_low_time = 8;	/* in unit of us */
	unsigned int pre_ultra_high_time = 9;	/* in unit of us */
	unsigned int consume_levels_per_usec;
	unsigned int ultra_low_level;
	unsigned int pre_ultra_low_level;
	unsigned int pre_ultra_high_level;
	unsigned int ultra_high_ofs;
	unsigned int pre_ultra_low_ofs;
	unsigned int pre_ultra_high_ofs;
	enum RDMA_INPUT_FORMAT inputFormat;

	if ((DISP_IsDecoupleMode() == 0) || (gEnableUltra == 1)) {
		if (gUltraLevel == 0) {
			ultra_low_time = 4;	/* in unit of us */
			pre_ultra_low_time = 6;	/* in unit of us */
			pre_ultra_high_time = 7;	/* in unit of us */
		} else if (gUltraLevel == 1) {
			ultra_low_time = 5;	/* in unit of us */
			pre_ultra_low_time = 7;	/* in unit of us */
			pre_ultra_high_time = 8;	/* in unit of us */
		} else if (gUltraLevel == 2) {
			ultra_low_time = 6;	/* in unit of us */
			pre_ultra_low_time = 8;	/* in unit of us */
			pre_ultra_high_time = 9;	/* in unit of us */
		}
	}
	inputFormat = rdma_fmt_convert(inFormat);
	ASSERT(idx <= 2);
	if ((width > RDMA_MAX_WIDTH) || (height > RDMA_MAX_HEIGHT)) {
		DISP_ERR("DDP error, RDMA input overflow, w=%d, h=%d, max_w=%d, max_h=%d\n",
			 width, height, RDMA_MAX_WIDTH, RDMA_MAX_HEIGHT);
	}

	if (width == 0 || height == 0) {
		DISP_ERR("DDP error, RDMA input error, w=%d, h=%d, pitch=%d\n", width, height,
			 pitch);
		ASSERT(width > 0);
		ASSERT(height > 0);
	}
	if (mode == RDMA_MODE_MEMORY) {
		ASSERT(pitch > 0);
		ASSERT(address > 0);
	}

	switch (inputFormat) {
	case RDMA_INPUT_FORMAT_YUYV:
	case RDMA_INPUT_FORMAT_UYVY:
	case RDMA_INPUT_FORMAT_YVYU:
	case RDMA_INPUT_FORMAT_VYUY:
	case RDMA_INPUT_FORMAT_RGB565:
		bpp = 2;
		break;
	case RDMA_INPUT_FORMAT_RGB888:
		bpp = 3;
		break;
	case RDMA_INPUT_FORMAT_ARGB:
		bpp = 4;
		break;
		/* More color format support */
	case RDMA_INPUT_FORMAT_BGR565:
		inputFormat -= RDMA_COLOR_BASE;
		bpp = 2;
		rgb_swap = 1;
		break;
	case RDMA_INPUT_FORMAT_BGR888:
		inputFormat -= RDMA_COLOR_BASE;
		bpp = 3;
		rgb_swap = 1;
		break;
	case RDMA_INPUT_FORMAT_ABGR:
		inputFormat -= RDMA_COLOR_BASE;
		bpp = 4;
		rgb_swap = 1;
		break;

	default:
		DISP_ERR("DDP error, unknown RDMA input format = %d\n", inputFormat);
		ASSERT(0);
	}
	/* OUTPUT_VALID_FIFO_THREASHOLD = min{(DISP_WIDTH+120)*bpp/16, FIFO_PSEUDO_LENGTH} */
	fifo_threashold = (width + 120) * bpp / 16;
	fifo_threashold =
	    fifo_threashold > fifo_pseudo_length ? fifo_pseudo_length : fifo_threashold;
	/* -------------------------------------------------------- */
	/* calculate ultra/pre-ultra setting */
	/* to start to issue ultra from fifo having 4us data */
	/* to stop  to issue ultra until fifo having 6us data */
	/* to start to issue pre-ultra from fifo having 6us data */
	/* to stop  to issue pre-ultra until fifo having 7us data */
	/* the sequence is ultra_low < pre_ultra_low < ultra_high < pre_ultra_high */
	/* 4us         6us             6us+1level   7us */
	/* -------------------------------------------------------- */
	consume_levels_per_usec =
	    (width * height * fps * bpp / rdma_fifo_width / 100) * blank_overhead;

	/* /1000000 for ultra_low_time in unit of us */
	ultra_low_level = ultra_low_time * consume_levels_per_usec / 1000000;
	pre_ultra_low_level = pre_ultra_low_time * consume_levels_per_usec / 1000000;
	pre_ultra_high_level = pre_ultra_high_time * consume_levels_per_usec / 1000000;
	pre_ultra_low_ofs = pre_ultra_low_level - ultra_low_level;
	ultra_high_ofs = 1;
	pre_ultra_high_ofs = pre_ultra_high_level - pre_ultra_low_level - 1;

	if ((DISP_IsDecoupleMode() == 0) || (gEnableUltra == 1)) {
		if (gUltraLevel == 4) {
			ultra_low_level = 0x6b;
			pre_ultra_low_ofs = 0xa0;
			ultra_high_ofs = 1;
			pre_ultra_high_ofs = 1;
		} else if (gUltraLevel == 3) {
			ultra_low_level = 0x6b;
			pre_ultra_low_ofs = 0x36;
			ultra_high_ofs = 0x50;
			pre_ultra_high_ofs = 0x14;
		}
	}

	switch (inputFormat) {
	case RDMA_INPUT_FORMAT_YUYV:
	case RDMA_INPUT_FORMAT_UYVY:
	case RDMA_INPUT_FORMAT_YVYU:
	case RDMA_INPUT_FORMAT_VYUY:
		input_is_yuv = 1;
		break;

	case RDMA_INPUT_FORMAT_RGB565:
	case RDMA_INPUT_FORMAT_RGB888:
	case RDMA_INPUT_FORMAT_ARGB:
		input_is_yuv = 0;
		break;

	default:
		DISP_ERR("DDP error, unknow input format is %d\n", inputFormat);
		ASSERT(0);
	}

	if (outputFormat == RDMA_OUTPUT_FORMAT_ARGB)
		output_is_yuv = 0;
	else
		output_is_yuv = 1;

	if (input_is_yuv == 1 && output_is_yuv == 0) {
		DISP_REG_SET_FIELD(SIZE_CON_0_FLD_MATRIX_ENABLE,
				   idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_SIZE_CON_0, 1);
		DISP_REG_SET_FIELD(SIZE_CON_0_FLD_MATRIX_INT_MTX_SEL,
				   idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_SIZE_CON_0, 0x6);
		/* set color conversion matrix */
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_00,
			     coef_rdma_601_y2r[0][0]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_01,
			     coef_rdma_601_y2r[0][1]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_02,
			     coef_rdma_601_y2r[0][2]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_10,
			     coef_rdma_601_y2r[1][0]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_11,
			     coef_rdma_601_y2r[1][1]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_12,
			     coef_rdma_601_y2r[1][2]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_20,
			     coef_rdma_601_y2r[2][0]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_21,
			     coef_rdma_601_y2r[2][1]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_22,
			     coef_rdma_601_y2r[2][2]);

		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_PRE_ADD0,
			     coef_rdma_601_y2r[3][0]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_PRE_ADD1,
			     coef_rdma_601_y2r[3][1]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_PRE_ADD2,
			     coef_rdma_601_y2r[3][2]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_POST_ADD0,
			     coef_rdma_601_y2r[4][0]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_POST_ADD1,
			     coef_rdma_601_y2r[4][1]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_POST_ADD2,
			     coef_rdma_601_y2r[4][2]);
	} else if (input_is_yuv == 0 && output_is_yuv == 1) {
		DISP_REG_SET_FIELD(SIZE_CON_0_FLD_MATRIX_ENABLE,
				   idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_SIZE_CON_0, 1);
		DISP_REG_SET_FIELD(SIZE_CON_0_FLD_MATRIX_INT_MTX_SEL,
				   idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_SIZE_CON_0, 0x2);
		/* set color conversion matrix */
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_00,
			     coef_rdma_601_r2y[0][0]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_01,
			     coef_rdma_601_r2y[0][1]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_02,
			     coef_rdma_601_r2y[0][2]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_10,
			     coef_rdma_601_r2y[1][0]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_11,
			     coef_rdma_601_r2y[1][1]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_12,
			     coef_rdma_601_r2y[1][2]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_20,
			     coef_rdma_601_r2y[2][0]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_21,
			     coef_rdma_601_r2y[2][1]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_22,
			     coef_rdma_601_r2y[2][2]);

		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_PRE_ADD0,
			     coef_rdma_601_r2y[3][0]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_PRE_ADD1,
			     coef_rdma_601_r2y[3][1]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_PRE_ADD2,
			     coef_rdma_601_r2y[3][2]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_POST_ADD0,
			     coef_rdma_601_r2y[4][0]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_POST_ADD1,
			     coef_rdma_601_r2y[4][1]);
		DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_CF_POST_ADD2,
			     coef_rdma_601_r2y[4][2]);
	} else {
		DISP_REG_SET_FIELD(SIZE_CON_0_FLD_MATRIX_ENABLE,
				   idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_SIZE_CON_0, 0);
		DISP_REG_SET_FIELD(SIZE_CON_0_FLD_MATRIX_INT_MTX_SEL,
				   idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_SIZE_CON_0, 0);
	}

	DISP_REG_SET_FIELD(GLOBAL_CON_FLD_MODE_SEL,
			   idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_GLOBAL_CON, mode);
	DISP_REG_SET_FIELD(MEM_CON_FLD_MEM_MODE_INPUT_FORMAT,
			   idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_MEM_CON, inputFormat);

	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_MEM_START_ADDR, address);
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_MEM_SRC_PITCH, pitch);
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_INT_ENABLE, 0x3F);

	DISP_REG_SET_FIELD(SIZE_CON_0_FLD_INPUT_BYTE_SWAP,
			   idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_SIZE_CON_0, isByteSwap);
	DISP_REG_SET_FIELD(SIZE_CON_0_FLD_OUTPUT_FORMAT,
			   idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_SIZE_CON_0, outputFormat);
	DISP_REG_SET_FIELD(SIZE_CON_0_FLD_OUTPUT_FRAME_WIDTH,
			   idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_SIZE_CON_0, width);
	DISP_REG_SET_FIELD(SIZE_CON_0_FLD_OUTPUT_RGB_SWAP,
			   idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_SIZE_CON_0, isRGBSwap
			   || rgb_swap);
	DISP_REG_SET_FIELD(SIZE_CON_1_FLD_OUTPUT_FRAME_HEIGHT,
			   idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_SIZE_CON_1, height);


	/* RDMA fifo config */
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_FIFO_CON,
		     (1 << 31) | (fifo_pseudo_length << 16) | fifo_threashold);
	/* disp_rdma ultra high setting */
	DISP_REG_SET(idx * DISP_INDEX_OFFSET + DISP_REG_RDMA_MEM_GMC_SETTING_0,
		     (pre_ultra_high_ofs << 24) | (ultra_high_ofs << 16) | (pre_ultra_low_ofs << 8)
		     | ultra_low_level);

	return 0;
}
static void process_dbg_opt(const char *opt)
{
    char *buf = dbg_buf + strlen(dbg_buf);
    if (0 == strncmp(opt, "regr:", 5))
    {
        char *p = (char *)opt + 5;
        unsigned int addr = (unsigned int) simple_strtoul(p, &p, 16);

        if (addr) 
        {
            unsigned int regVal = DISP_REG_GET(addr);
            DISP_MSG("regr: 0x%08X = 0x%08X\n", addr, regVal);
            sprintf(buf, "regr: 0x%08X = 0x%08X\n", addr, regVal);
        } else {
            goto Error;
        }
    }
    else if (0 == strncmp(opt, "regw:", 5))
    {
        char *p = (char *)opt + 5;
        unsigned int addr = (unsigned int) simple_strtoul(p, &p, 16);
        unsigned int val = (unsigned int) simple_strtoul(p + 1, &p, 16);
        if (addr) 
        {
            unsigned int regVal;
            DISP_REG_SET(addr, val);
            regVal = DISP_REG_GET(addr);
            DISP_DBG("regw: 0x%08X, 0x%08X = 0x%08X\n", addr, val, regVal);
            sprintf(buf, "regw: 0x%08X, 0x%08X = 0x%08X\n", addr, val, regVal);
        } else {
            goto Error;
        }
    }
    else if (0 == strncmp(opt, "dbg_log:", 8))
    {
        char *p = (char *)opt + 8;
        unsigned int enable = (unsigned int) simple_strtoul(p, &p, 10);
        if (enable)
            dbg_log = 1;
        else
            dbg_log = 0;

        sprintf(buf, "dbg_log: %d\n", dbg_log);
    }
    else if (0 == strncmp(opt, "irq_log:", 8))
    {
        char *p = (char *)opt + 8;
        unsigned int enable = (unsigned int) simple_strtoul(p, &p, 10);
        if (enable)
            irq_log = 1;
        else
            irq_log = 0;
        
        sprintf(buf, "irq_log: %d\n", irq_log);        
    }
    else if (0 == strncmp(opt, "backlight:", 10))
    {
        char *p = (char *)opt + 10;
        unsigned int level = (unsigned int) simple_strtoul(p, &p, 10);

        if (level) 
        {
            disp_bls_set_backlight(level);            
            sprintf(buf, "backlight: %d\n", level); 
        } else {
            goto Error;
        }
    }
    else if (0 == strncmp(opt, "dump_reg:", 9))
    {
        char *p = (char *)opt + 9;
        unsigned int module = (unsigned int) simple_strtoul(p, &p, 10);
        DISP_MSG("process_dbg_opt, module=%d \n", module);
        if (module<DISP_MODULE_MAX) 
        {
            disp_dump_reg(module);            
            sprintf(buf, "dump_reg: %d\n", module); 
        } else {
            DISP_MSG("process_dbg_opt2, module=%d \n", module);
            goto Error;
        }
    }
    else if (0 == strncmp(opt, "dump_aal:", 9))
    {        
        char *p = (char *)opt + 9;
        unsigned int arg = (unsigned int) simple_strtoul(p, &p, 10);
        if (arg == 0)
        {
            int i;
            unsigned int hist[LUMA_HIST_BIN];
            disp_get_hist(hist);
            for (i = 0; i < LUMA_HIST_BIN; i++)
            {
                DISP_DBG("LUMA_HIST_%02d: %d\n", i, hist[i]);
                sprintf(dbg_buf + strlen(dbg_buf), "LUMA_HIST_%2d: %d\n", i, hist[i]);
            }
        }
        else if (arg == 1)
        {
            int i;
            DISP_AAL_PARAM param;
            
            GetUpdateMutex();
            memcpy(&param, get_aal_config(), sizeof(DISP_AAL_PARAM));
            ReleaseUpdateMutex();

            DISP_DBG("pwmDuty: %lu\n", param.pwmDuty);
            sprintf(dbg_buf + strlen(dbg_buf), "pwmDuty: %lu\n", param.pwmDuty);
            for (i = 0; i < LUMA_CURVE_POINT; i++)
            {
                DISP_DBG("lumaCurve[%02d]: %lu\n", i, param.lumaCurve[i]);
                sprintf(dbg_buf + strlen(dbg_buf), "lumaCurve[%02d]: %lu\n", i, param.lumaCurve[i]);
            }
        }
    }
    else if (0 == strncmp(opt, "debug:", 6))
    {
        char *p = (char *)opt + 6;
        unsigned int enable = (unsigned int) simple_strtoul(p, &p, 10);
        if(enable==1)
        {
            printk("[DDP] debug=1, trigger AEE\n");
            aee_kernel_exception("DDP-TEST-ASSERT", "[DDP] DDP-TEST-ASSERT");
        }
        else if(enable==2)
        {
           ddp_mem_test();
        }
        else if(enable==3)
        {
           ddp_mem_test2();
        }
    }
    else if (0 == strncmp(opt, "mmp", 3))
    {
        init_ddp_mmp_events();
    }
    else if (0 == strncmp(opt, "dpfd_ut1:", 9))
    {
        char *p = (char *)opt + 9;
        unsigned int channel = (unsigned int) simple_strtoul(p, &p, 10);        
        ddpk_testfunc_1(channel);
    }
    else if (0 == strncmp(opt, "dpfd_ut2:", 9))
    {
        char *p = (char *)opt + 9;
        unsigned int channel = (unsigned int) simple_strtoul(p, &p, 10);        
        ddpk_testfunc_2(channel);
    }
    else if (0 == strncmp(opt, "dpfd:log", 8))
    {
    }
    else if (0 == strncmp(opt, "pqon", 4))
    {
        pq_debug_flag=0;
        sprintf(buf, "Turn on PQ %d\n", pq_debug_flag);
    }
    else if (0 == strncmp(opt, "pqoff", 5))
    {
        pq_debug_flag=1;
        sprintf(buf, "Turn off PQ %d\n", pq_debug_flag);        
    }
    else if (0 == strncmp(opt, "pqdemo", 6))
    {
        pq_debug_flag=2;
        sprintf(buf, "Turn on PQ (demo) %d\n", pq_debug_flag);    
    }
    else if (0 == strncmp(opt, "pqstop", 6))
    {
        pq_debug_flag=3;
        sprintf(buf, "Stop mutex update %d\n", pq_debug_flag);    
    }
    else if (0 == strncmp(opt, "aalon", 5))
    {
        aal_debug_flag=0;
        sprintf(buf, "resume aal update %d\n", aal_debug_flag);    
    }
    else if (0 == strncmp(opt, "aaloff", 6))
    {
        aal_debug_flag=1;
        sprintf(buf, "suspend aal update %d\n", aal_debug_flag);    
    }
    else if (0 == strncmp(opt, "color_win:", 10))
    {
        char *p = (char *)opt + 10;
        unsigned int sat_upper, sat_lower, hue_upper, hue_lower;
        sat_upper = (unsigned int) simple_strtoul(p, &p, 10);
        p++;
        sat_lower = (unsigned int) simple_strtoul(p, &p, 10);
        p++;
        hue_upper = (unsigned int) simple_strtoul(p, &p, 10);
        p++;
        hue_lower = (unsigned int) simple_strtoul(p, &p, 10);
        DISP_MSG("Set color_win: %u, %u, %u, %u\n", sat_upper, sat_lower, hue_upper, hue_lower);
        disp_color_set_window(sat_upper, sat_lower, hue_upper, hue_lower);
    }
    else
    {
	    goto Error;
    }

    return;

Error:
    DISP_ERR("parse command error!\n%s\n\n%s", opt, STR_HELP);
}