static void esp_dma_go(struct ncr53c9x_softc *sc) { struct esp_softc *esc = (struct esp_softc *)sc; DMA_GO(esc->sc_dma); }
int bppwrite(dev_t dev, struct uio *uio, int flags) { struct bpp_softc *sc; struct lsi64854_softc *lsi; int error = 0; int s; sc = device_lookup_private(&bpp_cd, BPPUNIT(dev)); lsi = &sc->sc_lsi64854; /* * Wait until the DMA engine is free. */ s = splbpp(); while ((sc->sc_flags & BPP_LOCKED) != 0) { if ((flags & IO_NDELAY) != 0) { splx(s); return EWOULDBLOCK; } sc->sc_flags |= BPP_WANT; error = tsleep(sc->sc_buf, PZERO|PCATCH, "bppwrite", 0); if (error != 0) { splx(s); return error; } } sc->sc_flags |= BPP_LOCKED; splx(s); /* * Move data from user space into our private buffer * and start DMA. */ while (uio->uio_resid > 0) { uint8_t *bp = sc->sc_buf; size_t len = min(sc->sc_bufsz, uio->uio_resid); if ((error = uiomove(bp, len, uio)) != 0) break; while (len > 0) { uint8_t tcr; size_t size = len; DMA_SETUP(lsi, &bp, &len, 0, &size); #ifdef DEBUG if (bppdebug) { int i; uint8_t *b = bp; printf("bpp: writing %ld : ", len); for (i = 0; i < len; i++) printf("%c(0x%x)", b[i], b[i]); printf("\n"); } #endif /* Clear direction control bit */ tcr = bus_space_read_1(lsi->sc_bustag, lsi->sc_regs, L64854_REG_TCR); tcr &= ~BPP_TCR_DIR; bus_space_write_1(lsi->sc_bustag, lsi->sc_regs, L64854_REG_TCR, tcr); /* Enable DMA */ s = splbpp(); DMA_GO(lsi); error = tsleep(sc, PZERO|PCATCH, "bppdma", 0); splx(s); if (error != 0) goto out; /* Bail out if bottom half reported an error */ if ((error = sc->sc_error) != 0) goto out; /* * lsi64854_pp_intr() does this part. * * len -= size; */ } } out: DPRINTF(("bpp done %x\n", error)); s = splbpp(); sc->sc_flags &= ~BPP_LOCKED; if ((sc->sc_flags & BPP_WANT) != 0) { sc->sc_flags &= ~BPP_WANT; wakeup(sc->sc_buf); } splx(s); return error; }