void dma_clear_interrupt_flags(uint32_t dma, uint8_t channel,
uint32_t interrupts)
{
/* Get offset to interrupt flag location in channel field */
uint32_t flags = (interrupts << DMA_FLAG_OFFSET(channel));
DMA_IFCR(dma) = flags;
}
void _USART_DMA_ISR(void)
{
DMA_IFCR(_USART_DMA) |= DMA_IFCR_CTCIF(_USART_DMA_CHANNEL);
dma_disable_transfer_complete_interrupt(_USART_DMA, _USART_DMA_CHANNEL);
usart_disable_tx_dma(_USART);
dma_disable_channel(_USART_DMA, _USART_DMA_CHANNEL);
busy = 0;
}
void dma_channel_reset(uint32_t dma, uint8_t channel)
{
/* Disable channel and reset config bits. */
DMA_CCR(dma, channel) = 0;
/* Reset data transfer number. */
DMA_CNDTR(dma, channel) = 0;
/* Reset peripheral address. */
DMA_CPAR(dma, channel) = 0;
/* Reset memory address. */
DMA_CMAR(dma, channel) = 0;
/* Reset interrupt flags. */
DMA_IFCR(dma) |= DMA_IFCR_CIF(channel);
}
void dma_clear_interrupt_flags(u32 dma, u8 channel, u32 interrupts)
{
/* Get offset to interrupt flag location in channel field */
u32 flags = (interrupts << DMA_FLAG_OFFSET(channel));
DMA_IFCR(dma) = flags;
}
