DISP_STATUS DISP_UpdateScreen(UINT32 x, UINT32 y, UINT32 width, UINT32 height) { LCD_CHECK_RET(LCD_WaitForNotBusy()); if ((lcm_drv->update) && ((lcm_params->type==LCM_TYPE_DBI) || ((lcm_params->type==LCM_TYPE_DSI) && (lcm_params->dsi.mode==CMD_MODE)))) { lcm_drv->update(x, y, width, height); } LCD_CHECK_RET(LCD_SetRoiWindow(x, y, width, height)); LCD_CHECK_RET(LCD_FBSetStartCoord(x, y)); LCD_CHECK_RET(LCD_StartTransfer(FALSE)); if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode==CMD_MODE) { DSI_clk_HS_mode(1); DSI_CHECK_RET(DSI_EnableClk()); } else if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode!=CMD_MODE) { DSI_clk_HS_mode(1); DPI_CHECK_RET(DPI_EnableClk()); DSI_CHECK_RET(DSI_EnableClk()); } return DISP_STATUS_OK; }
DPI_STATUS DPI_StartTransfer(bool isMutexLocked) { // needStartDSI = 1: For command mode or the first time of video mode. // After the first time of video mode. Configuration is applied in ConfigurationUpdateTask. extern struct mutex OverlaySettingMutex; MMProfileLogMetaStringEx(MTKFB_MMP_Events.Debug, MMProfileFlagPulse, isMutexLocked, 0, "StartTransfer"); if (!isMutexLocked) disp_path_get_mutex(); mutex_lock(&OverlaySettingMutex); LCD_CHECK_RET(LCD_ConfigOVL()); // Insert log for trigger point. DBG_OnTriggerLcd(); // To trigger frame update. DPI_EnableClk(); mutex_unlock(&OverlaySettingMutex); if (!isMutexLocked) disp_path_release_mutex(); return DPI_STATUS_OK; }
UINT32 mt65xx_disp_get_lcd_time(void) { #if 0 UINT32 time0, time1, lcd_time; mt65xx_disp_update(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT); LCD_CHECK_RET(LCD_WaitForNotBusy()); time0 = gpt4_tick2time_us(gpt4_get_current_tick()); LCD_CHECK_RET(LCD_StartTransfer(FALSE)); if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode==CMD_MODE) { DSI_clk_HS_mode(1); DSI_CHECK_RET(DSI_EnableClk()); } else if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode!=CMD_MODE) { DSI_clk_HS_mode(1); DPI_CHECK_RET(DPI_EnableClk()); DSI_CHECK_RET(DSI_EnableClk()); } LCD_CHECK_RET(LCD_WaitForNotBusy()); time1 = gpt4_tick2time_us(gpt4_get_current_tick()); lcd_time = time1 - time0; printf("lcd one %d \n", lcd_time); if(0 != lcd_time) return (100000000/lcd_time); else #endif return (6000); }
// protected by sem_flipping, sem_early_suspend, sem_overlay_buffer, sem_update_screen static DISP_STATUS dsi_update_screen(BOOL isMuextLocked) { disp_drv_dsi_init_context(); DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE)); //DSI_CHECK_RET(DSI_handle_TE()); DSI_SetMode(lcm_params->dsi.mode); #ifndef MT65XX_NEW_DISP LCD_CHECK_RET(LCD_StartTransfer(FALSE, isMuextLocked)); #endif if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE && !DDMS_capturing) { //if(1 != lcm_params->dsi.compatibility_for_nvk) if(1) { DSI_clk_HS_mode(1); } #ifndef MT65XX_NEW_DISP DSI_CHECK_RET(DSI_Start()); #else DSI_CHECK_RET(DSI_StartTransfer(isMuextLocked)); #endif } else if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE && !DDMS_capturing) { DSI_clk_HS_mode(1); #ifndef MT65XX_NEW_DISP DPI_CHECK_RET(DPI_EnableClk()); DSI_CHECK_RET(DSI_Start()); #else DSI_CHECK_RET(DSI_StartTransfer(isMuextLocked)); #endif #ifndef BUILD_UBOOT is_video_mode_running = true; if(lcm_params->dsi.noncont_clock) DSI_set_noncont_clk(true, lcm_params->dsi.noncont_clock_period); if(lcm_params->dsi.lcm_int_te_monitor) DSI_set_int_TE(true, lcm_params->dsi.lcm_int_te_period); #endif } if (DDMS_capturing) DISP_LOG_PRINT(ANDROID_LOG_INFO, "DSI", "[DISP] kernel - dsi_update_screen. DDMS is capturing. Skip one frame. \n"); return DISP_STATUS_OK; }
static void init_dpi(BOOL isDpiPoweredOn) { const LCM_DPI_PARAMS *dpi = &(lcm_params->dpi); UINT32 i; DPI_CHECK_RET(DPI_Init(isDpiPoweredOn)); DPI_CHECK_RET(DPI_EnableSeqOutput(FALSE)); DPI_CHECK_RET(DPI_ConfigPixelClk((DPI_POLARITY)dpi->clk_pol, dpi->dpi_clk_div, dpi->dpi_clk_duty)); DPI_CHECK_RET(DPI_ConfigDataEnable((DPI_POLARITY)dpi->de_pol)); DPI_CHECK_RET(DPI_ConfigHsync((DPI_POLARITY)dpi->hsync_pol, dpi->hsync_pulse_width, dpi->hsync_back_porch, dpi->hsync_front_porch)); DPI_CHECK_RET(DPI_ConfigVsync((DPI_POLARITY)dpi->vsync_pol, dpi->vsync_pulse_width, dpi->vsync_back_porch, dpi->vsync_front_porch)); #ifdef MT65XX_NEW_DISP DPI_CHECK_RET(DPI_ConfigLVDS(lcm_params)); #endif DPI_CHECK_RET(DPI_FBSetSize(DISP_GetScreenWidth(), DISP_GetScreenHeight())); for (i = 0; i < dpi->intermediat_buffer_num; ++ i) { DPI_CHECK_RET(DPI_FBSetAddress(DPI_FB_0 + i, s_tmpBuffers[i].pa)); DPI_CHECK_RET(DPI_FBSetPitch(DPI_FB_0 + i, s_tmpBuffers[i].pitchInBytes)); DPI_CHECK_RET(DPI_FBEnable(DPI_FB_0 + i, TRUE)); } DPI_CHECK_RET(DPI_FBSetFormat(dpiTmpBufFormat)); DPI_CHECK_RET(DPI_FBSyncFlipWithLCD(TRUE)); if (LCM_COLOR_ORDER_BGR == dpi->rgb_order) { DPI_CHECK_RET(DPI_SetRGBOrder(DPI_RGB_ORDER_RGB, DPI_RGB_ORDER_BGR)); } else { DPI_CHECK_RET(DPI_SetRGBOrder(DPI_RGB_ORDER_RGB, DPI_RGB_ORDER_RGB)); } DPI_CHECK_RET(DPI_EnableClk()); }
static DISP_STATUS dpi_enable_power(BOOL enable) { if (enable) { DPI_CHECK_RET(DPI_PowerOn()); init_mipi_pll();//for MT6573 and later chip, Must re-init mipi pll for dpi, because pll register have located in //MMSYS1 except MT6516 init_io_pad(); LCD_CHECK_RET(LCD_PowerOn()); DPI_CHECK_RET(DPI_EnableClk()); } else { DPI_CHECK_RET(DPI_DisableClk()); DPI_CHECK_RET(DPI_PowerOff()); LCD_CHECK_RET(LCD_PowerOff()); DPI_mipi_switch(false); } return DISP_STATUS_OK; }
// protected by sem_flipping, sem_early_suspend, sem_overlay_buffer, sem_update_screen static DISP_STATUS dsi_update_screen(void) { disp_drv_dsi_init_context(); DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE)); //DSI_CHECK_RET(DSI_handle_TE()); DSI_SetMode(lcm_params->dsi.mode); LCD_CHECK_RET(LCD_StartTransfer(FALSE)); if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE && !DDMS_capturing) { DSI_clk_HS_mode(1); DSI_CHECK_RET(DSI_EnableClk()); } else if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE && !DDMS_capturing) { #ifndef BUILD_UBOOT spin_lock(&g_handle_esd_lock); #endif DSI_clk_HS_mode(1); DPI_CHECK_RET(DPI_EnableClk()); DSI_CHECK_RET(DSI_EnableClk()); #ifndef BUILD_UBOOT dsi_vdo_streaming = true; if(lcm_params->dsi.noncont_clock) DSI_set_noncont_clk(true, lcm_params->dsi.noncont_clock_period); if(lcm_params->dsi.lcm_int_te_monitor) DSI_set_int_TE(true, lcm_params->dsi.lcm_int_te_period); spin_unlock(&g_handle_esd_lock); #endif } if (DDMS_capturing) DISP_LOG_PRINT(ANDROID_LOG_INFO, "DSI", "[DISP] kernel - dsi_update_screen. DDMS is capturing. Skip one frame. \n"); return DISP_STATUS_OK; }
static void init_dpi(BOOL isDpiPoweredOn) { const LCM_DPI_PARAMS *dpi = &(lcm_params->dpi); UINT32 i; DPI_CHECK_RET(DPI_Init(isDpiPoweredOn)); DPI_CHECK_RET(DPI_ConfigHsync((DPI_POLARITY)dpi->hsync_pol, dpi->hsync_pulse_width, dpi->hsync_back_porch, dpi->hsync_front_porch)); DPI_CHECK_RET(DPI_ConfigVsync((DPI_POLARITY)dpi->vsync_pol, dpi->vsync_pulse_width, dpi->vsync_back_porch, dpi->vsync_front_porch)); DPI_CHECK_RET(DPI_FBSetSize(DISP_GetScreenWidth(), DISP_GetScreenHeight())); DPI_CHECK_RET(DPI_OutputSetting()); DPI_CHECK_RET(DPI_EnableClk()); }
static irqreturn_t _DPI_InterruptHandler(int irq, void *dev_id) { static int counter = 0; DPI_REG_INTERRUPT status = DPI_REG->INT_STATUS; // if (status.FIFO_EMPTY) ++ counter; if(status.VSYNC) { if(dpiIntCallback) dpiIntCallback(DISP_DPI_VSYNC_INT); #ifndef BUILD_UBOOT if(atomic_read(&wait_dpi_vsync)){ if(-1 != hrtimer_try_to_cancel(&hrtimer_vsync_dpi)){ atomic_set(&wait_dpi_vsync, 0); atomic_set(&dpi_vsync, 1); wake_up_interruptible(&_vsync_wait_queue_dpi); hrtimer_start(&hrtimer_vsync_dpi, ktime_set(0, VSYNC_US_TO_NS(vsync_timer_dpi)), HRTIMER_MODE_REL); } } #endif } if (status.VSYNC && counter) { DISP_LOG_PRINT(ANDROID_LOG_ERROR, "DPI", "[Error] DPI FIFO is empty, " "received %d times interrupt !!!\n", counter); counter = 0; } if (status.FIFO_EMPTY) { int need_reset = 0; unsigned long long temp = sched_clock(); unsigned int debug_while_loop_cnt = 0; volatile unsigned int dsi_state = INREG32(DSI_BASE+0x154); if((dsi_state & 0x1ff) == 0x80) { auto_sync_reset_count++; if(auto_sync_reset_count == 10) { auto_sync_reset_count = 0; need_reset = 2; } } else { auto_sync_reset_count = 0; } //printk("gmce,0x%08x, %d\n",(INREG32(DSI_BASE+0x154))&0x1ff, (unsigned int)(temp - last_fifo_empty_stamp)); if(_fifo_empty_monitor_insert((unsigned int)(temp - last_fifo_empty_stamp))) { need_reset = 1; } last_fifo_empty_stamp = temp; if(need_reset) { unsigned int mode, suspend; mode = DSI_GetMode(); suspend = DISP_GetSuspendMode(); if ((mode != CMD_MODE) && !suspend) { DPI_DisableClk(); #if 0 while(1) { debug_while_loop_cnt++; dsi_state = INREG32(DSI_BASE+0x154); if((dsi_state &0x1ff) == 0x100) break; if(debug_while_loop_cnt > 0x1000000) { printk("FATAL Error!! dsi in vact when dpi fifo empty, and can't into vfp until 0x100000 loops!!\n"); } } #endif DSI_clk_HS_mode(0); DSI_SetMode(CMD_MODE); DSI_Reset(); DSI_SetMode(SYNC_PULSE_VDO_MODE); DSI_clk_HS_mode(1); DPI_EnableClk(); DSI_EnableClk(); } printk("[DSI/DPI]reset[%d] mode[%d], suspend[%d]\n", need_reset, mode, suspend); need_reset = 0; } } _DPI_LogRefreshRate(status); OUTREG32(&DPI_REG->INT_STATUS, 0); return IRQ_HANDLED; }
/* Will only be used in hdmi_drv_init(), this means that will only be use in ioctl(MTK_HDMI_AUDIO_VIDEO_ENABLE) */ /*static*/ void hdmi_dpi_config_clock(void) { int ret = 0; RET_VOID_IF(p->output_mode == HDMI_OUTPUT_MODE_DPI_BYPASS); ret = enable_pll(TVDPLL, "HDMI"); if(ret) { HDMI_LOG("enable_pll fail!!\n"); } printk("[hdmi]720p 60Hz\n"); //ret = pll_fsel(TVDPLL, 0x800B6C4E); OUTREG32(TVDPLL_CON1, 0x800B6C4E); //148.5MHz OUTREG32(TVDPLL_CON0, 0x80000081); //OUTREG32(TVDPLL_CON0, 0x80000081); //OUTREG32(DISPSYS_BASE+0x038, 0x1); // rdma0_out_sel, 2 for DPI0 //OUTREG32(DISPSYS_BASE+0x05c, 0x1); // DPI0_SEL, 0 is from rdma0 ASSERT(!ret); clk_pol = HDMI_POLARITY_FALLING; de_pol = HDMI_POLARITY_RISING; hsync_pol = HDMI_POLARITY_RISING; vsync_pol = HDMI_POLARITY_RISING;; hsync_front_porch = 110; hsync_pulse_width = 40; hsync_back_porch = 220; vsync_front_porch = 5; vsync_pulse_width = 5; vsync_back_porch = 20; dpi_clk_div = 2; dpi_clk_duty = 1; rgb_order = hdmi_params->rgb_order; intermediat_buffer_num = 4; // dpi clock configuration using MIPITX //if(hdmi_params->dpi_port == HDMI_DPI_OUTPUT_PORT_0) { DPI_CHECK_RET(DPI_Init(FALSE)); DPI_CHECK_RET(DPI_ConfigPixelClk(clk_pol, dpi_clk_div, dpi_clk_duty)); DPI_CHECK_RET(DPI_ConfigDataEnable(de_pol)); DPI_CHECK_RET(DPI_ConfigHsync(hsync_pol, hsync_pulse_width, hsync_back_porch, hsync_front_porch)); DPI_CHECK_RET(DPI_ConfigVsync(vsync_pol, vsync_pulse_width, vsync_back_porch, vsync_front_porch)); DPI_CHECK_RET(DPI_FBSetSize(1280, 720)); //if (LCM_COLOR_ORDER_BGR == rgb_order) if (HDMI_COLOR_ORDER_BGR == rgb_order) { DPI_CHECK_RET(DPI_SetRGBOrder(DPI_RGB_ORDER_RGB, DPI_RGB_ORDER_BGR)); } else { DPI_CHECK_RET(DPI_SetRGBOrder(DPI_RGB_ORDER_RGB, DPI_RGB_ORDER_RGB)); } //DPI_Internal_Pattern(1, 5); DPI_CHECK_RET(DPI_EnableClk()); p->is_clock_on = true; } }