void adc_pwrdown_enable(void) { #ifndef DRV_ADC_NOT_EXIST #ifndef DRV_ADC_NO_PDN #if (!defined(DRV_ADC_6208_PWRDOWN)) && (!defined(DRV_ADC_MODEM_SIDE)) if((adc_sche_rw_status==0)&&!(DRV_ADC_Reg(AUXADC_CON) & AUXADC_CON_RUN)) #endif // #if (!defined(DRV_ADC_6208_PWRDOWN)) && (!defined(DRV_ADC_MODEM_SIDE)) { #if defined(__OLD_PDN_ARCH__) #ifdef ADC_DRVPDN_FAST DRVPDN_ENABLE2(ADC_CG_PDN_CON_ADDR,ADC_CG_PDN_CON_BIT,PDN_ADC); #else /*ADC_DRVPDN_FAST*/ DRVPDN_Enable(ADC_CG_PDN_CON_ADDR,ADC_CG_PDN_CON_BIT,PDN_ADC); #endif /*ADC_DRVPDN_FAST*/ #else // #if defined(__OLD_PDN_ARCH__) #ifdef ADC_DRVPDN_FAST DRVPDN_ENABLE2(PDN_ADC); #else /*ADC_DRVPDN_FAST*/ //DRVPDN_Enable(PDN_ADC); PDN_SET(PDN_ADC); L1SM_SleepEnable(ADCSM_handler); #endif /*ADC_DRVPDN_FAST*/ #endif // #if defined(__OLD_PDN_ARCH__) } #endif //#ifndef DRV_ADC_NO_PDN #endif // #ifndef DRV_ADC_NOT_EXIST }
/* * FUNCTION * GPT_Stop * * DESCRIPTION * Stop GPT timer * * CALLS * It is called to stop GPT timer * * PARAMETERS * timerNum = 1(GPT1) or 2(GPT2) * * RETURNS * None * * GLOBALS AFFECTED * external_global */ void GPT_Stop(kal_uint8 timerNum) { kal_uint16 gpt_ctrl1; kal_uint16 gpt_ctrl2; #if defined(DRV_GPT_GPT3) kal_uint16 gpt_ctrl3; #endif gpt_ctrl1 = DRV_Reg(GPT1_CTRL); gpt_ctrl2 = DRV_Reg(GPT2_CTRL); #if defined(DRV_GPT_GPT3) gpt_ctrl3 = DRV_Reg(GPT3_CTRL); #endif if (timerNum == 1) { gpt_ctrl1 &= ~GPT_CTRL_Enable; DRV_WriteReg(GPT1_CTRL,gpt_ctrl1); } if (timerNum == 2) { gpt_ctrl2 &= ~GPT_CTRL_Enable; DRV_WriteReg(GPT2_CTRL,gpt_ctrl2); } #if defined(DRV_GPT_GPT3) if (timerNum == 3) { gpt_ctrl3 =(kal_uint16) ~GPT3_ENABLE; DRV_WriteReg(GPT3_CTRL,gpt_ctrl3); } if ( (((gpt_ctrl1|gpt_ctrl2)&GPT_CTRL_Enable)==0)&& (!(gpt_ctrl3&GPT3_ENABLE))) #else if ( ((gpt_ctrl1|gpt_ctrl2)&GPT_CTRL_Enable)==0 ) #endif { kal_uint16 GPT_Status; GPT_Status = DRV_Reg(GPT_STS); IRQMask(IRQ_GPT_CODE); IRQClearInt(IRQ_GPT_CODE); #ifdef GPT_DRVPDN_FAST DRVPDN_ENABLE2(DRVPDN_CON1,DRVPDN_CON1_GPT,PDN_GPT); #else DRVPDN_Enable(DRVPDN_CON1,DRVPDN_CON1_GPT,PDN_GPT); #endif } }
void adc_pwrdown_enable(void) { #ifndef DRV_ADC_NOT_EXIST { #if defined(DRV_DIE_TO_DIE_INTERFACE) { kal_uint32 mask; mask = SaveAndSetIRQMask(); auxadc_die2die_enable = KAL_FALSE; DRV_ADC_ClearBits(ABB_AUX_CON0, AUX_FIFO_EN); // auxadc fifo enable DRV_ADC_ClearBits(ABB_AUX_CON0, AUX_FIFO_CLK_EN); // auxadc fifo enable ust_busy_wait(8); DRV_ADC_ClearBits(ABB_WR_PATH0, AUX_PWDB); //triggle die to die interface to send and receive auxadc data DRV_ADC_ClearBits(ABBA_WR_PATH0, ABBA_AUX_PWDB); // enable clock for auxadc analog interface logic // DRV_ADC_ClearBits(ABB_WR_PATH0, F26M_CLK_EN); //enable clock for die to die interface // DRV_ADC_ClearBits(ABB_RSV_CON1, AUXADC_FSM_CTRL|AUXADC_26M_CLK_CTRL); //enable clock for die to die interface DRV_ADC_ClearBits(ABB_RSV_CON1, AUXADC_FSM_CTRL); //enable clock for die to die interface ust_busy_wait(2); DRV_ADC_ClearBits(ABB_RSV_CON1, AUXADC_26M_CLK_CTRL); //enable clock for die to die interface PDN_SET(PDN_ADC); // TP use the AuxADC PDN, make sure the PDN is enable DRV_ADC_ClearBits(0xa0160020,0x8000); RestoreIRQMask(mask); } #elif defined(DRV_DIE_TO_DIE_INTERFACE_V2) { DRV_ADC_ClearBits(D2D_D_APC_AUX_CON1, D2D_D_AUX_EN); DRV_ADC_ClearBits(D2D_A_APC_AUD_CON1, D2D_A_AUX_EN); ust_busy_wait(8); DRV_ADC_ClearBits(D2D_D_APC_AUX_CON1, D2D_D_AUX_EN | D2D_D_F26M_AUX_EN); } #endif #if defined(__OLD_PDN_ARCH__) #ifdef ADC_DRVPDN_FAST DRVPDN_ENABLE2(ADC_CG_PDN_CON_ADDR,ADC_CG_PDN_CON_BIT,PDN_ADC); #else /*ADC_DRVPDN_FAST*/ DRVPDN_Enable(ADC_CG_PDN_CON_ADDR,ADC_CG_PDN_CON_BIT,PDN_ADC); #endif /*ADC_DRVPDN_FAST*/ #else // #if defined(__OLD_PDN_ARCH__) #ifdef ADC_DRVPDN_FAST DRVPDN_ENABLE2(PDN_ADC); #else /*ADC_DRVPDN_FAST*/ #if !defined(__DRV_SUPPORT_LPWR__) PDN_SET(PDN_ADC); L1SM_SleepEnable(ADCSM_handler); #else DRVPDN_Enable(PDN_ADC); #endif //#if !defined(__DRV_SUPPORT_LPWR__) #endif /*ADC_DRVPDN_FAST*/ #endif // #if defined(__OLD_PDN_ARCH__) } #endif // #ifndef DRV_ADC_NOT_EXIST }
/*-----------------------------------------------------------------------* * * This function is to close GPT source clock. * *------------------------------------------------------------------------*/ static void GPT_PDN_disable() { #if !defined(DRV_GPT_NO_PDN_BIT) #if defined(__OLD_PDN_ARCH__) #if defined(DRV_GPT_GPT_INTR_WAKEUP_SLEEP) // Set GPT PDN bit directly #if defined(DRV_MISC_PDN_NO_SET_CLR) #if defined(__OLD_PDN_DEFINE__) DRV_GPT_SetBits(DRVPDN_CON1, DRVPDN_CON1_GPT); //DRV_GPT_Reg(DRVPDN_CON1) |= DRVPDN_CON1_GPT; #elif defined(__CLKG_DEFINE__) #if defined(DRV_GPT_NO_GPT_CG_BIT) ; #else // #if defined(DRV_GPT_NO_GPT_CG_BIT) ASSERT(0); #endif // #if defined(DRV_GPT_NO_GPT_CG_BIT) #endif // #if defined(__OLD_PDN_DEFINE__) #else // #if defined(DRV_MISC_PDN_NO_SET_CLR) #if defined(__OLD_PDN_DEFINE__) DRV_GPT_WriteReg(DRVPDN_CON1_SET, DRVPDN_CON1_GPT); #elif defined(__CLKG_DEFINE__) #if defined(DRV_GPT_NO_GPT_CG_BIT) ; #else // #if defined(DRV_GPT_NO_GPT_CG_BIT) ASSERT(0); #endif // #if defined(DRV_GPT_NO_GPT_CG_BIT) #endif // #if defined(__OLD_PDN_DEFINE__) #endif // #if defined(DRV_MISC_PDN_NO_SET_CLR) #else // #if defined(DRV_GPT_GPT_INTR_WAKEUP_SLEEP) // We need to to un-hook sleep mode handler to allow MCU enter sleep mode #if defined(__OLD_PDN_DEFINE__) #if defined(DRV_GPT_DIRECT_SLEEP_MODE_HANDLE) // Set GPT PDN bit directly #if defined(DRV_MISC_PDN_NO_SET_CLR) DRV_GPT_SetBits(DRVPDN_CON1, DRVPDN_CON1_GPT); //DRV_GPT_Reg(DRVPDN_CON1) |= DRVPDN_CON1_GPT; #else // #if defined(DRV_MISC_PDN_NO_SET_CLR) DRV_GPT_WriteReg(DRVPDN_CON1_SET, DRVPDN_CON1_GPT); #endif // #if defined(DRV_MISC_PDN_NO_SET_CLR) #else // #if defined(DRV_GPT_DIRECT_SLEEP_MODE_HANDLE) #ifdef GPT_DRVPDN_FAST DRVPDN_ENABLE2(DRVPDN_CON1,DRVPDN_CON1_GPT,PDN_GPT); #else DRVPDN_Enable(DRVPDN_CON1,DRVPDN_CON1_GPT,PDN_GPT); #endif #endif #elif defined(__CLKG_DEFINE__) #if defined(DRV_GPT_NO_GPT_CG_BIT) #ifdef GPT_DRVPDN_FAST // DRVPDN_ENABLE2(0,0,PDN_GPT); // TTTTTTTT, Temp commented for MT6268A DVT load #else // #ifdef GPT_DRVPDN_FAST DRVPDN_Enable(0,0,PDN_GPT); #endif // #ifdef GPT_DRVPDN_FAST #else // #if defined(DRV_GPT_NO_GPT_CG_BIT) ASSERT(0); #endif // #if defined(DRV_GPT_NO_GPT_CG_BIT) #endif // #if defined(__OLD_PDN_DEFINE__) #endif // #if defined(DRV_GPT_GPT_INTR_WAKEUP_SLEEP) #else //#if defined(__OLD_PDN_ARCH__) PDN_SET(PDN_GPT); #endif //#if defined(__OLD_PDN_ARCH__) #endif //#if !defined(DRV_GPT_NO_PDN_BIT) }