/* send ilm to UART owner */
void USB2UART_Sendilm(msg_type msgid)
{
ilm_struct *USB2UART_ilm;
void *port_ptr = NULL;
if (USB2UARTPort.ownerid == MOD_DRV_HISR)
return;
switch(msgid)
{
case MSG_ID_UART_READY_TO_READ_IND:
{
uart_ready_to_read_ind_struct *tmp;
tmp = (uart_ready_to_read_ind_struct *)
construct_local_para(sizeof(uart_ready_to_read_ind_struct),TD_UL);
tmp->port = USB2UARTPort.port_no;
port_ptr = tmp;
}
break;
case MSG_ID_UART_READY_TO_WRITE_IND:
{
uart_ready_to_write_ind_struct *tmp;
tmp = (uart_ready_to_write_ind_struct *)
construct_local_para(sizeof(uart_ready_to_write_ind_struct),TD_UL);
tmp->port = USB2UARTPort.port_no;
port_ptr = tmp;
}
break;
case MSG_ID_UART_ESCAPE_DETECTED_IND:
{
uart_escape_detected_ind_struct *tmp;
tmp = (uart_escape_detected_ind_struct *)
construct_local_para(sizeof(uart_escape_detected_ind_struct),TD_UL);
tmp->port = USB2UARTPort.port_no;
port_ptr = tmp;
}
break;
default:
EXT_ASSERT(0, msgid, 0, 0);
break;
}
if (USB2UARTPort.ownerid == MOD_DRV_HISR)
EXT_ASSERT(0, USB2UARTPort.ownerid, 0, 0);
DRV_BuildPrimitive(USB2UART_ilm, MOD_DRV_HISR,
USB2UARTPort.ownerid, msgid, port_ptr);
msg_send_ext_queue(USB2UART_ilm);
}
static void UART_HISR(void)
{
ilm_struct *UART_ilm;
uart_ready_to_write_ind_struct* _data;
if(g_msgid == MSG_ID_UART_READY_TO_WRITE_IND)
{
_data = (uart_ready_to_write_ind_struct *) construct_local_para(sizeof(uart_ready_to_write_ind_struct),TD_UL);
_data->port = g_port;
}
else
{
_data = NULL;
}
DRV_BuildPrimitive(UART_ilm,
UARTPort[g_port].UART_id,
UARTPort[g_port].ownerid,
g_msgid,
_data);
msg_send_ext_queue(UART_ilm);
}
