/*************************************************************************
* FUNCTION
* DclPMU_Initialize
*
* DESCRIPTION
* This function is to initialize PMU module
*
* PARAMETERS
* None
*
* RETURNS
* STATUS_OK
*
*************************************************************************/
DCL_STATUS Dcl_Chr_Det_Initialize(void)
{
#if !defined(PMIC_CHR_DETECT_NONE)
#if defined(PMIC_CHR_USB_DETECT_THROUGH_USB)
if (chrDet_UsbHandler==DCL_HANDLE_NONE);
chrDet_UsbHandler=DclUSB_DRV_Open(DCL_USB, FLAGS_NONE);
#endif
if (chrDet_PmuHandler==DCL_HANDLE_NONE)
chrDet_PmuHandler=DclPMU_Open(DCL_PMU, FLAGS_NONE);
#ifdef __CHARGER_USB_DETECT_WIHT_ONE_EINT__
chr_usb_det_mgr.pw_is_charger_usb_det = NULL;
chr_usb_det_mgr.pw_is_charger_usb_det_eint = NULL;
#if defined(PMIC_CHR_USB_DETECT_THROUGH_PMU_BC11)
chr_usb_det_mgr.pw_is_charger_usb_det = DclPW_charger_usb_det_PMU_BC11;
chr_usb_det_mgr.pw_is_charger_usb_det_eint = DclPW_charger_usb_det_eint_PMU_BC11;
#elif defined(PMIC_CHR_USB_DETECT_THROUGH_USB) // #if defined(PMIC_CHR_USB_DETECT_THROUGH_PMU_BC11)
chr_usb_det_mgr.pw_is_charger_usb_det = DclPW_charger_usb_det_USB;
chr_usb_det_mgr.pw_is_charger_usb_det_eint = DclPW_charger_usb_det_eint_USB;
#elif defined(PMIC_CHR_USB_DETECT_THROUGH_ADC) // #if defined(PMIC_CHR_USB_DETECT_THROUGH_PMU_BC11)
chr_usb_det_mgr.pw_is_charger_usb_det = DclPW_charger_usb_det_ADC;
chr_usb_det_mgr.pw_is_charger_usb_det_eint = DclPW_charger_usb_det_eint_ADC;
#else // #if defined(PMIC_CHR_USB_DETECT_THROUGH_PMU_BC11)
// TTTT
#endif // #if defined(PMIC_CHR_USB_DETECT_THROUGH_PMU_BC11)
#endif //#ifdef __CHARGER_USB_DETECT_WIHT_ONE_EINT__
#endif //#if !defined(PMIC_CHR_DETECT_NONE)
return STATUS_OK;
}
void BL_HV_detection_init(void)
{
#if defined(__BMT_2_0_ARCHITECTURE__)
DCL_BOOL chr_hv_enable = DCL_TRUE;
#if defined(DRV_BMT_HIGH_VCHG_ADAPTIVE_CHARGE_CURRENT_SUPPORT)
kal_uint32 hv_voltage = CHR_VCHARGER_HV_HIGH;
#else
kal_uint32 hv_voltage = CHR_VCHARGER_HW_HIGH;
#endif
/*trigger HW Charger OVP before backlight on*/
bl_chr_control_handler(BMT_BL_CHARGING_CMD_SET_HV_VOLTAGE, &hv_voltage);
bl_chr_control_handler(BMT_BL_CHARGING_CMD_SET_HV_ENABLE, &chr_hv_enable);
#else
DCL_UINT32 voltage;
DCL_HANDLE pmu_handle;
PMU_CTRL_CHR_GET_HV_DETECTION_VOLTAGE_LIST hv_voltage_list;
PMU_CTRL_CHR_SET_HV_DETECTION_VOLTAGE hv_voltage;
DCL_STATUS status;
DclPMU_Initialize();
pmu_handle = DclPMU_Open(DCL_PMU, FLAGS_NONE);
status=DclPMU_Control(pmu_handle, CHR_GET_HV_DETECTION_VOLTAGE_LIST, (
DCL_CTRL_DATA_T *)&hv_voltage_list);
if(status==STATUS_UNSUPPORTED)
{
//drv_trace1(TRACE_GROUP_10, BMT_PMU_DO_NOT_SUPPORT_TRC, 0);
return;
}
#if defined(DRV_BMT_HIGH_VCHG_ADAPTIVE_CHARGE_CURRENT_SUPPORT)
voltage=CHR_VCHARGER_HV_HIGH;
#else
#if defined(CHR_HW_VCHARGER_HIGH)
voltage=CHR_HW_VCHARGER_HIGH;
#else
voltage=CHR_VCHARGER_HIGH;
#endif //#if defined(CHR_HW_VCHARGER_HIGH)
#endif
hv_voltage.voltage=(PMU_VOLTAGE_ENUM)bmt_find_closest_level(hv_voltage_list.pVoltageList
,hv_voltage_list.number,(DCL_UINT32)voltage);
DclPMU_Control(pmu_handle, CHR_SET_HV_DETECTION_VOLTAGE, (DCL_CTRL_DATA_T *)&hv_voltage);
DclPMU_Close(pmu_handle);
#endif //#if defined(__BMT_2_0_ARCHITECTURE__)
}
kal_bool pmic_adpt_charge_source(void)
{
DCL_HANDLE handle;
PMU_CTRL_CHR_GET_CHR_DET_STATUS chrStatus;
handle=DclPMU_Open(DCL_PMU, FLAGS_NONE);
DclPMU_Control(handle, CHR_GET_CHR_DET_STATUS, (DCL_CTRL_DATA_T *)&chrStatus);
DclPMU_Close(handle);
return (kal_bool)chrStatus.enable;
}
void ft_util_get_vpa_voltage_list(const FT_UTILITY_COMMAND_REQ *req, FT_UTILITY_COMMAND_CNF *cnf, peer_buff_struct **peer_buff_ret)
{
DCL_HANDLE handle;
PMU_CTRL_VPA_GET_VOLTAGE_LIST voltageList;
handle=DclPMU_Open(DCL_PMU, FLAGS_NONE);
if(DclPMU_Control(handle, VPA_GET_VOLTAGE_LIST, (DCL_CTRL_DATA_T *)&voltageList) != STATUS_OK)
{
cnf->status = FT_CNF_FAIL;
}
else
{
cnf->status = FT_CNF_OK;
}
DclPMU_Close(handle);
if(cnf->status == FT_CNF_OK)
{
if( NULL != (*peer_buff_ret=construct_peer_buff(sizeof(FtUtilCmdCnfVpaVoltageList), 0, 0, TD_CTRL)) )
{
kal_uint32 i;
FtUtilCmdCnfVpaVoltageList * pdu_ptr = get_pdu_ptr( *peer_buff_ret, &((*peer_buff_ret)->pdu_len) );
if(pdu_ptr != NULL)
{
kal_mem_set(pdu_ptr, 0, sizeof(FtUtilCmdCnfVpaVoltageList));
for(i=0;i<voltageList.number;i++)
{
/******************************************************
* if the voltage is valid, pass the information to PC
*****************************************************/
if(voltageList.pVoltageList[i] != PMU_VOLT_INVALID)
{
pdu_ptr->voltageList[pdu_ptr->validNumber] = voltageList.pVoltageList[i];
pdu_ptr->registerValue[pdu_ptr->validNumber] = i;
pdu_ptr->validNumber++;
}
}
}
else
{
ASSERT(pdu_ptr);
}
}
else
{
ASSERT(0);
}
}
}
/**
* This function calls Dcl PMU interface to read PMIC register
* @param data the register value to be written to PMIC
* @param register_index the index of the register to be written
*/
kal_bool ft_pmic_reg_write(kal_uint16 data, kal_uint16 register_index)
{
kal_bool status;
DCL_HANDLE handle;
PMU_CTRL_MISC_SET_REGISTER_VALUE val;
val.offset=register_index;
val.value=data;
handle=DclPMU_Open(DCL_PMU, FLAGS_NONE);
if(DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&val) != STATUS_OK)
{
// in this case, there might be not supported (if the driver did not support yet, usually in development phase)
status = KAL_FALSE;
}
else
{
status = KAL_TRUE;
}
DclPMU_Close(handle);
return status;
}
/*************************************************************************
* FUNCTION
* BL_Raise_Charger_Current
*
* DESCRIPTION
* if charger is present and battery voltage is low (VBAT_CC_DET is false) , start charging to avoid shutdown before maui
*
* PARAMETERS
* None
*
* RETURNS
* None
*
* GLOBALS AFFECTED
*
*************************************************************************/
void BL_Raise_Charger_Current(void)
{
#if defined(__BMT_2_0_ARCHITECTURE__)
DCL_BOOL chr_det_status = DCL_FALSE;
DCL_BOOL vbat_cc_det_status = DCL_FALSE;
DCL_BOOL enable = DCL_TRUE;
PMU_CHR_CURRENT_ENUM set_charging_current = PMU_CHARGE_CURRENT_500_00_MA;
bl_chr_control_handler(BMT_BL_CHARGING_CMD_GET_CC_STATUS, &vbat_cc_det_status);
bl_chr_control_handler(BMT_BL_CHARGING_CMD_GET_CHR_DET_STATUS, &chr_det_status);
if (vbat_cc_det_status == DCL_FALSE && chr_det_status == DCL_TRUE)
{
// find the nearest current
bl_chr_control_handler(BMT_BL_CHARGING_CMD_GET_CHARGING_CURRENT, &set_charging_current);
// set the current
bl_chr_control_handler(BMT_BL_CHARGING_CMD_SET_CHARGING_CURRENT, &set_charging_current);
bl_chr_control_handler(BMT_BL_CHARGING_CMD_SET_CSDAC_ENABLE, &enable);
bl_chr_control_handler(BMT_BL_CHARGING_CMD_SET_CHR_ENABLE, &enable);
}
#else
DCL_HANDLE pmu_handle;
PMU_CTRL_CHR_SET_CHR_EN CtrlChrEn;
PMU_CTRL_CHR_GET_CHR_CURRENT_LIST get_chr_current_list;
PMU_CTRL_CHR_SET_CHR_CURRENT set_chr_current;
PMU_CTRL_CHR_SET_CSDAC_EN chr_csdac_en;
PMU_CTRL_CHR_GET_CC_DET ChrCcDet;
PMU_CTRL_CHR_GET_CHR_DET_STATUS chrStatus;
kal_int32 i;
DclPMU_Initialize();
pmu_handle = DclPMU_Open(DCL_PMU, FLAGS_NONE);
DclPMU_Control(pmu_handle, CHR_GET_CC_DET, (DCL_CTRL_DATA_T *)&ChrCcDet);
DclPMU_Control(pmu_handle, CHR_GET_CHR_DET_STATUS, (DCL_CTRL_DATA_T *)&chrStatus);
if (ChrCcDet.vbat_cc_det == DCL_FALSE && chrStatus.enable == DCL_TRUE)
{
// 找接近電流檔位
{
DclPMU_Control(pmu_handle, CHR_GET_CHR_CURRENT_LIST, (DCL_CTRL_DATA_T *)&get_chr_current_list);
for(i = (get_chr_current_list.number - 1); i >=0; i--)
{
if(get_chr_current_list.pCurrentList[i] <= PMU_CHARGE_CURRENT_500_00_MA)
{
set_chr_current.current = (PMU_CHR_CURRENT_ENUM)get_chr_current_list.pCurrentList[i];
break;
}
}
if(i <= 0)
{
set_chr_current.current = (PMU_CHR_CURRENT_ENUM)get_chr_current_list.pCurrentList[0];
}
DclPMU_Control(pmu_handle, CHR_SET_CHR_CURRENT, (DCL_CTRL_DATA_T *)&set_chr_current);
}
chr_csdac_en.enable = DCL_TRUE;
DclPMU_Control(pmu_handle, CHR_SET_CSDAC_EN, (DCL_CTRL_DATA_T *)&chr_csdac_en);
CtrlChrEn.enable = DCL_TRUE;
DclPMU_Control(pmu_handle, CHR_SET_CHR_EN, (DCL_CTRL_DATA_T *)&CtrlChrEn);
}
DclPMU_Close(pmu_handle);
#endif
}
void Drv_Init_Phase1(void)
{
#if defined(DRV_GPT_GPT3)
DCL_HANDLE gpt_handle;
#endif //defined(DRV_GPT_GPT3)
#ifndef DRV_RTC_NOT_EXIST
DCL_HANDLE rtc_handler;
#endif //#ifndef DRV_RTC_NOT_EXIST
DCL_HANDLE uart_handle;
UART_CTRL_INIT_T data_init;
extern Seriport_HANDLER_T Uart_Drv_Handler;
#ifdef __USB_COM_PORT_ENABLE__
DCL_HANDLE usb_dcl_handle;
DCL_BOOL dcl_data;
kal_bool b_is_dl_mode;
usb_dcl_handle = DclUSB_DRV_Open(DCL_USB, FLAGS_NONE);
DclUSB_DRV_Control(usb_dcl_handle, USB_DRV_CMD_USBDL_UPDATE_USB_DL_MODE, NULL);
DclUSB_DRV_Control(usb_dcl_handle, USB_DRV_CMD_USBDL_IS_USB_DL_MODE, (DCL_CTRL_DATA_T *)&dcl_data);
b_is_dl_mode = (kal_bool)dcl_data;
if(b_is_dl_mode == KAL_TRUE)
{
UPLL_Enable(UPLL_OWNER_USB);
}
DclUSB_DRV_Close(usb_dcl_handle);
#endif //__USB_COM_PORT_ENABLE__
#if defined(__HW_US_TIMER_SUPPORT__ )
USC_Start();
#endif
#ifdef __BACKUP_DOWNLOAD_RESTORE_WITHOUT_BATTERY__
if (INT_GetSysStaByCmd(CHK_USB_META_WO_BAT, NULL)==KAL_TRUE)
{
DCL_HANDLE handle;
DclPMU_Initialize();
handle = DclPMU_Open(DCL_PMU, FLAGS_NONE);
DclPMU_Control(handle, CHR_SET_CHARGE_WITHOUT_BATTERY, NULL);
DclPMU_Close(handle);
}
#endif //#ifdef __BACKUP_DOWNLOAD_RESTORE_WITHOUT_BATTERY__
print_bootup_trace_enter(SST_INIT_DRV1_DRVHISR);
drv_hisr_init();
print_bootup_trace_exit(SST_INIT_DRV1_DRVHISR);
#if defined(__DSP_FCORE4__)
print_bootup_trace_enter(SST_INIT_DRV1_MDCIHW);
mdci_hw_init(1,0x0);
print_bootup_trace_exit(SST_INIT_DRV1_MDCIHW);
#endif
#if defined(__SMART_PHONE_MODEM__)
print_bootup_trace_enter(SST_INIT_DRV1_CCCI);
ccif_init(1,0x0);
ipc_msgsvc_init();
FS_CCCI_Init();
ccci_init(CCCI_FS_CHANNEL, FS_CCCI_Callback);
ccci_init(CCCI_FS_ACK_CHANNEL, FS_CCCI_Callback);
uart_handle = DclSerialPort_Open(uart_port_tst_ccci, 0);
DclSerialPort_RegisterCallback(uart_handle, &CCCI_Uart_Drv_Handler);
uart_handle = DclSerialPort_Open(uart_port_at_ccci, 0);
DclSerialPort_RegisterCallback(uart_handle, &CCCI_Uart_Drv_Handler);
#if defined(__UPS_SUPPORT__)
uart_handle = DclSerialPort_Open(uart_port_ccmni1_ccci, 0);
DclSerialPort_RegisterCallback(uart_handle, &CCCI_Uart_Drv_Handler);
uart_handle = DclSerialPort_Open(uart_port_ccmni2_ccci, 0);
DclSerialPort_RegisterCallback(uart_handle, &CCCI_Uart_Drv_Handler);
uart_handle = DclSerialPort_Open(uart_port_ccmni3_ccci, 0);
DclSerialPort_RegisterCallback(uart_handle, &CCCI_Uart_Drv_Handler);
#endif /* __UPS_SUPPORT__ */
uart_handle = DclSerialPort_Open(uart_port_gps_ccci, 0);
DclSerialPort_RegisterCallback(uart_handle, &CCCI_Uart_Drv_Handler);
print_bootup_trace_exit(SST_INIT_DRV1_CCCI);
#endif /* __SMART_PHONE_MODEM__ */
#if defined(DRV_EMIMPU)
print_bootup_trace_enter(SST_INIT_DRV1_EMIMPU);
emimpu_init();
print_bootup_trace_exit(SST_INIT_DRV1_EMIMPU);
#endif /* DRV_EMIMPU */
print_bootup_trace_enter(SST_INIT_DRV1_LPWR);
lpwr_init();
print_bootup_trace_exit(SST_INIT_DRV1_LPWR);
print_bootup_trace_enter(SST_INIT_DRV1_DRVPDN);
DRVPDN_ini();
print_bootup_trace_exit(SST_INIT_DRV1_DRVPDN);
print_bootup_trace_enter(SST_INIT_DRV1_PWM);
DclPWM_Initialize();
print_bootup_trace_exit(SST_INIT_DRV1_PWM);
/*To get all customized data*/
print_bootup_trace_enter(SST_INIT_DRV1_CUSTOM);
DclSADC_Initialize();
Drv_Customize_Init();
custom_drv_init();
print_bootup_trace_exit(SST_INIT_DRV1_CUSTOM);
#if defined(DRV_GPT_GPT3)
print_bootup_trace_enter(SST_INIT_DRV1_GPT3);
/*turn on gpt3 to count powen on period*/
DclFGPT_Initialize();
gpt_handle=DclFGPT_Open(DCL_GPT_FreeRUN3,0);
DclFGPT_Control(gpt_handle,FGPT_CMD_START,0);
DclFGPT_Close(gpt_handle);
print_bootup_trace_exit(SST_INIT_DRV1_GPT3);
#endif
#if !defined(__L1_STANDALONE__) && !defined(__MAUI_BASIC__) && !defined(__SMART_PHONE_MODEM__)
print_bootup_trace_enter(SST_INIT_DRV1_VISUAL);
Visual_Init();
print_bootup_trace_exit(SST_INIT_DRV1_VISUAL);
#endif /*!defined(__L1_STANDALONE__) && !defined(__MAUI_BASIC__) && !defined(__SMART_PHONE_MODEM__)*/
#if defined(DRV_TIMING_DEBUG) && defined(DRV_GPT_6218B_GPT3_TIMING_DEBUG)
DRV_MISC_WriteReg(0x8010001c,1);
DRV_MISC_WriteReg(0x80100024,0x04);
//DRV_WriteReg(0x80100024,1); // (1/16K)
#endif
#ifdef DRV_MISC_DMA_NO_MEMCPY
DRV_MEMCPY = (MEMCPY_FUNC)0x48000150;
#elif defined(DRV_MISC_DMA_MEMCPY)
DRV_MEMCPY_PTR = (MEMCPY_FUNC)0x48000134;
#endif
print_bootup_trace_enter(SST_INIT_DRV1_GPTI);
DclSGPT_Initialize();
print_bootup_trace_exit(SST_INIT_DRV1_GPTI);
print_bootup_trace_enter(SST_INIT_DRV1_WDT);
WDT_init();
print_bootup_trace_exit(SST_INIT_DRV1_WDT);
print_bootup_trace_enter(SST_INIT_DRV1_DMA);
DMA_Ini();
print_bootup_trace_exit(SST_INIT_DRV1_DMA);
#ifndef DRV_RTC_NOT_EXIST
// need to set XOSC earlier
print_bootup_trace_enter(SST_INIT_DRV1_XOSC);
rtc_handler = DclRTC_Open(DCL_RTC,FLAGS_NONE);
DclRTC_Control(rtc_handler, RTC_CMD_SETXOSC, (DCL_CTRL_DATA_T *)NULL);
print_bootup_trace_exit(SST_INIT_DRV1_XOSC);
#endif /*DRV_RTC_NOT_EXIST*/
print_bootup_trace_enter(SST_INIT_DRV1_ADC);
DclHADC_Initialize( );
print_bootup_trace_exit(SST_INIT_DRV1_ADC);
#ifdef __CS_FAC_DET__
print_bootup_trace_enter(SST_INIT_DRV1_CSFACDET);
cs_fac_det = cs_fac_det_get_interface();
cs_fac_det->drv_init();
print_bootup_trace_exit(SST_INIT_DRV1_CSFACDET);
#endif // #ifdef __CS_FAC_DET__
#ifdef __DRV_EXT_ACCESSORY_DETECTION__
#ifdef __USB_COM_PORT_ENABLE__
usb_dcl_handle = DclUSB_DRV_Open(DCL_USB, FLAGS_NONE);
DclUSB_DRV_Control(usb_dcl_handle, USB_DRV_CMD_USBDL_IS_USB_DL_MODE, (DCL_CTRL_DATA_T *)&dcl_data);
b_is_dl_mode = (kal_bool)dcl_data;
DclUSB_DRV_Close(usb_dcl_handle);
if(b_is_dl_mode == KAL_FALSE)
#endif
{
print_bootup_trace_enter(SST_INIT_DRV1_EXTACCDET);
aux_ext_acc_det = aux_custom_get_ext_accessory_det();
aux_ext_acc_det->drv_init();
print_bootup_trace_exit(SST_INIT_DRV1_EXTACCDET);
}
#endif // #ifdef __DRV_EXT_ACCESSORY_DETECTION__
//#if (defined(__ACCDET_SUPPORT__) && !defined(__L1_STANDALONE__))
print_bootup_trace_enter(SST_INIT_DRV1_ACCDET);
DclAUX_Initialize();
print_bootup_trace_exit(SST_INIT_DRV1_ACCDET);
//#endif //#if defined(__ACCDET_SUPPORT__)
#if defined(__RESOURCE_MANAGER__)
print_bootup_trace_enter(SST_INIT_DRV1_RM);
RMInit();
print_bootup_trace_exit(SST_INIT_DRV1_RM);
#endif //__RESOURCE_MANAGER__
#ifndef DRV_LCD_NOT_EXIST
print_bootup_trace_enter(SST_INIT_DRV1_LCD);
lcd_system_init();
print_bootup_trace_exit(SST_INIT_DRV1_LCD);
#endif /*DRV_LCD_NOT_EXIST*/
#ifndef DRV_RTC_NOT_EXIST
#ifdef DRV_RTC_HW_CALI
print_bootup_trace_enter(SST_INIT_DRV1_RTCHW);
DclRTC_Control(rtc_handler, RTC_CMD_HW_INIT, (DCL_CTRL_DATA_T *)NULL);
print_bootup_trace_exit(SST_INIT_DRV1_RTCHW);
#endif
#endif /*DRV_RTC_NOT_EXIST*/
DclPW_Initialize();
DclPMU_Initialize();
Drv_PW_Init();
/* update the system boot mode */
/*lint -e552*/
system_boot_mode = Drv_query_boot_mode();
/*lint +e552*/
print_boot_mode();
#ifdef __DMA_UART_VIRTUAL_FIFO__
// print_bootup_trace_enter(SST_INIT_DRV1_DMAVFIFO);
// DMA_Vfifo_init();
// print_bootup_trace_exit(SST_INIT_DRV1_DMAVFIFO);
#if defined(__MD_STANDALONE__)
// This is to configure AP side VFIFO ALT register, to avoid un-init AP side DMA setting
// conflict MD side setting
// This is only used in MD DVT load, when both side are ready, we shouldn't overwrite AP side setting via back door
// Hack DMA channel 13 (VFIFO channel) in AP side in order to avoid conflict
*(volatile kal_uint32 *)(0xF0022000 + 0xD40) = 0x3F;
// Hack DMA channel 14 (VFIFO channel) in AP side in order to avoid conflict
*(volatile kal_uint32 *)(0xF0022000 + 0xE40) = 0x3F;
#endif // #if defined(__MD_STANDALONE__)
#endif
print_bootup_trace_enter(SST_INIT_DRV1_UART1);
data_init.u4Flag = KAL_FALSE;
uart_handle = DclSerialPort_Open(uart_port1, 0);
DclSerialPort_RegisterCallback(uart_handle, &Uart_Drv_Handler);
// Initialization
DclSerialPort_Control(uart_handle,SIO_CMD_INIT,(DCL_CTRL_DATA_T *)&data_init);
print_bootup_trace_exit(SST_INIT_DRV1_UART1);
// Register the callback function
print_bootup_trace_enter(SST_INIT_DRV1_UART2);
uart_handle = DclSerialPort_Open(uart_port2, 0);
DclSerialPort_RegisterCallback(uart_handle, &Uart_Drv_Handler);
// Initialization
DclSerialPort_Control(uart_handle,SIO_CMD_INIT,(DCL_CTRL_DATA_T *)&data_init);
print_bootup_trace_exit(SST_INIT_DRV1_UART2);
#ifdef __UART3_SUPPORT__
print_bootup_trace_enter(SST_INIT_DRV1_UART3);
// Register the callback function
uart_handle = DclSerialPort_Open(uart_port3, 0);
DclSerialPort_RegisterCallback(uart_handle,&Uart_Drv_Handler);
DclSerialPort_Control(uart_handle,SIO_CMD_INIT,(DCL_CTRL_DATA_T *)&data_init);
print_bootup_trace_exit(SST_INIT_DRV1_UART3);
#endif
}
DCL_STATUS gpio_15_segment_led_control(kal_uint8 word1, kal_uint8 word2)
{
#if defined(DRV_GPIO_FOR_LED_AND_15_SEGMENT)
kal_uint32 savedMask;
DCL_HANDLE handle;
PMU_CTRL_LDO_BUCK_SET_EN val;
PMU_CTRL_LDO_BUCK_SET_VOLTAGE val1;
val1.voltage = PMU_VOLT_02_800000_V;
val1.mod = VMC;
handle = DclPMU_Open(DCL_PMU,FLAGS_NONE);
DclPMU_Control(handle, LDO_BUCK_SET_VOLTAGE,(DCL_CTRL_DATA_T *)&val1);
val.enable = DCL_TRUE;
val.mod = VMC;
DclPMU_Control(handle, LDO_BUCK_SET_EN,(DCL_CTRL_DATA_T *)&val);
DclPMU_Close(handle);
if(debug1_Handle == 0 || debug2_Handle == 0 || debug3_Handle == 0 || debug4_Handle == 0)
{
debug1_Handle = DclGPIO_Open(DCL_GPIO,62);
debug2_Handle = DclGPIO_Open(DCL_GPIO,63);
debug3_Handle = DclGPIO_Open(DCL_GPIO,64);
debug4_Handle = DclGPIO_Open(DCL_GPIO,65);
}
if(fifteen_segment_timer == NULL)
fifteen_segment_timer = kal_create_timer("15_segment_TIMER");
switch(word1)
{
case '2':
{
savedMask = SaveAndSetIRQMask();
word_to_display = char_to_display_table1;
table_count = 6;
RestoreIRQMask(savedMask);
kal_set_timer(fifteen_segment_timer,(kal_timer_func_ptr) gpio_15_segment_display, NULL, 1, 1);
break;
}
case '3':
{
if(word2 == 1)
{
savedMask = SaveAndSetIRQMask();
word_to_display = char_to_display_table7;
table_count = 7;
RestoreIRQMask(savedMask);
kal_set_timer(fifteen_segment_timer,(kal_timer_func_ptr) gpio_15_segment_display, NULL, 1, 1);
}
else
{
savedMask = SaveAndSetIRQMask();
word_to_display = char_to_display_table6;
table_count = 6;
RestoreIRQMask(savedMask);
kal_set_timer(fifteen_segment_timer, (kal_timer_func_ptr)gpio_15_segment_display,NULL, 1, 1);
}
break;
}
case '6':
{
if(word2 == 1)
{
savedMask = SaveAndSetIRQMask();
word_to_display = char_to_display_table3;
table_count = 8;
RestoreIRQMask(savedMask);
kal_set_timer(fifteen_segment_timer, (kal_timer_func_ptr)gpio_15_segment_display, NULL, 1, 1);
}
else
{
savedMask = SaveAndSetIRQMask();
word_to_display = char_to_display_table2;
table_count = 7;
RestoreIRQMask(savedMask);
kal_set_timer(fifteen_segment_timer,(kal_timer_func_ptr) gpio_15_segment_display, NULL, 1, 1);
}
break;
}
case 'd':
{
savedMask = SaveAndSetIRQMask();
word_to_display = char_to_display_table12;
table_count = 7;
RestoreIRQMask(savedMask);
kal_set_timer(fifteen_segment_timer,(kal_timer_func_ptr) gpio_15_segment_display, NULL, 1, 1);
break;
}
case 'E':
{
if(word2 == 1)
{
savedMask = SaveAndSetIRQMask();
word_to_display = char_to_display_table5;
table_count = 7;
RestoreIRQMask(savedMask);
kal_set_timer(fifteen_segment_timer, (kal_timer_func_ptr)gpio_15_segment_display, NULL, 1, 1);
}
else
{
savedMask = SaveAndSetIRQMask();
word_to_display = char_to_display_table4;
table_count = 6;
RestoreIRQMask(savedMask);
kal_set_timer(fifteen_segment_timer,(kal_timer_func_ptr) gpio_15_segment_display, NULL, 1, 1);
}
break;
}
case 'h':
{
if(word2 == 1)
{
savedMask = SaveAndSetIRQMask();
word_to_display = char_to_display_table9;
table_count = 6;
RestoreIRQMask(savedMask);
kal_set_timer(fifteen_segment_timer, (kal_timer_func_ptr)gpio_15_segment_display, NULL, 1, 1);
}
else
{
savedMask = SaveAndSetIRQMask();
word_to_display = char_to_display_table8;
table_count = 5;
RestoreIRQMask(savedMask);
kal_set_timer(fifteen_segment_timer, (kal_timer_func_ptr)gpio_15_segment_display, NULL, 1, 1);
}
break;
}
case 'H':
{
if(word2 == 1)
{
savedMask = SaveAndSetIRQMask();
word_to_display = char_to_display_table11;
table_count = 7;
RestoreIRQMask(savedMask);
kal_set_timer(fifteen_segment_timer, (kal_timer_func_ptr)gpio_15_segment_display, NULL, 1, 1);
}
else
{
savedMask = SaveAndSetIRQMask();
word_to_display = char_to_display_table10;
table_count = 6;
RestoreIRQMask(savedMask);
kal_set_timer(fifteen_segment_timer,(kal_timer_func_ptr) gpio_15_segment_display, NULL, 1, 1);
}
break;
}
case 'I':
{
savedMask = SaveAndSetIRQMask();
word_to_display = char_to_display_table17;
table_count = 4;
RestoreIRQMask(savedMask);
kal_set_timer(fifteen_segment_timer, (kal_timer_func_ptr)gpio_15_segment_display, NULL, 1, 1);
break;
}
case 'L':
{
savedMask = SaveAndSetIRQMask();
word_to_display = char_to_display_table15;
table_count = 3;
RestoreIRQMask(savedMask);
kal_set_timer(fifteen_segment_timer,(kal_timer_func_ptr) gpio_15_segment_display, NULL, 1, 1);
break;
}
case 'N':
{
savedMask = SaveAndSetIRQMask();
word_to_display = char_to_display_table16;
table_count = 6;
RestoreIRQMask(savedMask);
kal_set_timer(fifteen_segment_timer,(kal_timer_func_ptr) gpio_15_segment_display, NULL, 1, 1);
break;
}
case 'X':
{
savedMask = SaveAndSetIRQMask();
word_to_display = char_to_display_table13;
table_count = 4;
RestoreIRQMask(savedMask);
kal_set_timer(fifteen_segment_timer,(kal_timer_func_ptr) gpio_15_segment_display, NULL, 1, 1);
break;
}
case 0:
{
kal_cancel_timer(fifteen_segment_timer);
DclGPIO_Control(debug1_Handle,GPIO_CMD_WRITE_HIGH,0);
DclGPIO_Control(debug2_Handle,GPIO_CMD_WRITE_HIGH,0);
DclGPIO_Control(debug3_Handle,GPIO_CMD_WRITE_HIGH,0);
DclGPIO_Control(debug4_Handle,GPIO_CMD_WRITE_HIGH,0);
break;
}
default:
{
ASSERT(0);
return STATUS_INVALID_CTRL_DATA;
}
}
return STATUS_OK;
#else
return STATUS_FAIL;
#endif
}
DCL_STATUS gpio_led_control(LED_NUM led_num, LED_CTRL_CMD cmd, kal_uint16 freq)
{
#if defined(DRV_GPIO_FOR_LED_AND_15_SEGMENT)
DCL_HANDLE handle;
PMU_CTRL_LDO_BUCK_SET_EN val;
PMU_CTRL_LDO_BUCK_SET_VOLTAGE val1;
val1.voltage = PMU_VOLT_02_800000_V;
val1.mod = VMC;
handle = DclPMU_Open(DCL_PMU,FLAGS_NONE);
DclPMU_Control(handle, LDO_BUCK_SET_VOLTAGE,(DCL_CTRL_DATA_T *)&val1);
val.enable = DCL_TRUE;
val.mod = VMC;
DclPMU_Control(handle, LDO_BUCK_SET_EN,(DCL_CTRL_DATA_T *)&val);
DclPMU_Close(handle);
#endif
#if defined(GPIO_NUMBER_FOR_LED1)
if(led1_handle == 0)
{
ASSERT(0);
}
#endif
#if defined(GPIO_NUMBER_FOR_LED2)
if(led2_handle == 0)
{
ASSERT(0);
}
#endif
switch(cmd)
{
case LED_CMD_FLICKER:
{
if(led_num == GPIO_LED1)
{
kal_set_timer(led1_timer, (kal_timer_func_ptr)led1_flicker, NULL, freq, freq);
}
else
{
kal_set_timer(led2_timer, (kal_timer_func_ptr)led2_flicker, NULL, freq, freq);
}
break;
}
case LED_CMD_DIMMING:
{
led_Dimming(led_num);//always diming
break;
}
case LED_CMD_BRIGHTING:
{
led_brighting(led_num);//always lighting
break;
}
default:
{
ASSERT(0);
return STATUS_INVALID_CMD;
}
}
return STATUS_OK;
}
void PMIC_AudioConfig(void)
{
kal_uint32 addr;
kal_uint16 data;
DCL_HANDLE handle;
PMU_CTRL_MISC_SET_REGISTER_VALUE setVal;
PMU_CTRL_MISC_GET_REGISTER_VALUE getVal;
setVal.offset = (0<<31) | addr;
setVal.value = data;
handle = DclPMU_Open(DCL_PMU, FLAGS_NONE);
// 0x0102 bit[0] to be 1, eable clock source
getVal.offset = ((0<<31) | 0x0102);
DclPMU_Control(handle, MISC_GET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&getVal);
setVal.value = (getVal.value | 0x0001);
setVal.offset = ((0<<31) | 0x0102);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
// 0x010C 0x0100 0x0100 Turn on clock, [OK]
getVal.offset = ((0<<31) | 0x010C);
DclPMU_Control(handle, MISC_GET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&getVal);
setVal.value = (getVal.value | 0x0100);
setVal.offset = ((0<<31) | 0x010C);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
// 0x4024 0xffff 0x3330 DL Sampline rate config [check]
setVal.offset = ((0<<31) | 0x4024);
setVal.value = (0x3330);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
// 0x4028 0xffff 0x342F UL Sampline rate config [check]
setVal.offset = ((0<<31) | 0x4028);
setVal.value = (0x342F);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
// 0x4002 0xffff 0x0004 may need to check for dl 16K UL 16K [check]
setVal.offset = ((0<<31) | 0x4002);
setVal.value = (0x0004);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
// 0x4016 triger dl 1 read it out then write back
getVal.offset = ((0<<31) | 0x4016);
DclPMU_Control(handle, MISC_GET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&getVal);
setVal.value = ((~((getVal.value)<< 8)) & 0x0300);
setVal.offset = ((0<<31) | 0x4016);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
// 0x4000 0xffff 0x0003 this is for turn on
setVal.offset = ((0<<31) | 0x4000);
setVal.value = (0x0003);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
// 0x0700 0xffff 0x79B0 MIC 0
setVal.offset = ((0<<31) | 0x0700);
setVal.value = (0x79B0);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
// 0x0702 0xffff 0x0210 MIC 1 [ok]
setVal.offset = ((0<<31) | 0x0702);
setVal.value = (0x0210);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
// 0x0704 0xffff 0x00F3 UL
setVal.offset = ((0<<31) | 0x0704);
setVal.value = (0x00F3);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
setVal.offset = ((0<<31) | 0x0710); // add
setVal.value = (0x0208);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
// 0x070E 0xffff 0x2400 DL turn on
setVal.offset = ((0<<31) | 0x070E);
setVal.value = (0x2400);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
// 0x0708 0xffff 0x0014 DL turn on // add
setVal.offset = ((0<<31) | 0x0708);
setVal.value = (0x007C);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
// 0x0708 0xffff 0x0014 DL turn on // add
setVal.offset = ((0<<31) | 0x070A);
setVal.value = (0x2214);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
// 0x070C 0xffff 0xB7F6 DL turn on // check
setVal.offset = ((0<<31) | 0x070C);
setVal.value = (0xF5BA);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
// 0x070E 0xffff 0x2500 DL turn on
setVal.offset = ((0<<31) | 0x070E);
setVal.value = (0x2500);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
// 0x070E 0xffff 0x25B0 DL turn on
setVal.offset = ((0<<31) | 0x070E);
setVal.value = (0x25B0);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
setVal.offset = ((0<<31) | 0x402c); // loopback
setVal.value = (0x4000);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
DclPMU_Close(handle);
}
void PMIC_AudioConfig_Loopback(void)
{
kal_uint32 addr;
kal_uint16 data;
DCL_HANDLE handle;
PMU_CTRL_MISC_SET_REGISTER_VALUE setVal;
PMU_CTRL_MISC_GET_REGISTER_VALUE getVal;
setVal.offset = (0<<31) | addr;
setVal.value = data;
handle = DclPMU_Open(DCL_PMU, FLAGS_NONE);
// 0x0102 bit[0] to be 1, eable clock source
/*
getVal.offset = ((0<<31) | 0x0102);
DclPMU_Control(handle, MISC_GET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&getVal);
setVal.value = (getVal.value | 0x0001);
setVal.offset = ((0<<31) | 0x0102);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
*/
// 0x010C 0x0100 0x0100 Turn on clock
getVal.offset = ((0<<31) | 0x010C);
DclPMU_Control(handle, MISC_GET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&getVal);
setVal.value = (getVal.value | 0x0100);
setVal.offset = ((0<<31) | 0x010C);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
// 0x010C 0x0100 0x0100 Turn on clock
#if 0
/* under construction !*/
/* under construction !*/
/* under construction !*/
#endif
setVal.offset = ((0<<31) | 0x402C);
setVal.value = (0x0000);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
setVal.offset = ((0<<31) | 0x4024);
setVal.value = (0x3330); // 16k : 0x3330, 8k : 0x0330
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
setVal.offset = ((0<<31) | 0x4028);
setVal.value = (0x3c2f);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
setVal.offset = ((0<<31) | 0x4002);
setVal.value = (0x0004); // 16k : 0x0004, 8k : 0x0000
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
// sine tone generation
setVal.offset = ((0<<31) | 0x4004);
setVal.value = (0x0000); // loopback
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
/*
setVal.offset = ((0<<31) | 0x4010);
setVal.value = (0x9010);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
*/
// sine tone generation
setVal.offset = ((0<<31) | 0x4016);
setVal.value = (0x0100);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
setVal.offset = ((0<<31) | 0x4000);
setVal.value = (0x0003);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
setVal.offset = ((0<<31) | 0x0700);
setVal.value = (0x79A0);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
setVal.offset = ((0<<31) | 0x0702);
setVal.value = (0x0200);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
setVal.offset = ((0<<31) | 0x0704);
setVal.value = (0x00F3);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
setVal.offset = ((0<<31) | 0x0706);
setVal.value = (0x0000);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
setVal.offset = ((0<<31) | 0x0710);
setVal.value = (0x0208);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
setVal.offset = ((0<<31) | 0x0708);
setVal.value = (0x007c);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
setVal.offset = ((0<<31) | 0x070A);
setVal.value = (0x2214);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
setVal.offset = ((0<<31) | 0x070C);
setVal.value = (0xF5BA);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
setVal.offset = ((0<<31) | 0x070E);
setVal.value = (0x25B0);
DclPMU_Control(handle, MISC_SET_REGISTER_VALUE, (DCL_CTRL_DATA_T *)&setVal);
}
