// Initialize system clock.
void clkInit(void)
{
// UINT32 HCLK;
// Unlock protected registers.
DrvSYS_UnlockKeyReg();
// Configure the system clock source. See SysClkConfig.h.
_SYSCLKCONFIG();
// Set HCLK divider
DrvCLK_SetClkDividerHclk(15);
// HCLK = DrvCLK_GetHclk();
// printf("HCLK is %d.\n",HCLK);
// Enable LDO33.
DrvCLK_EnableLDO30_P();
init_ADC_clock();
DrvPWM_Open();
// Disable low voltage reset
DrvSYS_DisableLowVoltageReset_P();
// Enable power on reset (assert reset when power first comes on).
DrvSYS_ClearPORDisableCode_P();
// Lock protected registers.
DrvSYS_LockKeyReg();
}
void motorsInit()
{
#ifdef M451
CLK_EnableModuleClock(PWM0_MODULE);
CLK_SetModuleClock(PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, 0);
SYS->GPC_MFPL = (SYS->GPC_MFPL
& (~SYS_GPC_MFPL_PC0MFP_Msk)
& (~SYS_GPC_MFPL_PC1MFP_Msk)
& (~SYS_GPC_MFPL_PC2MFP_Msk)
& (~SYS_GPC_MFPL_PC3MFP_Msk)
#ifdef HEX6X
& (~SYS_GPC_MFPL_PC4MFP_Msk)
#endif
);
#ifdef HEX6X
SYS->GPD_MFPL = (SYS->GPD_MFPL
& (~SYS_GPD_MFPL_PD7MFP_Msk)
);
#endif
SYS->GPC_MFPL |= (SYS_GPC_MFPL_PC0MFP_PWM0_CH0|SYS_GPC_MFPL_PC1MFP_PWM0_CH1|
SYS_GPC_MFPL_PC2MFP_PWM0_CH2|SYS_GPC_MFPL_PC3MFP_PWM0_CH3
#ifdef HEX6X
|SYS_GPC_MFPL_PC4MFP_PWM0_CH4
#endif
);
#ifdef HEX6X
SYS->GPD_MFPL |= (SYS_GPD_MFPL_PD7MFP_PWM0_CH5);
#endif
PWM_ConfigOutputChannelf(PWM0, 0, ESC_UPDATE_FREQ, ESC_UPDATE_FREQ/10);
PWM_ConfigOutputChannelf(PWM0, 1, ESC_UPDATE_FREQ, ESC_UPDATE_FREQ/10);
PWM_ConfigOutputChannelf(PWM0, 2, ESC_UPDATE_FREQ, ESC_UPDATE_FREQ/10);
PWM_ConfigOutputChannelf(PWM0, 3, ESC_UPDATE_FREQ, ESC_UPDATE_FREQ/10);
#ifdef HEX6X
PWM_ConfigOutputChannelf(PWM0, 4, ESC_UPDATE_FREQ, ESC_UPDATE_FREQ/10);
PWM_ConfigOutputChannelf(PWM0, 5, ESC_UPDATE_FREQ, ESC_UPDATE_FREQ/10);
#endif
motorsSetRatio(MOTOR_M1, 0);
motorsSetRatio(MOTOR_M2, 0);
motorsSetRatio(MOTOR_M3, 0);
motorsSetRatio(MOTOR_M4, 0);
#ifdef HEX6X
motorsSetRatio(MOTOR_M5, 0);
motorsSetRatio(MOTOR_M6, 0);
#endif
PWM_EnableOutput(PWM0, PWM_CH_0_MASK);
PWM_EnableOutput(PWM0, PWM_CH_1_MASK);
PWM_EnableOutput(PWM0, PWM_CH_2_MASK);
PWM_EnableOutput(PWM0, PWM_CH_3_MASK);
#ifdef HEX6X
PWM_EnableOutput(PWM0, PWM_CH_4_MASK);
PWM_EnableOutput(PWM0, PWM_CH_5_MASK);
#endif
#else
uint8_t u8Timer;
DrvPWM_Open();
DrvGPIO_InitFunction(E_FUNC_PWM01);
DrvGPIO_InitFunction(E_FUNC_PWM23);
s_u32Pulse = 0;
g_u8PWMCount = 1;
g_u16Frequency = ESC_UPDATE_FREQ;
sPt.u8Mode = DRVPWM_AUTO_RELOAD_MODE;
sPt.u32Frequency = g_u16Frequency;
sPt.u8HighPulseRatio = 1;
sPt.u8HighPulseBase = 1000000/g_u16Frequency;
sPt.i32Inverter = 0;
u8Timer = DRVPWM_TIMER0;
DrvPWM_SelectClockSource(u8Timer, DRVPWM_HCLK);
DrvPWM_SetTimerClk(u8Timer, &sPt);
DrvPWM_SetTimerIO(u8Timer, 1);
u8Timer = DRVPWM_TIMER1;
DrvPWM_SelectClockSource(u8Timer, DRVPWM_HCLK);
DrvPWM_SetTimerClk(u8Timer, &sPt);
DrvPWM_SetTimerIO(u8Timer, 1);
u8Timer = DRVPWM_TIMER2;
DrvPWM_SelectClockSource(u8Timer, DRVPWM_HCLK);
DrvPWM_SetTimerClk(u8Timer, &sPt);
DrvPWM_SetTimerIO(u8Timer, 1);
u8Timer = DRVPWM_TIMER3;
DrvPWM_SelectClockSource(u8Timer, DRVPWM_HCLK);
DrvPWM_SetTimerClk(u8Timer, &sPt);
DrvPWM_SetTimerIO(u8Timer, 1);
#endif
}
//*****************************************************************************
//
//! \brief PWM Output.
//!
//! \param None
//!
//! \return None
//
//*****************************************************************************
void PWMOutput(void)
{
S_DRVPWM_TIME_DATA_T sPt;
int32_t i32Loop = 1;
UNLOCKREG();
//
// P5.1 -> XTAL2, P5.0 -> XTAL1
//
GCR->P5_MFP = (GCR->P5_MFP & 0x00FFFCFC) | 0x03;
CLK->PWRCON_BITS.XTLCLK_EN = 1;
//
// Waiting for 12M Xtal stalble
//
DrvSYS_Delay(5000);
//
//Enable PWM clock
//
DrvPWM_Open();
CLK->CLKSEL1_BITS.PWM23_S = 2;
//
// Set PWM pin
//
DrvGPIO_InitFunction(FUNC_PWM3);
UNLOCKREG();
DrvSYS_SelectHCLKSource(0);
LOCKREG();
while(i32Loop)
{
uint8_t u8ItemOK;
u8ItemOK = 1;
g_u16Frequency = 256;
if (u8ItemOK && g_u8PWMCount == 0)
{
s_u32Pulse = 0;
g_u8PWMCount = 1;
//
// PWM Timer property
//
sPt.u8Mode = DRVPWM_AUTO_RELOAD_MODE;
sPt.u32Frequency = g_u16Frequency;
//
// High Pulse peroid : Total Pulse peroid = 10 : 90
//
sPt.u8HighPulseRatio = 90;
sPt.i32Inverter = 0;
//
// Set PWM Timer Configuration
//
DrvPWM_SetTimerClk(DRVPWM_TIMER3, &sPt);
//
// Enable Output for PWM Timer */
//
DrvPWM_SetTimerIO(DRVPWM_TIMER3, 1);
//
// Enable Interrupt Sources of PWM Timer and install call back function
//
DrvPWM_EnableInt(DRVPWM_TIMER3, PWM_INT_PERIOD, PWMA_IRQHandler, 0);
//
//Enable the PWM Timer
//
DrvPWM_Enable(DRVPWM_TIMER3);
while (g_u8PWMCount);
DrvPWM_Disable(DRVPWM_TIMER3);
}
}
DrvPWM_Close();
}
