void write_param_file() { int8 crc; /* write the config structure */ crc = EEPROMDataWrite(PARAM_ADDRESS,(void *)&config,sizeof(config)); /* write the CRC was calculated on the structure */ write_eeprom(PARAM_CRC_ADDRESS,crc); }
void write_param_file() { int8 crc; /* write the config structure */ crc = EEPROMDataWrite(PARAM_ADDRESS,(void *)&config,sizeof(config)); /* write the CRC was calculated on the structure */ write_eeprom(PARAM_CRC_ADDRESS,crc); #if 0 lcd_clear(); lcd_goto(LCD_LINE_ONE); printf(lcd_putch,"CRC: 0x%02X (write)",crc); delay_ms(1000); #endif }
/****************************************************************************** * Function: void CANInit//(void) * * PreCondition: None * * Input: None * * Output: None * * Side Effects: None * * Overview: This function initializes the MCP2515. * * * Note: None *****************************************************************************/ void CANInit() { unsigned char n, EEPROM_ver; SPIReset(); //Wait state is in SPIReset() function EEPROM_ver = EEPROMCRCCheck(0, 128); //EEPROM_ver=0; for (n = 0; n < 250; n++); //Wait anyway //Set Config Mode and verify //CANCTRL Register if (EEPROM_ver) { CANCTRL_byte = EEPROMBYTERead(CANCTRL); } /* else { EEPROMBYTEWrite(CANCTRL,CANCTRL_byte); } */ SET_CONFIG; //Set Configuration mode CLEAR_OSM; //Not One-Shot-Mode CLEAR_ABORT; //Clear ABAT bit CLKOUT_ENABLED; //Enabled CLKOUT pin (will configure as SOF pin in CNF3) if (!EEPROM_ver) { EEPROMBYTEWrite(CANCTRL, CANCTRL_byte); } SPIByteWrite(CANCTRL, CANCTRL_byte); //Write to CANCTRL //Verify Mode change if ((SPIByteRead(CANSTAT)& 0xE0) != OPMODE_CONFIG) SPIByteWrite(CANCTRL, CANCTRL_byte); //Try again if (isUsbPowered) //Only if connected to USB. Traffic gen board doesn't process RX msgs { //Configure INTERRUPTS if (EEPROM_ver) { CANINTE_byte = EEPROMBYTERead(CANINTE); } /* else { EEPROMBYTEWrite(CANINTE,CANINTE_byte); } */ G_RXB_INT_ENABLED; G_TXB_INT_ENABLED; if (!EEPROM_ver) { EEPROMBYTEWrite(CANINTE, CANINTE_byte); } SPIByteWrite(CANINTE, CANINTE_byte); } //Use RXnBF pins as interrupts on RX //(BFPCTRL register) RXB0BF_PIN_INT; RXB1BF_PIN_INT; SPIByteWrite(BFPCTRL, BFPCTRL_byte); //Configure TXnRTS pins as RTS pins TXRTSCTRL_byte = 0x07; SPIByteWrite(TXRTSCTRL, TXRTSCTRL_byte); if (EEPROM_ver) { DataArray[0] = EEPROMBYTERead(RXB0CTRL); SPIByteWrite(RXB0CTRL, DataArray[0]); DataArray[0] = EEPROMBYTERead(RXB1CTRL); SPIByteWrite(RXB1CTRL, DataArray[0]); } else { DataArray[0] = 0; SPIByteWrite(RXB0CTRL, DataArray[0]); SPIByteWrite(RXB1CTRL, DataArray[0]); EEPROMBYTEWrite(RXB0CTRL, DataArray[0]); EEPROMBYTEWrite(RXB1CTRL, DataArray[0]); } //Configure MASKS DataArray[0] = 0x00; DataArray[1] = 0x00; DataArray[2] = 0x00; DataArray[3] = 0x00; if (EEPROM_ver) { DataArray[0] = EEPROMBYTERead(RXM0SIDH); DataArray[1] = EEPROMBYTERead(RXM0SIDL); DataArray[2] = EEPROMBYTERead(RXM0EID8); DataArray[3] = EEPROMBYTERead(RXM0EID0); } else { EEPROMDataWrite(RXM0SIDH, &DataArray[0], 4); } SPISeqWrite(RXM0SIDH, 4, DataArray); //RX Mask 0 DataArray[0] = 0x00; DataArray[1] = 0x00; DataArray[2] = 0x00; DataArray[3] = 0x00; if (EEPROM_ver) { DataArray[0] = EEPROMBYTERead(RXM1SIDH); DataArray[1] = EEPROMBYTERead(RXM1SIDL); DataArray[2] = EEPROMBYTERead(RXM1EID8); DataArray[3] = EEPROMBYTERead(RXM1EID0); } else { EEPROMDataWrite(RXM1SIDH, &DataArray[0], 4); } SPISeqWrite(RXM1SIDH, 4, DataArray); //RX Mask 1 //SPISeqWrite(RXB0CTRL, 1, 0); //RXB0 Control JM //SPISeqWrite(RXB1CTRL, 1, 0); //RXB1 Control JM //Configure FILTERS //Will RX standard messages into RXB0 and extended into RXB1 DataArray[0] = 0x00; DataArray[1] = 0x00; DataArray[2] = 0x00; DataArray[3] = 0x00; if (EEPROM_ver) { DataArray[0] = EEPROMBYTERead(RXF0SIDH); DataArray[1] = EEPROMBYTERead(RXF0SIDL); DataArray[2] = EEPROMBYTERead(RXF0EID8); DataArray[3] = EEPROMBYTERead(RXF0EID0); } else { EEPROMDataWrite(RXF0SIDH, &DataArray[0], 4); } SPISeqWrite(RXF0SIDH, 4, DataArray); //SPIByteWrite(RXF0SIDL, 0x00); //Clearing EXIDE... the rest is "don't care" DataArray[0] = 0x00; DataArray[1] = 0x00; DataArray[2] = 0x00; DataArray[3] = 0x00; if (EEPROM_ver) { DataArray[0] = EEPROMBYTERead(RXF1SIDH); DataArray[1] = EEPROMBYTERead(RXF1SIDL); DataArray[2] = EEPROMBYTERead(RXF1EID8); DataArray[3] = EEPROMBYTERead(RXF1EID0); } else { EEPROMDataWrite(RXF1SIDH, &DataArray[0], 4); } SPISeqWrite(RXF1SIDH, 4, DataArray); //SPIByteWrite(RXF1SIDL, 0x00); //Clearing EXIDE... the rest is "don't care" //JM DataArray[0] = 0x00; DataArray[1] = 0x08; DataArray[2] = 0x00; DataArray[3] = 0x00; if (EEPROM_ver) { DataArray[0] = EEPROMBYTERead(RXF2SIDH); DataArray[1] = EEPROMBYTERead(RXF2SIDL); DataArray[2] = EEPROMBYTERead(RXF2EID8); DataArray[3] = EEPROMBYTERead(RXF2EID0); } else { EEPROMDataWrite(RXF2SIDH, &DataArray[0], 4); } SPISeqWrite(RXF2SIDH, 4, DataArray); //SPIByteWrite(RXF2SIDL, 0x08); //Setting EXIDE... the rest is "don't care" DataArray[0] = 0x00; DataArray[1] = 0x08; DataArray[2] = 0x00; DataArray[3] = 0x00; if (EEPROM_ver) { DataArray[0] = EEPROMBYTERead(RXF3SIDH); DataArray[1] = EEPROMBYTERead(RXF3SIDL); DataArray[2] = EEPROMBYTERead(RXF3EID8); DataArray[3] = EEPROMBYTERead(RXF3EID0); } else { EEPROMDataWrite(RXF3SIDH, &DataArray[0], 4); } SPISeqWrite(RXF3SIDH, 4, DataArray); //SPIByteWrite(RXF3SIDL, 0x08); //Setting EXIDE... the rest is "don't care" //JM DataArray[0] = 0x00; DataArray[1] = 0x08; DataArray[2] = 0x00; DataArray[3] = 0x00; if (EEPROM_ver) { DataArray[0] = EEPROMBYTERead(RXF4SIDH); DataArray[1] = EEPROMBYTERead(RXF4SIDL); DataArray[2] = EEPROMBYTERead(RXF4EID8); DataArray[3] = EEPROMBYTERead(RXF4EID0); } else { EEPROMDataWrite(RXF4SIDH, &DataArray[0], 4); } SPISeqWrite(RXF4SIDH, 4, DataArray); //SPIByteWrite(RXF4SIDL, 0x08); //Setting EXIDE... the rest is "don't care" //JM DataArray[0] = 0x00; DataArray[1] = 0x08; DataArray[2] = 0x00; DataArray[3] = 0x00; if (EEPROM_ver) { DataArray[0] = EEPROMBYTERead(RXF5SIDH); DataArray[1] = EEPROMBYTERead(RXF5SIDL); DataArray[2] = EEPROMBYTERead(RXF5EID8); DataArray[3] = EEPROMBYTERead(RXF5EID0); } else { EEPROMDataWrite(RXF5SIDH, &DataArray[0], 4); } SPISeqWrite(RXF5SIDH, 4, DataArray); //SPIByteWrite(RXF5SIDL, 0x08); //Setting EXIDE... the rest is "don't care" //JM //Configure TX BUFFER 0 DataArray[0] = 0xA3; DataArray[1] = 0x09; DataArray[2] = 0x12; DataArray[3] = 0x34; DataArray[4] = 0x04; DataArray[5] = 0x00; DataArray[6] = 0x01; DataArray[7] = 0x02; DataArray[8] = 0x03; DataArray[9] = 0x04; DataArray[10] = 0x05; DataArray[11] = 0x06; DataArray[12] = 0x07; if (EEPROM_ver) { DataArray[0] = EEPROMBYTERead(TXB0SIDH); DataArray[1] = EEPROMBYTERead(TXB0SIDL); DataArray[2] = EEPROMBYTERead(TXB0EID8); DataArray[3] = EEPROMBYTERead(TXB0EID0); DataArray[4] = EEPROMBYTERead(TXB0DLC); DataArray[5] = EEPROMBYTERead(TXB0D0); DataArray[6] = EEPROMBYTERead(TXB0D1); DataArray[7] = EEPROMBYTERead(TXB0D2); DataArray[8] = EEPROMBYTERead(TXB0D3); DataArray[9] = EEPROMBYTERead(TXB0D4); DataArray[10] = EEPROMBYTERead(TXB0D5); DataArray[11] = EEPROMBYTERead(TXB0D6); DataArray[12] = EEPROMBYTERead(TXB0D7); } else { EEPROMDataWrite(TXB0SIDH, &DataArray, 13); } SPILoadTX(CAN_LD_TXB0_ID, 13, DataArray); //Configure TX BUFFER 1 DataArray[0] = 0x22; DataArray[1] = 0x00; DataArray[2] = 0x64; DataArray[3] = 0x68; DataArray[4] = 0x02; DataArray[5] = 0x00; DataArray[6] = 0x11; DataArray[7] = 0x22; DataArray[8] = 0x33; DataArray[9] = 0x44; DataArray[10] = 0x55; DataArray[11] = 0x66; DataArray[12] = 0x77; if (EEPROM_ver) { DataArray[0] = EEPROMBYTERead(TXB1SIDH); DataArray[1] = EEPROMBYTERead(TXB1SIDL); DataArray[2] = EEPROMBYTERead(TXB1EID8); DataArray[3] = EEPROMBYTERead(TXB1EID0); DataArray[4] = EEPROMBYTERead(TXB1DLC); DataArray[5] = EEPROMBYTERead(TXB1D0); DataArray[6] = EEPROMBYTERead(TXB1D1); DataArray[7] = EEPROMBYTERead(TXB1D2); DataArray[8] = EEPROMBYTERead(TXB1D3); DataArray[9] = EEPROMBYTERead(TXB1D4); DataArray[10] = EEPROMBYTERead(TXB1D5); DataArray[11] = EEPROMBYTERead(TXB1D6); DataArray[12] = EEPROMBYTERead(TXB1D7); } else { EEPROMDataWrite(TXB1SIDH, &DataArray, 13); } SPILoadTX(CAN_LD_TXB1_ID, 13, DataArray); //Configure TX BUFFER 2 DataArray[0] = 0xAA; DataArray[1] = 0x03; DataArray[2] = 0x33; DataArray[3] = 0x33; DataArray[4] = 0x08; DataArray[5] = 0xAA; DataArray[6] = 0xBB; DataArray[7] = 0xCC; DataArray[8] = 0xDD; DataArray[9] = 0xEE; DataArray[10] = 0xFF; DataArray[11] = 0x0A; DataArray[12] = 0x0B; SPILoadTX(CAN_LD_TXB2_ID, 13, DataArray); if (EEPROM_ver) { DataArray[0] = EEPROMBYTERead(TXB2SIDH); DataArray[1] = EEPROMBYTERead(TXB2SIDL); DataArray[2] = EEPROMBYTERead(TXB2EID8); DataArray[3] = EEPROMBYTERead(TXB2EID0); DataArray[4] = EEPROMBYTERead(TXB2DLC); DataArray[5] = EEPROMBYTERead(TXB2D0); DataArray[6] = EEPROMBYTERead(TXB2D1); DataArray[7] = EEPROMBYTERead(TXB2D2); DataArray[8] = EEPROMBYTERead(TXB2D3); DataArray[9] = EEPROMBYTERead(TXB2D4); DataArray[10] = EEPROMBYTERead(TXB2D5); DataArray[11] = EEPROMBYTERead(TXB2D6); DataArray[12] = EEPROMBYTERead(TXB2D7); } else { EEPROMDataWrite(TXB2SIDH, &DataArray, 13); } SPISeqRead(TXB1SIDH, 13, ReadArray); //Configure BIT TIMING SOF_ENABLED; //Start-of-Frame signal enabled. Will set when "SetBitTiming()" is called if (EEPROM_ver) { DataArray[0] = EEPROMBYTERead(CNF3); //Load array DataArray[1] = EEPROMBYTERead(CNF2); // DataArray[2] = EEPROMBYTERead(CNF1); // SPISeqWrite(CNF3, 3, DataArray); //Write registers } else { SetBitTiming(CAN_125kbps); //Note, this function puts device in Normal Mode } //Set Normal Mode and verify SET_NORMAL; SPIByteWrite(CANCTRL, CANCTRL_byte); //Write to CANCTRL old_CANCTRL = 0x00; //EEPROMCRCWrite(0,128); //Verify Mode change if ((SPIByteRead(CANSTAT)& 0xE0) != OPMODE_NORMAL) SPIByteWrite(CANCTRL, CANCTRL_byte); //Try again }
/****************************************************************************** * Function: void SetBitTiming//(char data_rate) * * PreCondition: None * * Input: None * * Output: None * * Side Effects: None * * Overview: This function sets the bit timing. * * * Note: None *****************************************************************************/ void SetBitTiming(char data_rate) { unsigned char a, b, c, dummy; //Set Config Mode and verify SET_CONFIG; //Set Configuration mode SPIByteWrite(CANCTRL, CANCTRL_byte); //Write to CANCTRL //Verify Mode change if ((SPIByteRead(CANSTAT)& 0xE0) != OPMODE_CONFIG) SPIByteWrite(CANCTRL, CANCTRL_byte); //Try again //Need 10TQ based on 20 MHz osc //Will only need to modify BRP to acheive the 4 bit rates //First clear CNFn registers CNF1_byte = 0; CNF2_byte = 0; CNF3_byte = 0; //Now set individual bits SJW_1TQ; //Sync Jump Width PRSEG_3TQ; //Prop Segment PHSEG1_3TQ; //Phase Seg 1 PHSEG2_3TQ; //Phase Seg 2 BTLMODE_CNF3; //Use CNF3 to set Phase Seg 2 SOF_ENABLED; //Start-of-Frame signal enabled. Will set when "SetBitTiming()" is called //Configure Baud Rate Prescaler switch (data_rate) // interpret command { case CAN_125kbps: // Set to 125 kbps BRP7; // break; case CAN_250kbps: // Set to 250 kbps BRP3; // break; case CAN_500kbps: // Set to 500 kbps BRP1; // break; case CAN_1000kbps: // Set to 1000 kbps BRP0; // break; default: // unrecognized or null command ; }// END switch: data_rate //Now write the CNFn registers DataArray[0] = CNF3_byte; //Load array DataArray[1] = CNF2_byte; // DataArray[2] = CNF1_byte; // SPISeqWrite(CNF3, 3, DataArray); //Write registers //Set Normal Mode and verify SET_NORMAL; SPIByteWrite(CANCTRL, CANCTRL_byte); //Write to CANCTRL //Verify Mode change if ((SPIByteRead(CANSTAT)& 0xE0) != OPMODE_CONFIG) SPIByteWrite(CANCTRL, CANCTRL_byte); //Try again EEPROMDataWrite(CNF3, &DataArray, 3); }