Esempio n. 1
0
/* this is for power gating */
int gpu_power_enable(void)
{
#ifdef CONFIG_PM_RUNTIME
	int err;
	int try_count = 50;
	err = pm_runtime_get_sync(&gpsPVRLDMDev->dev);
	if (err && pm_runtime_suspended(&gpsPVRLDMDev->dev)) {
		PVR_DPF((PVR_DBG_ERROR, "Error in pm_runtime_get_sync"));
		return err;
	}

	do { /* wait for gpu power turned on */
		if (!pm_runtime_suspended(&gpsPVRLDMDev->dev))
			break;

		if (try_count == 0)
			PVR_LOG(("enable_gpu_power on fail with pm_runtime_suspended"));
		schedule();
	} while (try_count--);

	/*this is debug for runtimepm power gating state*/
	{
		void __iomem *status;
		status = EXYNOS_PMUREG(0x4080);
		sgx_gpu_power_state = __raw_readl(status);
#ifdef PM_RUNTIME_DEBUG
		PVR_LOG(("enable_gpu_power: read register: 0x%x", sgx_gpu_power_state));
#endif
	}
#endif
	return 0;
}
Esempio n. 2
0
static int exynos_power_up_cpu(unsigned int cpu)
{
	unsigned int timeout;
	unsigned int val;
	unsigned int tmp;
	void __iomem *power_base;

	power_base = cpu_boot_info[cpu].power_base;
	if (power_base == 0)
		return -EPERM;

	val = __raw_readl(power_base + 0x4);
	if (!(val & EXYNOS_CORE_LOCAL_PWR_EN)) {
		tmp = __raw_readl(power_base);
		tmp |= (EXYNOS_CORE_LOCAL_PWR_EN);
		tmp |= (EXYNOS_CORE_AUTOWAKEUP_EN);
		__raw_writel(tmp, power_base);

		/* wait max 10 ms until cpu is on */
		timeout = 10;
		while (timeout) {
			val = __raw_readl(power_base + 0x4);

			if ((val & EXYNOS_CORE_LOCAL_PWR_EN) ==
			     EXYNOS_CORE_LOCAL_PWR_EN)
				break;
/* HACK for TRUSTZONE: After Bootup, the hotplug out works but while
 * hotplugging in we have to write twice to power_base reg
 */
#if defined(CONFIG_SOC_EXYNOS4415) && defined(CONFIG_ARM_TRUSTZONE)
			__raw_writel(tmp, power_base);
#endif
			mdelay(1);
			timeout--;
		}

		if (timeout == 0) {
			printk(KERN_ERR "cpu%d power up failed", cpu);
			return -ETIMEDOUT;
		}
	}

#if !defined(CONFIG_MACH_GARDA)
	/*
	 * Check Power down cpu wait on WFE, and occur SW reset
	 */
	if (soc_is_exynos3470() || soc_is_exynos3250()) {
		while(!__raw_readl(EXYNOS_PMUREG(0x0908)))
			udelay(10);

		udelay(10);

		tmp = __raw_readl(power_base + 0x4);
		tmp |= (0x3 << 8);
		__raw_writel(tmp, power_base + 0x4);

		/* TODO set COREX's WAKEUP_FROM_LOCAL_CFG register with 0x3 */
		printk("cpu%d: SWRESET\n", cpu);
		__raw_writel(((1 << 4) << cpu), EXYNOS_PMUREG(0x0400));
	}
#endif

	return 0;
}