Esempi in C++ (Cpp) per FH_SRVC_CHNL_SRAM_ADDR_REG

Esempio n. 1

File: iwl-agn-ucode.c Progetto: AbheekG/XIA-for-Linux

/*
 * ucode
 */
static int iwlagn_load_section(struct iwl_priv *priv, const char *name,
                               struct fw_desc *image, u32 dst_addr)
{
    dma_addr_t phy_addr = image->p_addr;
    u32 byte_cnt = image->len;
    int ret;

    priv->ucode_write_complete = 0;

    iwl_write_direct32(priv,
                       FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
                       FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);

    iwl_write_direct32(priv,
                       FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL), dst_addr);

    iwl_write_direct32(priv,
                       FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),
                       phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);

    iwl_write_direct32(priv,
                       FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),
                       (iwl_get_dma_hi_addr(phy_addr)
                        << FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);

    iwl_write_direct32(priv,
                       FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),
                       1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
                       1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX |
                       FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID);

    iwl_write_direct32(priv,
                       FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
                       FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE	|
                       FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE	|
                       FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);

    IWL_DEBUG_INFO(priv, "%s uCode section being loaded...\n", name);
    ret = wait_event_interruptible_timeout(priv->wait_command_queue,
                                           priv->ucode_write_complete, 5 * HZ);
    if (ret == -ERESTARTSYS) {
        IWL_ERR(priv, "Could not load the %s uCode section due "
                "to interrupt\n", name);
        return ret;
    }
    if (!ret) {
        IWL_ERR(priv, "Could not load the %s uCode section\n",
                name);
        return -ETIMEDOUT;
    }

    return 0;
}

Esempio n. 2

File: iwl-5000.c Progetto: AppEngine/linux-2.6

/*
 * ucode
 */
static int iwl5000_load_section(struct iwl_priv *priv,
				struct fw_desc *image,
				u32 dst_addr)
{
	dma_addr_t phy_addr = image->p_addr;
	u32 byte_cnt = image->len;

	iwl_write_direct32(priv,
		FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
		FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);

	iwl_write_direct32(priv,
		FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL), dst_addr);

	iwl_write_direct32(priv,
		FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),
		phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);

	iwl_write_direct32(priv,
		FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),
		(iwl_get_dma_hi_addr(phy_addr)
			<< FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);

	iwl_write_direct32(priv,
		FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),
		1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
		1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX |
		FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID);

	iwl_write_direct32(priv,
		FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
		FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE	|
		FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE	|
		FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);

	return 0;
}