void flite_hw_set_output_addr(struct flite_dev *dev, struct flite_addr *addr, int index) { flite_dbg("dst_buf[%d]: 0x%X", index, addr->y); if (soc_is_exynos5250_rev1) { writel(addr->y, dev->regs + FLITE_REG_CIOSA(index)); } else { writel(addr->y, dev->regs + FLITE_REG_CIOSA(0)); } }
void flite_hw_set_output_addr(struct flite_dev *dev, struct flite_addr *addr, int index) { u32 cfg = 0; flite_dbg("dst_buf[%d]: 0x%X", index, addr->y); cfg = readl(dev->regs + FLITE_REG_CIOSA(index)); if (!cfg) { writel(addr->y, dev->regs + FLITE_REG_CIOSA(index)); } else if (cfg != addr->y) { flite_err("address is invalid(%08X != %08X)\n", cfg, addr->y); writel(addr->y, dev->regs + FLITE_REG_CIOSA(index)); } }