/**
* @brief Execute ISP command to read User Configuration.
* @param[out] u32Config A two-word array.
* u32Config[0] holds CONFIG0, while u32Config[1] holds CONFIG1.
* @param[in] u32Count Avaliable word count in u32Config.
* @return Success or not.
* @retval 0 Success.
* @retval -1 Invalid parameter.
*/
int32_t FMC_ReadConfig(uint32_t *u32Config, uint32_t u32Count)
{
u32Config[0] = FMC_Read(FMC_CONFIG_BASE);
if (u32Count < 2)
return -1;
u32Config[1] = FMC_Read(FMC_CONFIG_BASE+4);
return 0;
}
void Flash_Write(uint8_t addr, uint32_t value)
{
uint32_t block_addr = GetBlockAddr();
if(addr < BLOCK_SIZE / 4 - 1)
{
if(FirstUse)
{
FMC_Write(block_addr + 4 * (addr + 1), value);
FirstUse = FALSE;
}
else
{
uint32_t i, write_addr;
for(i = block_addr; i < block_addr + BLOCK_SIZE; i += 4)
{
write_addr = (i - (block_addr + 4)) / 4;
if(write_addr != addr)
{
FMC_Write(i + BLOCK_SIZE, FMC_Read(i));
}
}
FMC_Write(block_addr, BLOCK_STAT_DISABLED);
block_addr += BLOCK_SIZE;
Block_Init(block_addr);
FMC_Write(block_addr + (4 * (addr + 1)), value);
}
}
}
void Block_Read(uint32_t block)
{
uint8_t i;
for (i = 0; i < USED_SIZE / 4; i++)
{
Using_Values[i] = FMC_Read(i * 4 + block);
}
}
bool flash_io_driver_initialize(void)
{
uint32_t desiredConfig0 = 0xF8FFFF7E;
uint32_t desiredConfig1 = APPLICATION_DATA_START;
uint32_t config0;
uint32_t config1;
bool fail = false;
critical_section_enter();
UNLOCKREG();
FMC_Init();
FMC_EnableAPUpdate();
LOCKREG();
if(FMC_Read(CONFIG0, &config0) != E_FMC_OK)
{
fail = true;
}
if(FMC_Read(CONFIG1, &config1) != E_FMC_OK)
{
fail = true;
}
if(fail || (desiredConfig0 != config0) || (desiredConfig1 != config1))
{
FMC_EnableConfigUpdate();
if(FMC_WriteConfig(config0, config1) != E_FMC_OK)
{
fail = true;
}
else
{
fail = false;
}
FMC_DisableConfigUpdate();
}
critical_section_exit();
return fail == false;
}
/**
* @brief Read the User Configuration words.
*
* @param[out] u32Config The word buffer to store the User Configuration data.
* @param[in] u32Count The word count to be read.
*
* @retval 0 Success
* @retval -1 Failed
*
* @details This function is used to read the settings of user configuration.
* if u32Count = 1, Only CONFIG0 will be returned to the buffer specified by u32Config.
* if u32Count = 2, Both CONFIG0 and CONFIG1 will be returned.
*/
int32_t FMC_ReadConfig(uint32_t *u32Config, uint32_t u32Count)
{
int32_t i;
for(i = 0; i < u32Count; i++)
u32Config[i] = FMC_Read(FMC_CONFIG_BASE + i * 4);
return 0;
}
uint32_t FMC_ReadPage(uint32_t u32StartAddr, uint32_t * u32Buf)
{
uint32_t i;
for (i = 0; i < FLASH_PAGE_SIZE/4; i++)
u32Buf[i] = FMC_Read(u32StartAddr + i*4);
return 0;
}
void DataFlashReadPage(uint32_t addr, uint32_t buffer)
{
uint32_t i;
uint32_t * pu32Buf = (uint32_t *)buffer;
/* Modify the address to MASS_STORAGE_OFFSET */
addr += MASS_STORAGE_OFFSET;
for(i = 0; i < FLASH_PAGE_SIZE / 4; i++)
pu32Buf[i] = FMC_Read(addr + i * 4);
}
uint32_t FMC_ReadPage(uint32_t u32startAddr, uint32_t * u32buff)
{
uint32_t i, u32data;
for (i = 0; i < FLASH_PAGE_SIZE/4; i++)
{
FMC_Read(u32startAddr + i*4, &u32data);
u32buff[i] = u32data;
}
return 0;
}
/**
* @brief Write User Configuration
*
* @param[in] u32Config The word buffer to store the User Configuration data.
* @param[in] u32Count The word count to program to User Configuration.
*
* @retval 0 Success
* @retval -1 Failed
*
* @details User must enable User Configuration update before writing it.
* User must erase User Configuration before writing it.
* User Configuration is also be page erase. User needs to backup necessary data
* before erase User Configuration.
*/
int32_t FMC_WriteConfig(uint32_t *u32Config, uint32_t u32Count)
{
int32_t i;
for(i = 0; i < u32Count; i++)
{
FMC_Write(FMC_CONFIG_BASE + i * 4, u32Config[i]);
if(FMC_Read(FMC_CONFIG_BASE + i * 4) != u32Config[i])
return -1;
}
return 0;
}
int32_t verify_data(uint32_t u32StartAddr, uint32_t u32EndAddr, uint32_t u32Pattern)
{
uint32_t u32Addr;
uint32_t u32data;
for (u32Addr = u32StartAddr; u32Addr < u32EndAddr; u32Addr += 4) {
u32data = FMC_Read(u32Addr);
if (u32data != u32Pattern) {
printf("\nFMC_Read data verify failed at address 0x%x, read=0x%x, expect=0x%x\n", u32Addr, u32data, u32Pattern);
return -1;
}
}
return 0;
}
//----- (000025B8) --------------------------------------------------------
__myevic__ uint32_t hidFMCReadCmd( CMD_T *pCmd )
{
uint32_t u32StartAddr;
uint32_t u32ParamLen;
u32StartAddr = pCmd->u32Arg1;
u32ParamLen = pCmd->u32Arg2;
myprintf( "FMC Read command - Start Addr: %d Param Len: %d\n", pCmd->u32Arg1, pCmd->u32Arg2 );
if ( ! u32ParamLen % EP2_MAX_PKT_SIZE )
{
return -1;
}
if ( u32ParamLen )
{
if ( u32ParamLen > FMC_FLASH_PAGE_SIZE )
{
u32ParamLen = FMC_FLASH_PAGE_SIZE;
}
SYS_UnlockReg();
FMC_ENABLE_ISP();
for ( uint32_t i = 0 ; i < u32ParamLen ; i += 4 )
{
uint32_t data;
data = FMC_Read( u32StartAddr + i );
MemCpy( &hidData[i], &data, 4 );
}
FMC_DISABLE_ISP();
SYS_LockReg();
hidDataIndex = u32ParamLen;
pCmd->u32Signature = u32ParamLen;
USBD_MemCopy(
(uint8_t *)(USBD_BUF_BASE + USBD_GET_EP_BUF_ADDR(EP2)),
hidData,
EP2_MAX_PKT_SIZE
);
USBD_SET_PAYLOAD_LEN( EP2, EP2_MAX_PKT_SIZE );
hidDataIndex -= EP2_MAX_PKT_SIZE;
}
return 0;
}
uint32_t Flash_Read(uint8_t addr)
{
uint32_t block_addr = GetBlockAddr();
if(addr < BLOCK_SIZE / 4 - 1)
{
if(FirstUse)
{
return 0xff;
}
else
{
return FMC_Read(block_addr + 4 * addr);
}
}
return 0;
}
//============================================================================
// u32addr : 0-1024
//============================================================================
uint32_t DATA_FLASH_Read(uint32_t u32add)
{
uint32_t u32data;
#ifdef M451
u32data = FMC_Read(u32add*4+DATA_Flash_Start_ADD);
#else
__set_PRIMASK(1);
UNLOCKREG();
DrvFMC_EnableISP();
DrvFMC_Read(u32add*4+DATA_Flash_Start_ADD, &u32data);
DrvFMC_DisableISP();
LOCKREG();
__set_PRIMASK(0);
#endif
return u32data;
}
//============================================================================
// DATA FLASH OPERATION
// u32addr : 0-1024 (For 4KBytes Data Flash)
// u32data : 0-0xFFFFFFFF (4Bytes)
//============================================================================
void DATA_FLASH_Write(uint32_t u32addr,uint32_t u32data)
{
uint32_t i=0;
#ifdef M451
SYS_UnlockReg();
FMC_Open();
for(i=0; i<PAGE_SIZE; i++)
data_buff[i] = FMC_Read(DATA_Flash_Start_ADD+i*4+ u32addr/PAGE_SIZE*2048);
FMC_Erase(DATA_Flash_Start_ADD+u32addr/PAGE_SIZE*2048);
data_buff[u32addr%PAGE_SIZE]=u32data;
for(i=0; i<PAGE_SIZE; i++)
FMC_Write(DATA_Flash_Start_ADD+i*4+ u32addr/PAGE_SIZE*2048, data_buff[i]);
FMC_Close();
SYS_LockReg();
#else
uint32_t data_buff[PAGE_SIZE];
__set_PRIMASK(1);//Avoid interrupt
UNLOCKREG();
DrvFMC_EnableISP();
for(i=0; i<PAGE_SIZE; i++)
DrvFMC_Read(DATA_Flash_Start_ADD+i*4+ u32addr/128*512, &data_buff[i]);
DrvFMC_Erase(DATA_Flash_Start_ADD+u32addr/128*512);
data_buff[u32addr%128]=u32data;
for(i=0; i<PAGE_SIZE; i++)
DrvFMC_Write(DATA_Flash_Start_ADD+i*4+ u32addr/128*512, data_buff[i]);
DrvFMC_DisableISP();
LOCKREG();
__set_PRIMASK(0);
#endif
}
//----- (000025B8) --------------------------------------------------------
__myevic__ uint32_t hidFMCReadCmd( CMD_T *pCmd )
{
uint32_t u32StartAddr;
uint32_t u32ParamLen;
u32StartAddr = pCmd->u32Arg1;
u32ParamLen = pCmd->u32Arg2;
myprintf( "FMC Read command - Start Addr: %d Param Len: %d\n", pCmd->u32Arg1, pCmd->u32Arg2 );
if ( ! u32ParamLen % EP2_MAX_PKT_SIZE )
{
return -1;
}
if ( u32ParamLen )
{
if ( u32ParamLen > FMC_FLASH_PAGE_SIZE )
{
u32ParamLen = FMC_FLASH_PAGE_SIZE;
}
SYS_UnlockReg();
FMC_ENABLE_ISP();
for ( uint32_t i = 0 ; i < u32ParamLen ; i += 4 )
{
uint32_t data;
data = FMC_Read( u32StartAddr + i );
MemCpy( &hidData[i], &data, 4 );
}
FMC_DISABLE_ISP();
SYS_LockReg();
hidInDataPtr = hidData;
hidStartInReport( u32ParamLen );
}
return 0;
}
static int LoadImage(uint32_t u32ImageBase, uint32_t u32ImageLimit, uint32_t u32FlashAddr, uint32_t u32MaxSize)
{
uint32_t i, j, u32Data, u32ImageSize, *pu32Loader;
u32ImageSize = u32MaxSize;
printf("Program image to flash address 0x%x...", u32FlashAddr);
pu32Loader = (uint32_t *)u32ImageBase;
for(i = 0; i < u32ImageSize; i += FMC_FLASH_PAGE_SIZE)
{
FMC_Erase(u32FlashAddr + i);
for(j = 0; j < FMC_FLASH_PAGE_SIZE; j += 4)
{
FMC_Write(u32FlashAddr + i + j, pu32Loader[(i + j) / 4]);
}
}
printf("OK.\n");
printf("Verify ...");
/* Verify loader */
for(i = 0; i < u32ImageSize; i += FMC_FLASH_PAGE_SIZE)
{
for(j = 0; j < FMC_FLASH_PAGE_SIZE; j += 4)
{
u32Data = FMC_Read(u32FlashAddr + i + j);
if(u32Data != pu32Loader[(i + j) / 4])
{
printf("data mismatch on 0x%x, [0x%x], [0x%x]\n", u32FlashAddr + i + j, u32Data, pu32Loader[(i + j) / 4]);
return -1;
}
if(i + j >= u32ImageSize)
break;
}
}
printf("OK.\n");
return 0;
}
void DataFlashRead(uint32_t addr, uint32_t size, uint32_t buffer)
{
/* This is low level read function of USB Mass Storage */
int32_t len;
uint32_t i;
uint32_t * pu32Buf = (uint32_t *)buffer;
/* Modify the address to MASS_STORAGE_OFFSET */
addr += MASS_STORAGE_OFFSET;
len = (int32_t)size;
while(len >= BUFFER_PAGE_SIZE)
{
//FMC_ReadPage(addr, (uint32_t *)buffer);
for(i = 0; i < BUFFER_PAGE_SIZE / 4; i++)
pu32Buf[i] = FMC_Read(addr + i * 4);
addr += BUFFER_PAGE_SIZE;
buffer += BUFFER_PAGE_SIZE;
len -= BUFFER_PAGE_SIZE;
pu32Buf = (uint32_t *)buffer;
}
}
uint32_t GetBlockAddr(void)
{
uint32_t i, value;
for (i = FLASH_START; i < FLASH_START + FLASH_SIZE; i += BLOCK_SIZE /*32bit*/)
{
value = FMC_Read(i);
switch(value)
{
case BLOCK_STAT_DISABLED:
continue;
case BLOCK_STAT_ENABLED:
return i;
case BLOCK_STAT_EMPTY:
Block_Init(FLASH_START);
FirstUse = TRUE;
return FLASH_START;
}
}
Flash_Clear();
Block_Init(FLASH_START);
FirstUse = TRUE;
return FLASH_START;
}
//----- (00002C60) --------------------------------------------------------
__myevic__ void hidSetInReport()
{
uint8_t cmd = hidCmd.u8Cmd;
switch ( cmd )
{
case HID_CMD_GETINFO:
case HID_CMD_SCREENSHOT:
{
if ( hidDataIndex )
{
USBD_MemCopy(
(uint8_t *)(USBD_BUF_BASE + USBD_GET_EP_BUF_ADDR(EP2)),
&hidInDataPtr[hidCmd.u32Signature - hidDataIndex],
EP2_MAX_PKT_SIZE
);
USBD_SET_PAYLOAD_LEN( EP2, EP2_MAX_PKT_SIZE );
hidDataIndex -= EP2_MAX_PKT_SIZE;
}
else
{
cmd = HID_CMD_NONE;
}
break;
}
case HID_CMD_FMCREAD:
{
if ( !hidDataIndex )
{
uint32_t u32Addr = hidCmd.u32Arg1 + hidCmd.u32Signature;
int32_t u32Size = hidCmd.u32Arg2 - hidCmd.u32Signature;
if ( u32Size > 0 )
{
if ( u32Size > FMC_FLASH_PAGE_SIZE ) u32Size = FMC_FLASH_PAGE_SIZE;
SYS_UnlockReg();
FMC_ENABLE_ISP();
for ( int i = 0 ; i < u32Size ; i += 4 )
{
uint32_t data = FMC_Read( u32Addr + i );
MemCpy( &hidData[ FMC_FLASH_PAGE_SIZE - u32Size + i ], &data, 4 );
}
FMC_DISABLE_ISP();
SYS_LockReg();
hidDataIndex = u32Size;
hidCmd.u32Signature += u32Size;
}
}
if ( hidDataIndex )
{
USBD_MemCopy(
(uint8_t *)(USBD_BUF_BASE + USBD_GET_EP_BUF_ADDR(EP2)),
&hidData[ FMC_FLASH_PAGE_SIZE - hidDataIndex ],
EP2_MAX_PKT_SIZE
);
USBD_SET_PAYLOAD_LEN( EP2, EP2_MAX_PKT_SIZE );
hidDataIndex -= EP2_MAX_PKT_SIZE;
}
else
{
cmd = HID_CMD_NONE;
}
break;
}
default:
cmd = HID_CMD_NONE;
break;
}
hidCmd.u8Cmd = cmd;
}
int aprom()
{
uint8_t u8Item;
uint32_t u32Data;
char *acBootMode[] = {"LDROM+IAP", "LDROM", "APROM+IAP", "APROM"};
uint32_t u32CBS;
/* Unlock protected registers */
SYS_UnlockReg();
/* Init system clock and multi-function I/O */
SYS_Init();
/* Init UART */
UART_Init();
printf("\n\n");
printf("+----------------------------------------+\n");
printf("| NUC029 FMC IAP Sample Code |\n");
printf("| [APROM code] |\n");
printf("+----------------------------------------+\n");
/* Enable FMC ISP function */
FMC_Open();
if(SetIAPBoot() < 0)
{
printf("Failed to set IAP boot mode!\n");
goto lexit;
}
/* Get boot mode */
printf(" Boot Mode ............................. ");
u32CBS = (FMC->ISPSTA & FMC_ISPSTA_CBS_Msk) >> FMC_ISPSTA_CBS_Pos;
printf("[%s]\n", acBootMode[u32CBS]);
u32Data = FMC_ReadCID();
printf(" Company ID ............................ [0x%08x]\n", u32Data);
u32Data = FMC_ReadDID();
printf(" Device ID ............................. [0x%08x]\n", u32Data);
u32Data = FMC_ReadPID();
printf(" Product ID ............................ [0x%08x]\n", u32Data);
/* Read User Configuration */
printf(" User Config 0 ......................... [0x%08x]\n", FMC_Read(FMC_CONFIG_BASE));
printf(" User Config 1 ......................... [0x%08x]\n", FMC_Read(FMC_CONFIG_BASE + 4));
do
{
printf("\n\n\n");
printf("+----------------------------------------+\n");
printf("| Select |\n");
printf("+----------------------------------------+\n");
printf("| [0] Load IAP code to LDROM |\n");
printf("| [1] Run IAP program (in LDROM) |\n");
printf("+----------------------------------------+\n");
printf("Please select...");
u8Item = UART_GetChar();
printf("%c\n", u8Item);
switch(u8Item)
{
case '0':
FMC_EnableLDUpdate();
if(LoadImage((uint32_t)&loaderImage1Base, (uint32_t)&loaderImage1Limit,
FMC_LDROM_BASE, FMC_LDROM_SIZE) != 0)
{
printf("Load image to LDROM failed!\n");
goto lexit;
}
FMC_DisableLDUpdate();
break;
case '1':
printf("\n\nChange VECMAP and branch to LDROM...\n");
UART_WAIT_TX_EMPTY(UART0); /* To make sure all message has been print out */
/* Mask all interrupt before changing VECMAP to avoid wrong interrupt handler fetched */
__set_PRIMASK(1);
/* Set VECMAP to LDROM for booting from LDROM */
FMC_SetVectorPageAddr(FMC_LDROM_BASE);
/* Software reset to boot to LDROM */
NVIC_SystemReset();
break;
default :
break;
}
}
while(1);
lexit:
/* Disable FMC ISP function */
FMC_Close();
/* Lock protected registers */
SYS_LockReg();
printf("\nFMC Sample Code Completed.\n");
while(1);
}
_Bool Flash_Read(uint8_t addr, uint32_t* dist)
{
if (addr < USED_SIZE / 4)
{
if (ReadRequed)
{
uint8_t i;
uint32_t CRC = USED_SIZE;
Block_Read(NEW_BLOCK_ADDR);
for (i = 0; i < USED_SIZE / 4; i++)
{
CRC ^= Using_Values[i];
}
if (CRC == FMC_Read(NEW_BLOCK_ADDR + USED_SIZE))
{
*dist = FMC_Read(NEW_BLOCK_ADDR + addr * 4);
/*if (*dist == 0xffff)
{
return FALSE;
}*/
ReadRequed = FALSE;
return TRUE;
}
else
{
FMC_Erase(NEW_BLOCK_ADDR);
Flash_Init();
DPRINTF(("Area 1 error! \n"));
}
Block_Read(BAK_BLOCK_ADDR);
for (i = 0; i < USED_SIZE / 4; i++)
{
CRC ^= Using_Values[i];
}
if (CRC == FMC_Read(BAK_BLOCK_ADDR + USED_SIZE))
{
Block_Clear(NEW_BLOCK_ADDR);
for (i = 0; i < USED_SIZE / 4; i++)
{
FMC_Write(NEW_BLOCK_ADDR + i * 4, Using_Values[i]);
}
FMC_Write(NEW_BLOCK_ADDR + USED_SIZE, CRC);
*dist = FMC_Read(BAK_BLOCK_ADDR + addr * 4);
/*if (*dist == 0xffff)
{
return FALSE;
}*/
ReadRequed = FALSE;
return TRUE;
}
else
{
FMC_Erase(BAK_BLOCK_ADDR);
Flash_Init();
DPRINTF(("Area 2 CRC error! \n"));
}
}
else
{
*dist = Using_Values[addr];
return TRUE;
}
}
else
{
DPRINTF(("Err: Addr: %d overrange!\n", addr));
}
return FALSE;
}
/*---------------------------------------------------------------------------------------------------------*/
int32_t main (void)
{
uint8_t ch;
uint32_t u32Data;
/* Init System, IP clock and multi-function I/O */
SYS_Init();
/* Init UART0 for printf */
UART0_Init();
/* Unlock protected registers for ISP function */
SYS_UnlockReg();
/* Enable ISP function */
FMC->ISPCON |= FMC_ISPCON_ISPEN_Msk;
/* Check the signature to check if Simple LD code is finished or not */
if (inp32(KEY_ADDR) == SIGNATURE)
{
/* Just clear SIGNATURE and finish the sample code if Simple LD code has been executed. */
outp32(KEY_ADDR, 0);
/* Read BS */
printf(" Boot Mode .................................. ");
if ((FMC->ISPCON & FMC_ISPCON_BS_Msk) == FMC_ISPCON_BS_APROM)
printf("[APROM]\n");
else
{
printf("[LDROM]\n");
printf(" WARNING: The driver sample code must execute in AP mode!\n");
}
goto lexit;
}
/*
This sample code will demo some function about FMC:
1. Check if CPU boots from APROM
2. Read 96-bit UID
3. Erase LDROM, program LD sample code to LDROM, and verify LD sample code
4. Select next booting from LDROM and run LD sample code
*/
printf("\n\n");
printf("+--------------------------------------------------------+\n");
printf("| M05xx Flash Memory Controller Driver Sample Code |\n");
printf("+--------------------------------------------------------+\n");
printf("\nCPU @ %dHz\n\n", SystemCoreClock);
/* Read BS */
printf(" Boot Mode .................................. ");
if ((FMC->ISPCON & FMC_ISPCON_BS_Msk) == FMC_ISPCON_BS_APROM)
printf("[APROM]\n");
else
{
printf("[LDROM]\n");
printf(" WARNING: The driver sample code must execute in AP mode!\n");
goto lexit;
}
/* Read UID */
printf(" UID[ 0:31] ................................. [0x%x]\n", FMC_ReadUID(0));
printf(" UID[32:63] ................................. [0x%x]\n", FMC_ReadUID(1));
printf(" UID[64:95] ................................. [0x%x]\n", FMC_ReadUID(2));
/* Read Data Flash base address */
printf(" Data Flash Base Address .................... [0x%x]\n", FMC->DFBADR);
/* Check the data in LD ROM to avoid overwrite them */
u32Data = FMC_Read(FMC_LDROM_BASE);
if (u32Data != 0xFFFFFFFF)
{
printf("\n WARNING: There is code in LD ROM.\n If you proceed, the code in LD ROM will be corrupted.\n");
printf(" Continue? [y/n]:");
ch = getchar();
putchar(ch);
if (ch != 'y')
goto lexit;
printf("\n\n");
}
/* Check LD image size */
g_u32ImageSize = (uint32_t)&loaderImageLimit - (uint32_t)&loaderImageBase;
if (g_u32ImageSize == 0)
{
printf(" ERROR: Loader Image is 0 bytes!\n");
goto lexit;
}
if (g_u32ImageSize > FMC_LDROM_SIZE)
{
printf(" ERROR: Loader Image is larger than 4KBytes!\n");
goto lexit;
}
/* Erase LDROM, program LD sample code to LDROM, and verify LD sample code */
/* The chip will boot from LDROM and run LD sample code if LD sample code is downloaded successfully */
FMC_LDROM_Test();
lexit:
/* Disable ISP function */
FMC->ISPCON &= ~FMC_ISPCON_ISPEN_Msk;
/* Lock protected registers */
SYS_LockReg();
printf("\nFMC Sample Code Completed.\n");
}
int main()
{
uint32_t i, u32Data;
/* Init System, IP clock and multi-function I/O */
SYS_Init();
/* Init UART0 for printf */
UART0_Init();
/*---------------------------------------------------------------------------------------------------------*/
/* SAMPLE CODE */
/*---------------------------------------------------------------------------------------------------------*/
printf("\n\nCPU @ %dHz\n", SystemCoreClock);
SYS_UnlockReg();
/* Enable FMC ISP function */
FMC_Open();
if (set_data_flash_base(DATA_FLASH_TEST_BASE) < 0)
{
printf("Failed to set Data Flash base address!\n");
goto lexit;
}
/* Read BS */
printf(" Boot Mode ............................. ");
if (FMC_GetBootSource() == 0)
printf("[APROM]\n");
else
{
printf("[LDROM]\n");
printf(" WARNING: The driver sample code must execute in AP mode!\n");
goto lexit;
}
u32Data = FMC_ReadCID();
printf(" Company ID ............................ [0x%08x]\n", u32Data);
u32Data = FMC_ReadPID();
printf(" Product ID ............................ [0x%08x]\n", u32Data);
for (i = 0; i < 3; i++)
{
u32Data = FMC_ReadUID(i);
printf(" Unique ID %d ........................... [0x%08x]\n", i, u32Data);
}
for (i = 0; i < 4; i++)
{
u32Data = FMC_ReadUCID(i);
printf(" Unique Customer ID %d .................. [0x%08x]\n", i, u32Data);
}
/* Read User Configuration */
printf(" User Config 0 ......................... [0x%08x]\n", FMC_Read(FMC_CONFIG_BASE));
printf(" User Config 1 ......................... [0x%08x]\n", FMC_Read(FMC_CONFIG_BASE+4));
/* Read Data Flash base address */
u32Data = FMC_ReadDataFlashBaseAddr();
printf(" Data Flash Base Address ............... [0x%08x]\n", u32Data);
printf("\n\nLDROM test =>\n");
FMC_ENABLE_LD_UPDATE();
if (flash_test(FMC_LDROM_BASE, FMC_LDROM_END, TEST_PATTERN) < 0)
{
printf("\n\nLDROM test failed!\n");
goto lexit;
}
FMC_DISABLE_LD_UPDATE();
printf("\n\nAPROM test =>\n");
FMC_ENABLE_AP_UPDATE();
if (flash_test(APROM_TEST_BASE, DATA_FLASH_TEST_BASE, TEST_PATTERN) < 0)
{
printf("\n\nAPROM test failed!\n");
goto lexit;
}
FMC_DISABLE_AP_UPDATE();
printf("\n\nData Flash test =>\n");
if (flash_test(DATA_FLASH_TEST_BASE, DATA_FLASH_TEST_END, TEST_PATTERN) < 0)
{
printf("\n\nUHB test failed!\n");
goto lexit;
}
lexit:
/* Disable FMC ISP function */
FMC_Close();
/* Lock protected registers */
SYS_LockReg();
printf("\nFMC Sample Code Completed.\n");
while (1);
}
void FMC_LDROM_Test(void)
{
int32_t i32Err;
uint32_t u32Data, i, j, *pu32Loader;
/* Enable LDROM Update */
_FMC_ENABLE_LD_UPDATE();
printf(" Erase LD ROM ............................... ");
/* Page Erase LDROM */
for (i = 0; i < FMC_LDROM_SIZE; i += FMC_FLASH_PAGE_SIZE)
FMC_Erase(FMC_LDROM_BASE + i);
/* Erase Verify */
i32Err = 0;
for (i = FMC_LDROM_BASE; i < (FMC_LDROM_BASE+FMC_LDROM_SIZE); i += 4)
{
u32Data = FMC_Read(i);
if (u32Data != 0xFFFFFFFF)
{
i32Err = 1;
}
}
if (i32Err)
printf("[FAIL]\n");
else
printf("[OK]\n");
printf(" Program LD ROM test ........................ ");
/* Program LDROM and read out data to compare it */
for(i = FMC_LDROM_BASE; i < (FMC_LDROM_BASE+FMC_LDROM_SIZE); i += 4)
{
FMC_Write(i, i);
}
i32Err = 0;
for(i = FMC_LDROM_BASE; i < (FMC_LDROM_BASE+FMC_LDROM_SIZE); i += 4)
{
u32Data = FMC_Read(i);
if (u32Data != i)
{
i32Err = 1;
}
}
if (i32Err)
printf("[FAIL]\n");
else
printf("[OK]\n");
printf(" Program Simple LD Code ..................... ");
pu32Loader = (uint32_t *)&loaderImageBase;
for (i=0;i<g_u32ImageSize;i+=FMC_FLASH_PAGE_SIZE)
{
FMC_Erase(FMC_LDROM_BASE + i);
for (j=0;j<FMC_FLASH_PAGE_SIZE;j+=4)
{
FMC_Write(FMC_LDROM_BASE + i + j, pu32Loader[(i + j) / 4]);
}
}
/* Verify loader */
i32Err = 0;
for (i=0;i<g_u32ImageSize;i+=FMC_FLASH_PAGE_SIZE)
{
for (j=0;j<FMC_FLASH_PAGE_SIZE;j+=4)
{
u32Data = FMC_Read(FMC_LDROM_BASE + i + j);
if (u32Data != pu32Loader[(i+j)/4])
i32Err = 1;
if (i + j >= g_u32ImageSize)
break;
}
}
if (i32Err)
{
printf("[FAIL]\n");
}
else
{
printf("[OK]\n");
/* Reset CPU to boot to LD mode */
printf("\n >>> Reset to LD mode <<<\n");
/* Make sure message has printed out */
_UART_WAIT_TX_EMPTY(UART0);
FMC->ISPCON |= FMC_ISPCON_BS_LDROM;
/* CPU Reset */
_SYS_RESET_CPU();
}
}
int main()
{
uint32_t i, u32Data;
/* Unlock protected registers */
SYS_UnlockReg();
SYS_Init();
UART_Init();
/*
This sample code is used to show how to use StdDriver API to implement ISP functions.
*/
printf("\n\n");
printf("+----------------------------------------+\n");
printf("| NUC029xDE FMC Sample Code |\n");
printf("+----------------------------------------+\n");
//SYS_UnlockReg();
/* Enable FMC ISP function */
FMC_Open();
if(SetDataFlashBase(DATA_FLASH_TEST_BASE) < 0)
{
printf("Failed to set Data Flash base address!\n");
goto lexit;
}
/* Read BS */
printf(" Boot Mode ............................. ");
if(FMC_GetBootSource() == 0)
printf("[APROM]\n");
else
{
printf("[LDROM]\n");
printf(" WARNING: The driver sample code must execute in AP mode!\n");
goto lexit;
}
u32Data = FMC_ReadCID();
printf(" Company ID ............................ [0x%08x]\n", u32Data);
u32Data = FMC_ReadDID();
printf(" Device ID ............................. [0x%08x]\n", u32Data);
u32Data = FMC_ReadPID();
printf(" Product ID ............................ [0x%08x]\n", u32Data);
for(i = 0; i < 3; i++)
{
u32Data = FMC_ReadUID(i);
printf(" Unique ID %d ........................... [0x%08x]\n", i, u32Data);
}
for(i = 0; i < 4; i++)
{
u32Data = FMC_ReadUCID(i);
printf(" Unique Customer ID %d .................. [0x%08x]\n", i, u32Data);
}
/* Read User Configuration */
printf(" User Config 0 ......................... [0x%08x]\n", FMC_Read(FMC_CONFIG_BASE));
printf(" User Config 1 ......................... [0x%08x]\n", FMC_Read(FMC_CONFIG_BASE + 4));
/* Read Data Flash base address */
u32Data = FMC_ReadDataFlashBaseAddr();
printf(" Data Flash Base Address ............... [0x%08x]\n", u32Data);
printf("\n\nLDROM test =>\n");
FMC_EnableLDUpdate();
if(FlashTest(FMC_LDROM_BASE, FMC_LDROM_BASE + FMC_LDROM_SIZE, TEST_PATTERN) < 0)
{
printf("\n\nLDROM test failed!\n");
goto lexit;
}
FMC_DisableLDUpdate();
printf("\n\nAPROM test =>\n");
FMC_EnableAPUpdate();
if(FlashTest(APROM_TEST_BASE, APROM_TEST_END, TEST_PATTERN) < 0)
{
printf("\n\nAPROM test failed!\n");
goto lexit;
}
FMC_DisableAPUpdate();
printf("\n\nData Flash test =>\n");
if(FlashTest(DATA_FLASH_TEST_BASE, DATA_FLASH_TEST_END, TEST_PATTERN) < 0)
{
printf("\n\nUHB test failed!\n");
goto lexit;
}
lexit:
/* Disable FMC ISP function */
FMC_Close();
/* Lock protected registers */
SYS_LockReg();
printf("\nFMC Sample Code Completed.\n");
while(1);
}
/*---------------------------------------------------------------------------------------------------------*/
int32_t main(void)
{
int32_t i32Err = 0;
uint32_t u32Data, u32ImageSize, i, j, *pu32Loader;
/* Init system, IP clock and multi-function I/O */
SYS_Init();
/* Init UART0 for printf */
UART0_Init();
/* Init GPIO P2.0 (output) and P3.2 (EINT0) */
GPIO_Init();
/* Init SPI0 and LCD */
LCD_Init();
LCD_EnableBackLight();
LCD_ClearScreen();
/*
This sample shows how to switch between APROM and LDROM.
Target:
Smpl_FMC
Smpl_FMC is the code for APROM. It will program the firmware to LDROM and
user can press SW_INT to change to boot from LDROM.
In APROM, the LED blanking interval is 200ms.
Smpl_LDROM
Smpl_LDROM is the code for LDROM. User can press SW_INT to change to boot from APROM.
In LDROM, the LED blanking interval is 1000ms.
*/
LCD_Print(0, "Boot from APROM");
LCD_Print(1, "Press SW_INT ");
while (1)
{
if(g_u8IsPress)
{
g_u8IsPress = FALSE;
/* Unlock protected registers to write ISP Control Register (ISPCON) */
SYS_UnlockReg();
/* Program sample LD code to LDROM */
/* Enable ISP LDROM update function */
FMC->ISPCON = FMC_ISPCON_LDUEN_Msk | FMC_ISPCON_ISPEN_Msk;
/* Page Erase LDROM */
for (i = 0;i < 4096;i += PAGE_SIZE)
FMC_Erase(LDROM_BASE + i);
/* Erase Verify */
i32Err = 0;
for (i = LDROM_BASE; i < (LDROM_BASE + 4096); i += 4)
{
u32Data = FMC_Read(i);
if (u32Data != 0xFFFFFFFF)
{
i32Err = 1;
}
}
u32ImageSize = (uint32_t)&g_u32LoaderImageLimit - (uint32_t)&g_u32LoaderImageBase;
pu32Loader = (uint32_t *)&g_u32LoaderImageBase;
for (i = 0;i < u32ImageSize;i += PAGE_SIZE)
{
FMC_Erase(LDROM_BASE + i);
for (j = 0;j < PAGE_SIZE;j += 4)
{
FMC_Write(LDROM_BASE + i + j, pu32Loader[(i + j) / 4]);
}
}
/* Verify loader */
i32Err = 0;
for (i = 0;i < u32ImageSize;i += PAGE_SIZE)
{
for (j = 0;j < PAGE_SIZE;j += 4)
{
u32Data = FMC_Read(LDROM_BASE + i + j);
if (u32Data != pu32Loader[(i+j)/4])
i32Err = 1;
if (i + j >= u32ImageSize)
break;
}
}
if(i32Err)
{
LCD_ClearScreen();
LCD_Print(0,"LDROM write fail");
}
else
{
/* Switch to boot from LDROM */
FMC->ISPCON = FMC_ISPCON_BS_LDROM;
_SYS_RESET_CPU();
}
while (1);
}
else
{
/* LED blanking for 200ms */
P2->DOUT ^= 1;
SYS_SysTickDelay(100000);
}
}
}
/**
* @brief Main funcion
* @param None
* @retval 0: Success; <0: Failed
*/
int32_t main (void)
{
int32_t i32Err;
uint32_t u32Data, i, u32ImageSize, j, *pu32Loader;
uint8_t ch;
UNLOCKREG();
/* Enable FMC ISP function */
FMC_Init();
/* Read Company ID */
u32Data = 0;
FMC_ReadCID(&u32Data);
if (u32Data != 0xda)
{
printf("Wrong CID: 0x%x\n", u32Data);
goto lexit;
}
/* Check the signature to check if Simple LD code is finished or not */
if (inpw(KEY_ADDR) == SIGNATURE)
{
/* Just clear SIGNATURE and finish the sample code if Simple LD code has been executed. */
outpw(KEY_ADDR, 0);
/* Read BS */
printf(" Boot Mode .................................. ");
if (FMC_GetBootSelect() == E_FMC_APROM)
printf("[APROM]\n");
else
{
printf("[LDROM]\n");
printf(" WARNING: The driver sample code must execute in AP mode!\n");
}
goto lexit;
}
printf("\n\n");
printf("+-------------------------------------------------------------------------+\n");
printf("| NANO1xx Flash Memory Controller Driver Sample Code |\n");
printf("+-------------------------------------------------------------------------+\n");
printf(" NOTE: This sample must be applied to NANO1xx series equipped with 16KB RAM.\n");
/* Read BS */
printf(" Boot Mode .................................. ");
if (FMC_GetBootSelect() == E_FMC_APROM)
printf("[APROM]\n");
else
{
printf("[LDROM]\n");
printf(" WARNING: The driver sample code must execute in AP mode!\n");
goto lexit;
}
/* Read Data Flash base address */
u32Data = FMC_ReadDataFlashBaseAddr();
printf(" Data Flash Base Address .................... [0x%08x]\n", u32Data);
/* Check the data in LD ROM to avoid overwrite them */
FMC_Read(LDROM_BASE, &u32Data);
if (u32Data != 0xFFFFFFFF)
{
printf("\n WARNING: There is code in LD ROM.\n If you proceed, the code in LD ROM will be corrupted.\n");
printf(" Continue? [y/n]:");
ch = getchar();
putchar(ch);
if (ch != 'y')
goto lexit;
printf("\n\n");
}
/* Enable LDROM update */
FMC_EnableLDUpdate();
printf(" Erase LD ROM ............................... ");
/* Page Erase LDROM */
for (i = 0; i < 4096; i += PAGE_SIZE)
FMC_Erase(LDROM_BASE + i);
/* Erase Verify */
i32Err = 0;
for (i = LDROM_BASE; i < (LDROM_BASE+4096); i += 4)
{
FMC_Read(i, &u32Data);
if(u32Data != 0xFFFFFFFF)
{
printf(" u32Data = 0x%x\n", u32Data);
i32Err = 1;
}
}
if (i32Err)
printf("[FAIL]\n");
else
printf("[OK]\n");
printf(" Program LD ROM test ........................ ");
/* Program LD ROM and read out data to compare it */
for (i = LDROM_BASE; i < (LDROM_BASE+4096); i += 4)
{
FMC_Write(i, i);
}
i32Err = 0;
for (i = LDROM_BASE; i < (LDROM_BASE+4096); i += 4)
{
FMC_Read(i, &u32Data);
if(u32Data != i)
{
i32Err = 1;
}
}
if (i32Err)
printf("[FAIL]\n");
else
printf("[OK]\n");
/* Check LD image size */
u32ImageSize = (uint32_t)&loaderImageLimit - (uint32_t)&loaderImageBase;
if (u32ImageSize == 0)
{
printf(" ERROR: Loader Image is 0 bytes!\n");
goto lexit;
}
if (u32ImageSize > 4096)
{
printf(" ERROR: Loader Image is larger than 4KBytes!\n");
goto lexit;
}
printf(" Program Simple LD Code ..................... ");
pu32Loader = (uint32_t *)&loaderImageBase;
for (i = 0; i < u32ImageSize; i += PAGE_SIZE)
{
FMC_Erase(LDROM_BASE + i);
for (j = 0; j < PAGE_SIZE; j += 4)
{
FMC_Write(LDROM_BASE + i + j, pu32Loader[(i + j) / 4]);
}
}
/* Verify loader */
i32Err = 0;
for (i = 0; i < u32ImageSize; i += PAGE_SIZE)
{
for(j = 0; j < PAGE_SIZE; j += 4)
{
FMC_Read(LDROM_BASE + i + j, &u32Data);
if (u32Data != pu32Loader[(i+j)/4])
i32Err = 1;
if (i + j >= u32ImageSize)
break;
}
}
if(i32Err)
{
printf("[FAIL]\n");
}
else
{
printf("[OK]\n");
/* Reset CPU to boot to LD mode */
printf("\n >>> Reset to LD mode <<<\n");
FMC_BootSelect(E_FMC_LDROM);
GCR->IPRST_CTL1 = GCR_IPRSTCTL1_CPU;
}
lexit:
/* Disable FMC ISP function */
FMC_DeInit();
/* Lock protected registers */
LOCKREG();
printf("\nFMC Sample Code Completed.\n");
}
