.disable = gfx2d_footswitch_disable,
};
#define FOOTSWITCH(_id, _name, _ops, _gfs_ctl_reg) \
[(_id)] = { \
.desc = { \
.id = (_id), \
.name = (_name), \
.ops = (_ops), \
.type = REGULATOR_VOLTAGE, \
.owner = THIS_MODULE, \
}, \
.gfs_ctl_reg = (_gfs_ctl_reg), \
}
static struct footswitch footswitches[] = {
FOOTSWITCH(FS_GFX2D0, "fs_gfx2d0", &gfx2d_fs_ops, GFX2D0_GFS_CTL_REG),
FOOTSWITCH(FS_GFX2D1, "fs_gfx2d1", &gfx2d_fs_ops, GFX2D1_GFS_CTL_REG),
FOOTSWITCH(FS_GFX3D, "fs_gfx3d", &standard_fs_ops, GFX3D_GFS_CTL_REG),
FOOTSWITCH(FS_IJPEG, "fs_ijpeg", &standard_fs_ops, GEMINI_GFS_CTL_REG),
FOOTSWITCH(FS_MDP, "fs_mdp", &standard_fs_ops, MDP_GFS_CTL_REG),
FOOTSWITCH(FS_ROT, "fs_rot", &standard_fs_ops, ROT_GFS_CTL_REG),
FOOTSWITCH(FS_VED, "fs_ved", &standard_fs_ops, VED_GFS_CTL_REG),
FOOTSWITCH(FS_VFE, "fs_vfe", &standard_fs_ops, VFE_GFS_CTL_REG),
FOOTSWITCH(FS_VPE, "fs_vpe", &standard_fs_ops, VPE_GFS_CTL_REG),
FOOTSWITCH(FS_VCAP, "fs_vcap", &standard_fs_ops, VCAP_GFS_CTL_REG),
};
static int footswitch_probe(struct platform_device *pdev)
{
struct footswitch *fs;
struct regulator_init_data *init_data;
.id = (_id), \
.name = (_name), \
.ops = (_ops), \
.type = REGULATOR_VOLTAGE, \
.owner = THIS_MODULE, \
}, \
.gfs_ctl_reg = (_gfs_ctl_reg), \
.gfs_delay_cnt = (_dc), \
.bus_port1 = (_bp1), \
.bus_port2 = (_bp2), \
.has_axi_clk = (_axi_clk), \
.reset_rate = (_reset_rate), \
}
static struct footswitch footswitches[] = {
FOOTSWITCH(FS_GFX2D0, "fs_gfx2d0", &gfx2d_fs_ops,
GFX2D0_GFS_CTL_REG, 31, false, 0,
MSM_BUS_MASTER_GRAPHICS_2D_CORE0, 0),
FOOTSWITCH(FS_GFX2D1, "fs_gfx2d1", &gfx2d_fs_ops,
GFX2D1_GFS_CTL_REG, 31, false, 0,
MSM_BUS_MASTER_GRAPHICS_2D_CORE1, 0),
FOOTSWITCH(FS_GFX3D, "fs_gfx3d", &standard_fs_ops,
GFX3D_GFS_CTL_REG, 31, false, 27000000,
MSM_BUS_MASTER_GRAPHICS_3D, 0),
FOOTSWITCH(FS_IJPEG, "fs_ijpeg", &standard_fs_ops,
GEMINI_GFS_CTL_REG, 31, true, 0,
MSM_BUS_MASTER_JPEG_ENC, 0),
FOOTSWITCH(FS_MDP, "fs_mdp", &standard_fs_ops,
MDP_GFS_CTL_REG, 31, true, 0,
MSM_BUS_MASTER_MDP_PORT0,
MSM_BUS_MASTER_MDP_PORT1),
FOOTSWITCH(FS_ROT, "fs_rot", &standard_fs_ops,
#define FOOTSWITCH(_id, _pcom_id, _name, _src_clk, _rate, _ahb_clk) \
[_id] = { \
.desc = { \
.id = _id, \
.name = _name, \
.ops = &footswitch_ops, \
.type = REGULATOR_VOLTAGE, \
.owner = THIS_MODULE, \
}, \
.pcom_id = _pcom_id, \
.has_src_clk = _src_clk, \
.src_clk_init_rate = _rate, \
.has_ahb_clk = _ahb_clk, \
}
static struct footswitch footswitches[] = {
FOOTSWITCH(FS_GFX3D, PCOM_FS_GRP,
"fs_gfx3d", true, 24576000, true),
FOOTSWITCH(FS_GFX2D0, PCOM_FS_GRP_2D,
"fs_gfx2d0", false, 24576000, true),
FOOTSWITCH(FS_MDP, PCOM_FS_MDP,
"fs_mdp", false, 24576000, true),
FOOTSWITCH(FS_MFC, PCOM_FS_MFC,
"fs_mfc", false, 24576000, true),
FOOTSWITCH(FS_ROT, PCOM_FS_ROTATOR,
"fs_rot", false, 0, true),
FOOTSWITCH(FS_VFE, PCOM_FS_VFE,
"fs_vfe", false, 24576000, true),
FOOTSWITCH(FS_VPE, PCOM_FS_VPE,
"fs_vpe", false, 24576000, false),
};
static int get_clocks(struct device *dev, struct footswitch *fs)
.ops = (_ops), \
.type = REGULATOR_VOLTAGE, \
.owner = THIS_MODULE, \
}, \
.gfs_ctl_reg = (_gfs_ctl_reg), \
.gfs_delay_cnt = (_dc), \
.bus_port1 = (_bp1), \
.bus_port2 = (_bp2), \
.core_clk_name = (_core_clk), \
.ahb_clk_name = (_ahb_clk), \
.axi_clk_name = (_axi_clk), \
.reset_rate = (_reset_rate), \
}
static struct footswitch footswitches[] = {
FOOTSWITCH(FS_GFX2D0, "fs_gfx2d0", &gfx2d_fs_ops,
GFX2D0_GFS_CTL_REG, 31,
MSM_BUS_MMSS_MASTER_GRAPHICS_2D_CORE0, 0,
"gfx2d0_clk", "gfx2d0_pclk", NULL, 0),
FOOTSWITCH(FS_GFX2D1, "fs_gfx2d1", &gfx2d_fs_ops,
GFX2D1_GFS_CTL_REG, 31,
MSM_BUS_MMSS_MASTER_GRAPHICS_2D_CORE1, 0,
"gfx2d1_clk", "gfx2d1_pclk", NULL, 0),
FOOTSWITCH(FS_GFX3D, "fs_gfx3d", &standard_fs_ops,
GFX3D_GFS_CTL_REG, 31,
MSM_BUS_MMSS_MASTER_GRAPHICS_3D, 0,
"gfx3d_clk", "gfx3d_pclk", NULL, 27000000),
FOOTSWITCH(FS_IJPEG, "fs_ijpeg", &standard_fs_ops,
GEMINI_GFS_CTL_REG, 31,
MSM_BUS_MMSS_MASTER_JPEG_ENC, 0,
"ijpeg_clk", "ijpeg_pclk", "ijpeg_axi_clk", 0),
FOOTSWITCH(FS_MDP, "fs_mdp", &standard_fs_ops,
MDP_GFS_CTL_REG, 31,
